PR264 - Stopped the core dump by removing the bad instruction.

PR414 - Fixed the global interupt vector register.
Linker command file to have the boot code in the first 8K.
The chip select remap needed to be volatile.

3 files changed, 51 insertions, 42 deletions

diff --git a/c/src/lib/libbsp/m68k/ods68302/start/reset.S b/c/src/lib/libbsp/m68k/ods68302/start/reset.S
index 1d1aec955f..2bbc900f9e 100644
--- a/c/src/lib/libbsp/m68k/ods68302/start/reset.S
+++ b/c/src/lib/libbsp/m68k/ods68302/start/reset.S
@@ -37,7 +37,7 @@
 |
 | Initial stack pointer is in the dual ported RAM
 |
-        .sect   .text
+        .sect   .resettext
 
         .global M68Kvec                 | Vector Table
         
@@ -469,8 +469,9 @@ zerobss_loop:
         cmpal   %a0,%a1
         jlt     zerobss_loop                    | loop until _end reached
 
-        movel   %d0,_stack_init                 | load stack top
-
+        movel   #stack_end,%d0
+        andl    #0xfffffffc,%d0                 | align it on 16 byte boundary
+ 
         movw    #0x3700,%sr                     | SUPV MODE,INTERRUPTS OFF!!!
         movel   %d0,%a7                         | set master stack pointer
         movel   %d0,%a6                         | set base pointer
@@ -493,7 +494,6 @@ zerobss_loop:
 unhandled_exception:
                 
 EXCEPTION_HANDLER(#, 0)
-#if 0
 EXCEPTION_HANDLER(#, 1)
 EXCEPTION_HANDLER(#, 2)
 EXCEPTION_HANDLER(#, 3)
@@ -775,13 +775,8 @@ EXCEPTION_HANDLER(#, 253)
 EXCEPTION_HANDLER(#, 254)
 EXCEPTION_HANDLER(#, 255)                                
 
-#endif
-
-
-
 common_exception_handler: 
 
-#if 0
         |
         | Need to put the format/vector above the PC and status register
         |
@@ -801,7 +796,6 @@ common_exception_handler:
         beq     ceh_10
 
         bra     ceh_20
-
 ceh_10:              
 
         move.w  %d0,12(%sp)                     | need to move the format/id
@@ -809,7 +803,7 @@ ceh_10:
         addq    #8,%sp                          | trash the stack
         move.l  %d0,-(%sp)                      | free a register, again
         move.w  4(%sp),%d0                      | get the format/vector id
-
+        
 ceh_20:
 
         move.w  6(%sp),4(%sp)
@@ -827,23 +821,25 @@ ceh_20:
         |
         | check to see if ROM is mapped to zero
         |
-        
-        move.l  #trace_exception,%d1            | get the linked address
-        and.l   #(ROM_SIZE - 1),%d1             | obtain the offset into the ROM
+
+        move.l  #(ROM_SIZE - 1),%d1
+        not.l   %d1
         lea.l   %pc@(0),%a0                     | were are we currently
         move.l  %a0,%d0                         | need to use a data register
-        and.l   #~(ROM_SIZE - 1),%d0            | keep the top part of the address
+        and.l   %d1,%d0                         | keep the top part of the address
+        move.l  #trace_exception,%d1            | get the linked address
+        and.l   #(ROM_SIZE - 1),%d1             | obtain the offset into the ROM
         or.l    %d1,%d0                         | apply it to the trace exception offset
         move.l  %d0,%a0                         | need an address register for jumping
         jsr     %a0@(0)
 
 ceh_30:                 
         jmp     ceh_30
+
 |
 | The RAM based vector table
 |
 
-#endif
         .sect   .vtable
 
         .global vector_table
@@ -862,10 +858,6 @@ vector_table:
 start_frame:
         .space  4,0
 
-        .global stack_start
-        
-stack_start:
-        .space  4,0
 
 |
 | Uninitialised data
@@ -884,5 +876,11 @@ environ:
 
         .global stack_size
         .set    stack_size,0x1000
-
-
+        .global stack_start
+        
+stack_start:
+stack_base:
+        .space  0x2000, 0
+stack_end:
+        .long   0
+ 
diff --git a/c/src/lib/libbsp/m68k/ods68302/startup/cpuboot.c b/c/src/lib/libbsp/m68k/ods68302/startup/cpuboot.c
index 95b205d6fc..0e7130dc8c 100644
--- a/c/src/lib/libbsp/m68k/ods68302/startup/cpuboot.c
+++ b/c/src/lib/libbsp/m68k/ods68302/startup/cpuboot.c
@@ -68,8 +68,9 @@ void boot_phase_1()
   WRITE_BR(CSEL_2, CSEL_2_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
 #endif
   
-  m302.reg.gimr = m302.reg.ipr = m302.reg.imr = m302.reg.isr = 0;
-  
+  m302.reg.ipr = m302.reg.imr = m302.reg.isr = 0;
+  m302.reg.gimr = 0x0080;
+
   m302.reg.simode = 0;
 
   m302.reg.pacnt = CARD_PA_CONFIGURATION;
@@ -101,8 +102,8 @@ void boot_phase_2(void)
               LED_5_OFF, LED_6_OFF, LED_7_OFF, LED_8_OFF);
 #endif
   
-  WRITE_BR(CSEL_ROM, ROM_BASE, BR_READ_ONLY, BR_FC_NULL, BR_ENABLED);
-  WRITE_BR(CSEL_RAM, RAM_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
+  WRITE_BR(CSEL_ROM, _ROM_BASE, BR_READ_ONLY, BR_FC_NULL, BR_ENABLED);
+  WRITE_BR(CSEL_RAM, _RAM_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
   
 #if defined(LED_CONTROL)
   LED_CONTROL(LED_1_GREEN, LED_2_RED, LED_3_OFF, LED_4_OFF,
@@ -110,7 +111,7 @@ void boot_phase_2(void)
 #endif
 
   /* seems to want 2, looked at assember code output */
-  *(&stack + 2) |= ROM_BASE;
+  *((volatile rtems_unsigned32*) (&stack + 2)) |= ROM_BASE;
 }
 
 /*
diff --git a/c/src/lib/libbsp/m68k/ods68302/startup/linkcmds b/c/src/lib/libbsp/m68k/ods68302/startup/linkcmds
index a00c863e8e..c8d1660d74 100644
--- a/c/src/lib/libbsp/m68k/ods68302/startup/linkcmds
+++ b/c/src/lib/libbsp/m68k/ods68302/startup/linkcmds
@@ -14,6 +14,15 @@ _HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x10000;
 _StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000;
 
 /*
+ * Memory map.
+ */
+RAM_BASE = DEFINED(RAM_BASE) ? RAM_BASE : 0x00000000;
+RAM_SIZE = DEFINED(RAM_SIZE) ? RAM_SIZE : 0x00100000;
+ROM_BASE = DEFINED(ROM_BASE) ? ROM_BASE : 0x00C00000;
+ROM_SIZE = DEFINED(ROM_SIZE) ? ROM_SIZE : 0x00100000;
+MC68302_BASE = DEFINED(MC68302_BASE) ? MC68302_BASE : 0x00700000;
+
+/*
  * Declare on-board memory.
  */
 MEMORY {
@@ -21,22 +30,26 @@ MEMORY {
 }
 SECTIONS
 {
-	ram : {
-		. = .;
-	} >ram
-
-	.vtable :
+	.vtable RAM_BASE :
 	{
 		vtable_start = .;
 		*(.vtable)
 		evtable = .;
 	} >ram
 
-
         /*
          * Text, data and bss segments
          */
-        .text : {
+        .text ROM_BASE : {
+                /*
+                 * Needs to be first. 8K limit on CS0 at reset.
+                 */
+		*(.resettext);
+                *cpuboot.o(.text)
+
+                /*
+                 * The reset of the text is entered once CS0 is remapped.
+                 */
                 *(.text)
 
 		/*
@@ -114,8 +127,10 @@ SECTIONS
 
                  . = ALIGN (16);
                 PROVIDE (_etext = .);
-        } >ram
-        .data : {
+        } >rom
+
+        .data (ADDR(.vtable) + SIZEOF(.vtable)) : 
+          AT (ADDR(.text) + SIZEOF(.text)) {
                 PROVIDE (_copy_start = .);
                 *(.data)
 		*(.gnu.linkonce.d*)
@@ -125,7 +140,7 @@ SECTIONS
                 PROVIDE (_edata = .);
                 PROVIDE (_copy_end = .);
         } >ram
-        .bss : {
+        .bss (ADDR(.data) + SIZEOF(.data)) : {
                 _clear_start = .;
                 *(.bss)
                 *(COMMON)
@@ -181,11 +196,6 @@ SECTIONS
   /* These must appear regardless of  .  */
 }
 
-RAM_BASE = DEFINED(RAM_BASE) ? RAM_BASE : 0x00000000;
-RAM_SIZE = DEFINED(RAM_SIZE) ? RAM_SIZE : 0x00100000;
-ROM_BASE = DEFINED(ROM_BASE) ? ROM_BASE : 0x00C00000;
-ROM_SIZE = DEFINED(ROM_SIZE) ? ROM_SIZE : 0x00100000;
-MC68302_BASE = DEFINED(MC68302_BASE) ? MC68302_BASE : 0x00700000;
 m302 = MC68302_BASE;
 _VBR = ADDR(.vtable);		/* location of the VBR table (in RAM) */