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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2007-09-10 13:55:06 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2007-09-10 13:55:06 +0000 |
| commit | 27d33edca77ca1d5c09b28ce609d085ec2d53275 (patch) | |
| tree | f1ce4d76a8cb9a95010dbf23a2435a6f8cd6f8a6 /c | |
| parent | 2007-09-10 Alain Schaefer <alani@easc.ch> (diff) | |
| download | rtems-27d33edca77ca1d5c09b28ce609d085ec2d53275.tar.bz2 | |
2007-09-10 Alain Schaefer <alani@easc.ch>
* startup/bspstart.c: Add a useful routine to program memory protection
in bfin. It is not used but a user of ezKit533 can customize its bsp
and use this function.
Diffstat (limited to 'c')
| -rw-r--r-- | c/src/lib/libbsp/bfin/eZKit533/ChangeLog | 6 | ||||
| -rw-r--r-- | c/src/lib/libbsp/bfin/eZKit533/startup/bspstart.c | 64 |
2 files changed, 70 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/bfin/eZKit533/ChangeLog b/c/src/lib/libbsp/bfin/eZKit533/ChangeLog index 9ac6b5a8df..57e6499186 100644 --- a/c/src/lib/libbsp/bfin/eZKit533/ChangeLog +++ b/c/src/lib/libbsp/bfin/eZKit533/ChangeLog @@ -1,3 +1,9 @@ +2007-09-10 Alain Schaefer <alani@easc.ch> + + * startup/bspstart.c: Add a useful routine to program memory protection + in bfin. It is not used but a user of ezKit533 can customize its bsp + and use this function. + 2007-05-24 Alain Schaefer <alani@easc.ch> * startup/bspstart.c: Fix a problem in the InitEBIU method. diff --git a/c/src/lib/libbsp/bfin/eZKit533/startup/bspstart.c b/c/src/lib/libbsp/bfin/eZKit533/startup/bspstart.c index a1fb838b11..8bf752fdfb 100644 --- a/c/src/lib/libbsp/bfin/eZKit533/startup/bspstart.c +++ b/c/src/lib/libbsp/bfin/eZKit533/startup/bspstart.c @@ -37,6 +37,52 @@ rtems_cpu_table Cpu_table; char *rtems_progname; + +const unsigned int dcplbs_table[][] = { + + { 0xFF900000, (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) }, // L1 Data B + { 0xFF800000, (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) }, // L1 Data A + + { 0x20300000, (PAGE_SIZE_1MB | CPLB_DNOCACHE) }, // Async Memory Bank 3 + { 0x20200000, (PAGE_SIZE_1MB | CPLB_DNOCACHE) }, // Async Memory Bank 2 (Secnd) + { 0x20100000, (PAGE_SIZE_1MB | CPLB_DNOCACHE) }, // Async Memory Bank 1 (Prim B) + { 0x20000000, (PAGE_SIZE_1MB | CPLB_DNOCACHE) }, // Async Memory Bank 0 (Prim A) + + { 0x02400000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) }, // + { 0x02000000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) }, // + { 0x00C00000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) }, // + { 0x00800000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) }, // + { 0x00400000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) }, // + { 0x00000000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) }, // + + { 0xffffffff, 0xffffffff } // end of section - termination + + } +; + + +const unsigned int _icplbs_table[][] = { + { 0xFFA00000, (PAGE_SIZE_1MB | CPLB_I_PAGE_MGMT) }, // L1 Code + + { 0xEF000000, (PAGE_SIZE_1MB | CPLB_INOCACHE) }, // AREA DE BOOT + + { 0x20300000, (PAGE_SIZE_1MB | CPLB_INOCACHE) }, // Async Memory Bank 3 + { 0x20200000, (PAGE_SIZE_1MB | CPLB_INOCACHE) }, // Async Memory Bank 2 (Secnd) + { 0x20100000, (PAGE_SIZE_1MB | CPLB_INOCACHE) }, // Async Memory Bank 1 (Prim B) + { 0x20000000, (PAGE_SIZE_1MB | CPLB_INOCACHE) }, // Async Memory Bank 0 (Prim A) + + { 0x02400000, (PAGE_SIZE_4MB | CPLB_INOCACHE) }, // + { 0x02000000, (PAGE_SIZE_4MB | CPLB_INOCACHE) }, // + { 0x00C00000, (PAGE_SIZE_4MB | CPLB_INOCACHE) }, // + { 0x00800000, (PAGE_SIZE_4MB | CPLB_INOCACHE) }, // + { 0x00400000, (PAGE_SIZE_4MB | CPLB_INOCACHE) }, // + { 0x00000000, (PAGE_SIZE_4MB | CPLB_INOCACHE) }, // + + { 0xffffffff, 0xffffffff } // end of section - termination + + } +; + /* * Use the shared implementations of the following routines */ @@ -205,3 +251,21 @@ uint8_t getLED (void) { return *((uint8_t*)FlashA_PortB_Data); } + +void initCPLB() { + + int i = 0; + unsigned int *addr; + unsigned int *data; + + addr = 0xffe00100; + data = 0xffe00200; + + while ( dcplbs_table[i][0] != 0xffffffff ) { + *addr = dcplbs_table[i][0]; + *data = dcplbs_table[i][1]; + + addr++; + data++; + } +} |