added i2c support

6 files changed, 647 insertions, 7 deletions

diff --git a/c/src/lib/libcpu/powerpc/ChangeLog b/c/src/lib/libcpu/powerpc/ChangeLog
index 4a3e3d4539..5cc4f8b634 100644
--- a/c/src/lib/libcpu/powerpc/ChangeLog
+++ b/c/src/lib/libcpu/powerpc/ChangeLog
@@ -1,3 +1,8 @@
+2007-08-06	Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
+
+	* Makefile.am, mpc83xx/i2c/mpc83xx_i2cdrv.c:
+	added i2c driver
+	
 2007-07-18	Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
 
 	* new-exceptions/raw_exception.c:
diff --git a/c/src/lib/libcpu/powerpc/Makefile.am b/c/src/lib/libcpu/powerpc/Makefile.am
index 5d5682bc34..b562212a71 100644
--- a/c/src/lib/libcpu/powerpc/Makefile.am
+++ b/c/src/lib/libcpu/powerpc/Makefile.am
@@ -315,7 +315,8 @@ mpc8260_cpm_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
 include_mpc8260_HEADERS += mpc8260/include/mmu.h
 
 noinst_PROGRAMS += mpc8260/mmu.rel
-mpc8260_mmu_rel_SOURCES = mpc8260/mmu/mmu.c mpc8260/include/mmu.h
+mpc8260_mmu_rel_SOURCES = mpc8260/mmu/mmu.c \
+                          mpc8260/include/mmu.h
 mpc8260_mmu_rel_CPPFLAGS = $(AM_CPPFLAGS)
 mpc8260_mmu_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
 
@@ -336,6 +337,15 @@ mpc83xx_tsec_rel_SOURCES   = mpc83xx/network/tsec.c
 mpc83xx_tsec_rel_CPPFLAGS  = $(AM_CPPFLAGS) 
 mpc83xx_tsec_rel_CPPFLAGS += -D__INSIDE_RTEMS_BSD_TCPIP_STACK__  -D__BSD_VISIBLE
 mpc83xx_tsec_rel_LDFLAGS   = $(RTEMS_RELLDFLAGS)
+
+## mpc83xx/i2c
+include_mpc83xx_HEADERS += mpc83xx/i2c/mpc83xx_i2cdrv.h
+noinst_PROGRAMS += mpc83xx/i2c.rel
+mpc83xx_i2c_rel_SOURCES   = mpc83xx/i2c/mpc83xx_i2cdrv.c \
+                            mpc83xx/i2c/mpc83xx_i2cdrv.h
+mpc83xx_i2c_rel_CPPFLAGS  = $(AM_CPPFLAGS) 
+mpc83xx_i2c_rel_LDFLAGS   = $(RTEMS_RELLDFLAGS)
+
 endif
 
 include $(srcdir)/preinstall.am
diff --git a/c/src/lib/libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.c b/c/src/lib/libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.c
new file mode 100644
index 0000000000..5b0f6cd88f
--- /dev/null
+++ b/c/src/lib/libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.c
@@ -0,0 +1,478 @@
+/*===============================================================*\
+| Project: RTEMS support for MPC83xx                              |
++-----------------------------------------------------------------+
+|                    Copyright (c) 2007                           |
+|                    Embedded Brains GmbH                         |
+|                    Obere Lagerstr. 30                           |
+|                    D-82178 Puchheim                             |
+|                    Germany                                      |
+|                    rtems@embedded-brains.de                     |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be         |
+| found in the file LICENSE in this distribution or at            |
+|                                                                 |
+| http://www.rtems.com/license/LICENSE.                           |
+|                                                                 |
++-----------------------------------------------------------------+
+| this file contains the MPC83xx I2C driver                       |
+\*===============================================================*/
+#include <stdlib.h>
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <mpc83xx/mpc83xx.h>
+#include <mpc83xx/mpc83xx_i2cdrv.h>
+#include <rtems/error.h>
+#include <rtems/bspIo.h>
+#include <errno.h>
+#include <rtems/libi2c.h>
+
+/* #define DEBUG */
+
+/*
+ * XXX: for the beginning, this driver works polled
+ */
+
+/*=========================================================================*\
+| Function:                                                                 |
+\*-------------------------------------------------------------------------*/
+static int mpc83xx_i2c_find_clock_divider
+(
+/*-------------------------------------------------------------------------*\
+| Purpose:                                                                  |
+|   determine proper divider value                                          |
++---------------------------------------------------------------------------+
+| Input Parameters:                                                         |
+\*-------------------------------------------------------------------------*/
+ uint8_t *result,                        /* result value                   */
+ int divider                             /* requested divider              */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value:                                                             |
+|    o = ok or error code                                                   |
+\*=========================================================================*/
+{
+  int i;
+  int fdr_val;
+  struct {
+    int divider;
+    int fdr_val;
+  } dividers[] ={
+    {  256,0x20 }, {  288,0x21 }, {  320,0x22 }, {  352,0x23 }, 
+    {  384,0x00 }, {  416,0x01 }, {  448,0x25 }, {  480,0x02 },
+    {  512,0x26 }, {  576,0x03 }, {  640,0x04 }, {  704,0x05 },
+    {  768,0x29 }, {  832,0x06 }, {  896,0x2a }, { 1024,0x07 },
+    { 1152,0x08 }, { 1280,0x09 }, { 1536,0x0A }, { 1792,0x2E },
+    { 1920,0x0B }, { 2048,0x2F }, { 2304,0x0C }, { 2560,0x0D },
+    { 3072,0x0E }, { 3584,0x32 }, { 3840,0x0F }, { 4096,0x33 },
+    { 4608,0x10 }, { 5120,0x11 }, { 6144,0x12 }, { 7168,0x36 },
+    { 7680,0x13 }, { 8192,0x37 }, { 9216,0x14 }, {10240,0x15 },
+    {12288,0x16 }, {14336,0x3A }, {15360,0x17 }, {16384,0x3B },
+    {18432,0x18 }, {20480,0x19 }, {24576,0x1A }, {28672,0x3E },
+    {30720,0x1B }, {32768,0x3F }, {36864,0x1C }, {40960,0x1D },
+    {49152,0x1E }, {61440,0x1F }
+  };
+
+  for (i = 0, fdr_val = -1; i < sizeof(dividers)/sizeof(dividers[0]); i++) {
+    fdr_val = dividers[i].fdr_val;
+    if (dividers[i].divider >= divider)
+      {
+	break;
+      }
+  }
+  *result = fdr_val;
+  return 0;
+}
+
+/*=========================================================================*\
+| Function:                                                                 |
+\*-------------------------------------------------------------------------*/
+static int mpc83xx_i2c_wait
+(
+/*-------------------------------------------------------------------------*\
+| Purpose:                                                                  |
+|   wait for i2c to become idle                                             |
++---------------------------------------------------------------------------+
+| Input Parameters:                                                         |
+\*-------------------------------------------------------------------------*/
+ mpc83xx_i2c_softc_t *softc_ptr,          /* handle              */
+ uint8_t              desired_status,     /* desired status word */
+ uint8_t              status_mask         /* status word mask    */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value:                                                             |
+|    o = ok or error code                                                   |
+\*=========================================================================*/
+{
+  uint8_t act_status;
+  rtems_status_code rc;
+  uint32_t tout;
+
+#if defined(DEBUG)
+  printk("mpc83xx_i2c_wait called... ");
+#endif
+  softc_ptr->reg_ptr->i2ccr |= MPC83XX_I2CCR_MIEN;
+
+  if (softc_ptr->initialized) {
+    rc = rtems_semaphore_obtain(softc_ptr->irq_sema_id,RTEMS_WAIT,100);
+    if (rc != RTEMS_SUCCESSFUL) {
+      return rc;
+    }
+  }
+  else {
+    tout = 0;
+    do {
+      if (tout++ > 1000000) {
+#if defined(DEBUG)
+	printk("... exit with RTEMS_TIMEOUT\r\n");
+#endif
+	return RTEMS_TIMEOUT;
+      }
+    } while (!(softc_ptr->reg_ptr->i2csr & MPC83XX_I2CSR_MIF));
+  }
+  softc_ptr->reg_ptr->i2ccr &= ~MPC83XX_I2CCR_MIEN;
+
+  act_status = softc_ptr->reg_ptr->i2csr & status_mask;
+  if (act_status != desired_status) {
+#if defined(DEBUG)
+    printk("... exit with RTEMS_IO_ERROR\r\n");
+#endif
+    return RTEMS_IO_ERROR;
+  }
+#if defined(DEBUG)
+	printk("... exit OK\r\n");
+#endif
+  return RTEMS_SUCCESSFUL;
+}
+
+/*=========================================================================*\
+| Function:                                                                 |
+\*-------------------------------------------------------------------------*/
+static rtems_status_code mpc83xx_i2c_init
+(
+/*-------------------------------------------------------------------------*\
+| Purpose:                                                                  |
+|   initialize the driver                                                   |
++---------------------------------------------------------------------------+
+| Input Parameters:                                                         |
+\*-------------------------------------------------------------------------*/
+ rtems_libi2c_bus_t *bh                  /* bus specifier structure        */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value:                                                             |
+|    o = ok or error code                                                   |
+\*=========================================================================*/
+{
+  mpc83xx_i2c_softc_t *softc_ptr = &(((mpc83xx_i2c_desc_t *)(bh))->softc);
+  uint8_t fdr_val;
+  int errval;
+#if defined(DEBUG)
+  printk("mpc83xx_i2c_init called... ");
+#endif
+  /*
+   * init HW registers
+   */
+  /*
+   * init frequency divider to 100kHz
+   */
+  errval = mpc83xx_i2c_find_clock_divider(&fdr_val,
+					  BSP_CSB_CLK_FRQ/3/100000);
+  if (errval != 0) {
+    return errval;
+  }
+  softc_ptr->reg_ptr->i2cfdr = fdr_val;
+  /*
+   * init digital filter sampling rate
+   */
+  softc_ptr->reg_ptr->i2cdfsrr = 0x10 ; /* no special filtering needed */
+  /*
+   * set own slave address to broadcasr (0x00)
+   */
+  softc_ptr->reg_ptr->i2cadr = 0x00 ; 
+
+  /*
+   * set control register to module enable
+   */
+  softc_ptr->reg_ptr->i2ccr = MPC83XX_I2CCR_MEN;
+  
+  /*
+   * FIXME: init interrupt stuff
+   */  
+  /*
+   * FIXME: init other stuff
+   */
+#if defined(DEBUG)
+  printk("... exit OK\r\n");
+#endif
+  return RTEMS_SUCCESSFUL;
+}
+
+/*=========================================================================*\
+| Function:                                                                 |
+\*-------------------------------------------------------------------------*/
+static rtems_status_code mpc83xx_i2c_send_start
+(
+/*-------------------------------------------------------------------------*\
+| Purpose:                                                                  |
+|   send a start condition to bus                                           |
++---------------------------------------------------------------------------+
+| Input Parameters:                                                         |
+\*-------------------------------------------------------------------------*/
+ rtems_libi2c_bus_t *bh                  /* bus specifier structure        */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value:                                                             |
+|    o = ok or error code                                                   |
+\*=========================================================================*/
+{
+  mpc83xx_i2c_softc_t *softc_ptr = &(((mpc83xx_i2c_desc_t *)(bh))->softc);
+
+#if defined(DEBUG)
+  printk("mpc83xx_i2c_send_start called... ");
+#endif
+  if (0 != (softc_ptr->reg_ptr->i2ccr & MPC83XX_I2CCR_MSTA)) {
+    /*
+     * already started, so send a "repeated start" 
+     */
+    softc_ptr->reg_ptr->i2ccr |= MPC83XX_I2CCR_RSTA;
+  }
+  else {
+    softc_ptr->reg_ptr->i2ccr |= MPC83XX_I2CCR_MSTA;
+  }
+
+#if defined(DEBUG)
+  printk("... exit OK\r\n");
+#endif
+  return 0;
+}
+
+/*=========================================================================*\
+| Function:                                                                 |
+\*-------------------------------------------------------------------------*/
+static rtems_status_code mpc83xx_i2c_send_stop
+(
+/*-------------------------------------------------------------------------*\
+| Purpose:                                                                  |
+|   send a stop condition to bus                                            |
++---------------------------------------------------------------------------+
+| Input Parameters:                                                         |
+\*-------------------------------------------------------------------------*/
+ rtems_libi2c_bus_t *bh                  /* bus specifier structure        */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value:                                                             |
+|    o = ok or error code                                                   |
+\*=========================================================================*/
+{
+  mpc83xx_i2c_softc_t *softc_ptr = &(((mpc83xx_i2c_desc_t *)(bh))->softc);
+
+#if defined(DEBUG)
+  printk("mpc83xx_i2c_send_stop called... ");
+#endif
+  softc_ptr->reg_ptr->i2ccr &= ~MPC83XX_I2CCR_MSTA;
+
+#if defined(DEBUG)
+  printk("... exit OK\r\n");
+#endif
+  return 0;
+}
+
+/*=========================================================================*\
+| Function:                                                                 |
+\*-------------------------------------------------------------------------*/
+static rtems_status_code mpc83xx_i2c_send_addr
+(
+/*-------------------------------------------------------------------------*\
+| Purpose:                                                                  |
+|   address a slave device on the bus                                       |
++---------------------------------------------------------------------------+
+| Input Parameters:                                                         |
+\*-------------------------------------------------------------------------*/
+ rtems_libi2c_bus_t *bh,                 /* bus specifier structure        */
+ uint32_t addr,                          /* address to send on bus         */
+ int rw                                  /* 0=write,1=read                 */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value:                                                             |
+|    o = ok or error code                                                   |
+\*=========================================================================*/
+{
+  mpc83xx_i2c_softc_t *softc_ptr = &(((mpc83xx_i2c_desc_t *)(bh))->softc);
+  rtems_boolean long_addr = FALSE;
+  uint8_t addr_byte;
+  rtems_status_code rc;
+
+#if defined(DEBUG)
+  printk("mpc83xx_i2c_send_addr called... ");
+#endif
+  softc_ptr->reg_ptr->i2ccr |= MPC83XX_I2CCR_MTX;
+  /*
+   * determine, whether short or long address is needed, determine rd/wr
+   */
+  if (addr > 0x7f) {
+    long_addr = TRUE;
+    addr_byte = (0xf0 
+		 | ((addr >> 7) & 0x06)
+		 | ((rw) ? 1 : 0));
+    /*
+     * send first byte 
+     */
+    softc_ptr->reg_ptr->i2cdr = addr_byte;
+    /*
+     * wait for successful transfer
+     */
+    rc = mpc83xx_i2c_wait(softc_ptr,
+			  MPC83XX_I2CSR_MCF,
+			  MPC83XX_I2CSR_MCF);
+    if (rc != RTEMS_SUCCESSFUL) {
+#if defined(DEBUG)
+      printk("... exit rc=%d\r\n",rc);
+#endif
+      return rc;
+    }
+  }
+  addr_byte = (0xf0 
+	       | ((addr >> 7) & 0x06)
+	       | ((rw) ? 1 : 0));
+  /*
+   * send (final) byte 
+   */
+  addr_byte = ((addr << 1) 
+	       | ((rw) ? 1 : 0));
+
+  softc_ptr->reg_ptr->i2cdr = addr_byte;
+  /*
+   * wait for successful transfer
+   */
+  rc = mpc83xx_i2c_wait(softc_ptr,
+			MPC83XX_I2CSR_MCF,
+			MPC83XX_I2CSR_MCF);
+
+#if defined(DEBUG)
+  printk("... exit rc=%d\r\n",rc);
+#endif
+  return rc;
+}
+
+/*=========================================================================*\
+| Function:                                                                 |
+\*-------------------------------------------------------------------------*/
+static int mpc83xx_i2c_read_bytes
+(
+/*-------------------------------------------------------------------------*\
+| Purpose:                                                                  |
+|   receive some bytes from I2C device                                      |
++---------------------------------------------------------------------------+
+| Input Parameters:                                                         |
+\*-------------------------------------------------------------------------*/
+ rtems_libi2c_bus_t *bh,                 /* bus specifier structure        */
+ unsigned char *buf,                     /* buffer to store bytes          */
+ int len                                 /* number of bytes to receive     */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value:                                                             |
+|    number of bytes received or (negative) error code                      |
+\*=========================================================================*/
+{
+  mpc83xx_i2c_softc_t *softc_ptr = &(((mpc83xx_i2c_desc_t *)(bh))->softc);
+  rtems_status_code rc;
+  unsigned char *p = buf;
+  unsigned char dummy;
+
+#if defined(DEBUG)
+  printk("mpc83xx_i2c_read_bytes called... ");
+#endif
+  softc_ptr->reg_ptr->i2ccr &= ~MPC83XX_I2CCR_MTX;
+  softc_ptr->reg_ptr->i2ccr &= ~MPC83XX_I2CCR_TXAK;
+  /*
+   * we need a dummy transfer here to start the first read
+   */
+  dummy = softc_ptr->reg_ptr->i2cdr;
+
+  while (len-- > 0) {
+    if (len == 0) {
+      /*
+       * last byte is not acknowledged
+       */
+      softc_ptr->reg_ptr->i2ccr |= MPC83XX_I2CCR_TXAK;
+    }
+    /*
+     * wait 'til end of transfer
+     */
+    rc = mpc83xx_i2c_wait(softc_ptr,
+			  MPC83XX_I2CSR_MCF,
+			  MPC83XX_I2CSR_MCF);
+    if (rc != RTEMS_SUCCESSFUL) {
+#if defined(DEBUG)
+      printk("... exit rc=%d\r\n",-rc);
+#endif
+      return -rc;
+    }
+    *p++ = softc_ptr->reg_ptr->i2cdr;
+      
+  }
+#if defined(DEBUG)
+  printk("... exit OK, rc=%d\r\n",p-buf);
+#endif
+  return p - buf;
+}
+
+/*=========================================================================*\
+| Function:                                                                 |
+\*-------------------------------------------------------------------------*/
+static int mpc83xx_i2c_write_bytes
+(
+/*-------------------------------------------------------------------------*\
+| Purpose:                                                                  |
+|   send some bytes to I2C device                                           |
++---------------------------------------------------------------------------+
+| Input Parameters:                                                         |
+\*-------------------------------------------------------------------------*/
+ rtems_libi2c_bus_t *bh,                 /* bus specifier structure        */
+ unsigned char *buf,                     /* buffer to send                 */
+ int len                                 /* number of bytes to send        */
+
+)
+/*-------------------------------------------------------------------------*\
+| Return Value:                                                             |
+|    number of bytes sent or (negative) error code                          |
+\*=========================================================================*/
+{
+  mpc83xx_i2c_softc_t *softc_ptr = &(((mpc83xx_i2c_desc_t *)(bh))->softc);
+  rtems_status_code rc;
+  unsigned char *p = buf;
+
+#if defined(DEBUG)
+  printk("mpc83xx_i2c_write_bytes called... ");
+#endif
+  softc_ptr->reg_ptr->i2ccr = 
+    (softc_ptr->reg_ptr->i2ccr & ~MPC83XX_I2CCR_TXAK) | MPC83XX_I2CCR_MTX;
+  while (len-- > 0) {
+    softc_ptr->reg_ptr->i2cdr = *p++;
+    /*
+     * wait 'til end of transfer
+     */
+    rc = mpc83xx_i2c_wait(softc_ptr,
+			  MPC83XX_I2CSR_MCF,
+			  MPC83XX_I2CSR_MCF);
+    if (rc != RTEMS_SUCCESSFUL) {
+#if defined(DEBUG)
+      printk("... exit rc=%d\r\n",-rc);
+#endif
+      return -rc;
+    }
+  }
+#if defined(DEBUG)
+  printk("... exit OK, rc=%d\r\n",p-buf);
+#endif
+  return p - buf;
+}
+
+rtems_libi2c_bus_ops_t mpc83xx_i2c_ops = {
+  init:        mpc83xx_i2c_init,
+  send_start:  mpc83xx_i2c_send_start,
+  send_stop:   mpc83xx_i2c_send_stop,
+  send_addr:   mpc83xx_i2c_send_addr,
+  read_bytes:  mpc83xx_i2c_read_bytes,
+  write_bytes: mpc83xx_i2c_write_bytes,
+};
+
diff --git a/c/src/lib/libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.h b/c/src/lib/libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.h
new file mode 100644
index 0000000000..793cd6d564
--- /dev/null
+++ b/c/src/lib/libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.h
@@ -0,0 +1,50 @@
+/*===============================================================*\
+| Project: RTEMS support for MPC83xx                              |
++-----------------------------------------------------------------+
+|                    Copyright (c) 2007                           |
+|                    Embedded Brains GmbH                         |
+|                    Obere Lagerstr. 30                           |
+|                    D-82178 Puchheim                             |
+|                    Germany                                      |
+|                    rtems@embedded-brains.de                     |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be         |
+| found in the file LICENSE in this distribution or at            |
+|                                                                 |
+| http://www.rtems.com/license/LICENSE.                           |
+|                                                                 |
++-----------------------------------------------------------------+
+| this file contains the MPC83xx I2C driver declarations          |
+\*===============================================================*/
+#ifndef _MPC83XX_I2CDRV_H
+#define _MPC83XX_I2CDRV_H
+
+#include <mpc83xx/mpc83xx.h>
+#include <rtems/libi2c.h>
+#include <rtems/irq.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct mpc83xx_i2c_softc {
+  m83xxI2CRegisters_t *reg_ptr;
+  int                  initialized;
+  rtems_irq_number     irq_number;
+  rtems_id             irq_sema_id;
+} mpc83xx_i2c_softc_t ;
+
+typedef struct {
+  rtems_libi2c_bus_t	   bus_desc;	
+  struct mpc83xx_i2c_softc softc;
+} mpc83xx_i2c_desc_t;
+
+
+extern rtems_libi2c_bus_ops_t mpc83xx_i2c_ops;
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* _MPC83XX_I2CDRV_H */
diff --git a/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h b/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h
index d2576060c3..6c7288164e 100644
--- a/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h
+++ b/c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h
@@ -274,15 +274,39 @@ typedef struct m83xxDDRRegisters_ {
 
   /* I2C Controller */
 typedef struct m83xxI2CRegisters_ {
-  volatile uint32_t i2cadr; /* 0x0_3000 I2C1 address register R/W 0x00 17.3.1.1/17-5 */
-  volatile uint32_t i2cfdr; /* 0x0_3004 I2C1 frequency divider register R/W 0x00 17.3.1.2/17-5 */
-  volatile uint32_t i2ccr; /* 0x0_3008 I2C1 control register R/W 0x00 17.3.1.3/17-6 */
-  volatile uint32_t i2csr; /* 0x0_300C I2C1 status register R/W 0x81 17.3.1.4/17-8 */
-  volatile uint32_t i2cdr; /* 0x0_3010 I2C1 data register R/W 0x00 17.3.1.5/17-9 */
-  volatile uint32_t i2cdfsrr; /* 0x0_3014 I2C1 digital filter sampling rate register R/W 0x0001_0000 17.3.1.6/17-10 */
+  volatile uint8_t i2cadr;  /* 0x0_3000 I2C1 address register R/W 0x00 17.3.1.1/17-5 */
+  uint8_t reserved0_3001[0x03004-0x03001];
+  volatile uint8_t i2cfdr; /* 0x0_3004 I2C1 frequency divider register R/W 0x00 17.3.1.2/17-5 */
+  uint8_t reserved0_3005[0x03008-0x03005];
+  volatile uint8_t i2ccr; /* 0x0_3008 I2C1 control register R/W 0x00 17.3.1.3/17-6 */
+  uint8_t reserved0_3009[0x0300C-0x03009];
+  volatile uint8_t i2csr; /* 0x0_300C I2C1 status register R/W 0x81 17.3.1.4/17-8 */
+  uint8_t reserved0_300D[0x03010-0x0300D];
+  volatile uint8_t i2cdr; /* 0x0_3010 I2C1 data register R/W 0x00 17.3.1.5/17-9 */
+  uint8_t reserved0_3011[0x03014-0x03011];
+  volatile uint8_t i2cdfsrr; /* 0x0_3014 I2C1 digital filter sampling rate register R/W 0x0001_0000 17.3.1.6/17-10 */
+  uint8_t reserved0_3015[0x03018-0x03015];
   uint8_t reserved0_3018[0x03100-0x03018]; /* 0x0_3018-30FF Reserved, should be cleared */
 } m83xxI2CRegisters_t;
 
+#define  MPC83XX_I2CCR_MEN  (1 << 7)     /* module enable */
+#define  MPC83XX_I2CCR_MIEN (1 << 6)     /* module interrupt enable */
+#define  MPC83XX_I2CCR_MSTA (1 << 5)     /* 0->1 generates a start condiiton, 1->0 a stop */
+#define  MPC83XX_I2CCR_MTX  (1 << 4)     /* 0 = receive mode, 1 = transmit mode           */
+#define  MPC83XX_I2CCR_TXAK (1 << 3)     /* 0 = send ack 1 = send nak during receive      */
+#define  MPC83XX_I2CCR_RSTA (1 << 2)     /* 1 = send repeated start condition             */
+#define  MPC83XX_I2CCR_BCST (1 << 0)     /* 0 = disable 1 = enable broadcast accept       */
+
+#define  MPC83XX_I2CSR_MCF  (1 << 7)     /* data transfer (0=transfer in progres) */
+#define  MPC83XX_I2CSR_MAAS (1 << 6)     /* addessed as slave   */
+#define  MPC83XX_I2CSR_MBB  (1 << 5)     /* bus busy            */
+#define  MPC83XX_I2CSR_MAL  (1 << 4)     /* arbitration lost    */
+#define  MPC83XX_I2CSR_BCSTM (1 << 3)    /* broadcast match     */
+#define  MPC83XX_I2CSR_SRW  (1 << 2)     /* slave read/write    */
+#define  MPC83XX_I2CSR_MIF  (1 << 1)     /* module interrupt    */
+#define  MPC83XX_I2CSR_RXAK (1 << 0)     /* receive acknowledge */
+
+
   /* DUART */
 typedef struct m83xxDUARTRegisters_ {
   union {
@@ -1080,6 +1104,75 @@ extern m83xxRegisters_t mpc83xx;
 #define DDR_SDRAM_CLK_CNTL_OFF       0x02130
 #define DDR_SDRAM_INIT_ADDR_OFF      0x02148
 
+/*
+ * bits in reset configuration words/registers
+ */
+                                           /* Local bus clocking mode */
+#define RCWLR_LBIUCM_1_1 (0 << (31- 0))    /* 1:1 */
+#define RCWLR_LBIUCM_2_1 (1 << (31- 0))    /* 2:1 */
+                                           /* DDR clocking mode      */
+#define RCWLR_DDRCM_1_1  (0 << (31- 1))    /* 1:1 */
+#define RCWLR_DDRCM_2_1  (1 << (31- 1))    /* 2:1 */
+                                          /* System PLL mult. factor */
+#define RCWLR_SPMF(n) (((n)&0xf)<<(31- 7)) 
+                                          /* Core PLL mult. factor   */
+#define RCWLR_COREPLL(n) (((n)&0xff)<<(31-15)) 
+
+                                           /* PCI host mode          */
+#define RCWHR_PCI_AGENT  (0 << (31- 0))    /* agent mode             */
+#define RCWHR_PCI_HOST   (1 << (31- 0))    /* host mode              */
+
+#define RCWHR_PCI_32     (0 << (31- 1))    /* PCI bus width 32 bit   */
+#define RCWHR_PCI_64     (1 << (31- 1))    /* PCI bus width 64 bit   */
+
+#define RCWHR_PCI1ARB_DIS (0 << (31- 2))   /* PCI1 arbiter disabled */
+#define RCWHR_PCI1ARB_EN  (1 << (31- 2))   /* PCI1 arbiter enabled  */
+#define RCWHR_PCI2ARB_DIS (0 << (31- 3))   /* PCI2 arbiter disabled */
+#define RCWHR_PCI2ARB_EN  (1 << (31- 3))   /* PCI2 arbiter enabled  */
+
+#define RCWHR_CORE_DIS    (1 << (31- 4))   /* CPU core disabled     */
+#define RCWHR_CORE_EN     (0 << (31- 4))   /* CPU core enabled      */
+
+#define RCWHR_BMS_LOW     (0 << (31- 5))   /* Boot from low addr  0x00000100 */
+#define RCWHR_BMS_HIGH    (1 << (31- 5))   /* Boot from high addr 0xFFF00100 */
+
+#define RCWHR_BOOTSEQ_NONE (0 <<(31- 7))   /* Bootsequencer off              */
+#define RCWHR_BOOTSEQ_NORM (1 <<(31- 7))   /* Bootsequencer normal I2C       */
+#define RCWHR_BOOTSEQ_EXTD (2 <<(31- 7))   /* Bootsequencer extended I2C     */
+#define RCWHR_BOOTSEQ_RSRV (3 <<(31- 7))   /* Bootsequencer reserved         */
+
+#define RCWHR_SW_DIS      (0 << (31- 8))   /* Watchdog disabled     */
+#define RCWHR_SW_EN       (1 << (31- 8))   /* Watchdog enabled      */
+
+#define RCWHR_ROMLOC_DDR  (0 << (31-11))   /* Initial ROM location:DDR Ram   */
+#define RCWHR_ROMLOC_PCI1 (1 << (31-11))   /* Initial ROM location:PCI 1     */
+#define RCWHR_ROMLOC_PCI2 (2 << (31-11))   /* Initial ROM location:PCI 2     */
+#define RCWHR_ROMLOC_RSV1 (3 << (31-11))   /* Initial ROM location:Reserved  */
+#define RCWHR_ROMLOC_RSV2 (4 << (31-11))   /* Initial ROM location:Reserved  */
+#define RCWHR_ROMLOC_LB08 (5 << (31-11))   /* Initial ROM location:LBus  8bit*/
+#define RCWHR_ROMLOC_LB16 (6 << (31-11))   /* Initial ROM location:LBus 16bit*/
+#define RCWHR_ROMLOC_LB32 (7 << (31-11))   /* Initial ROM location:LBus 32bit*/
+
+#define RCWHR_TSEC1M_RGMII (0 << (31-17))  /* TSEC1 Mode: RGMII  */
+#define RCWHR_TSEC1M_RTBI  (1 << (31-17))  /* TSEC1 Mode: RTBI   */
+#define RCWHR_TSEC1M_GMII  (2 << (31-17))  /* TSEC1 Mode: GMII   */
+#define RCWHR_TSEC1M_TBI   (3 << (31-17))  /* TSEC1 Mode: TBI    */
+
+#define RCWHR_TSEC2M_RGMII (0 << (31-19))  /* TSEC2 Mode: RGMII  */
+#define RCWHR_TSEC2M_RTBI  (1 << (31-19))  /* TSEC2 Mode: RTBI   */
+#define RCWHR_TSEC2M_GMII  (2 << (31-19))  /* TSEC2 Mode: GMII   */
+#define RCWHR_TSEC2M_TBI   (3 << (31-19))  /* TSEC2 Mode: TBI    */
+
+#define RCWHR_ENDIAN_BIG  (0 << (31-28))   /* Big Endian Mode         */
+#define RCWHR_ENDIAN_LIT  (1 << (31-28))   /* True Little Endian Mode */
+
+#define RCWHR_LALE_NORM   (0 << (31-29))   /* normal LALE timing      */
+#define RCWHR_LALE_EARLY  (1 << (31-29))   /* early LALE negation     */
+
+#define RCWHR_LDP_PAR     (0 << (31-30))   /* LDP0-3 are parity pins  */
+#define RCWHR_LDP_SPC     (1 << (31-30))   /* LDP0-3 are special pins */
+
+
 #if !defined(ASM)
 typedef struct PQ_BufferDescriptor_ {
   volatile uint16_t  status;
diff --git a/c/src/lib/libcpu/powerpc/preinstall.am b/c/src/lib/libcpu/powerpc/preinstall.am
index eea3daec08..c6b99de4db 100644
--- a/c/src/lib/libcpu/powerpc/preinstall.am
+++ b/c/src/lib/libcpu/powerpc/preinstall.am
@@ -207,4 +207,8 @@ PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc83xx/mpc83xx.h
 $(PROJECT_INCLUDE)/mpc83xx/tsec.h: mpc83xx/network/tsec.h $(PROJECT_INCLUDE)/mpc83xx/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc83xx/tsec.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc83xx/tsec.h
+
+$(PROJECT_INCLUDE)/mpc83xx/mpc83xx_i2cdrv.h: mpc83xx/i2c/mpc83xx_i2cdrv.h $(PROJECT_INCLUDE)/mpc83xx/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc83xx/mpc83xx_i2cdrv.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc83xx/mpc83xx_i2cdrv.h
 endif