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authorTill Straumann <strauman@slac.stanford.edu>2006-06-19 20:24:08 +0000
committerTill Straumann <strauman@slac.stanford.edu>2006-06-19 20:24:08 +0000
commit261a1b27d1f55fbb216c5ea79bc26991a566be64 (patch)
treecb4adfbc0c7a479a2c58207bce61743d6d664c97 /c
parent Only set/access the _BSP_vme_bridge_irq variable on BSPs that (diff)
downloadrtems-261a1b27d1f55fbb216c5ea79bc26991a566be64.tar.bz2
Added altivec exception. Unfortunately, this doesn't fit
the normal scheme of vector = exception # << 8. So we picked an unused vector number (currently 0xa) where we map the special vector 0xf20 (altivec).
Diffstat (limited to 'c')
-rw-r--r--c/src/lib/libcpu/powerpc/ChangeLog8
-rw-r--r--c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.c31
-rw-r--r--c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.h75
3 files changed, 78 insertions, 36 deletions
diff --git a/c/src/lib/libcpu/powerpc/ChangeLog b/c/src/lib/libcpu/powerpc/ChangeLog
index 0df4583fca..d487a8a9e1 100644
--- a/c/src/lib/libcpu/powerpc/ChangeLog
+++ b/c/src/lib/libcpu/powerpc/ChangeLog
@@ -1,5 +1,13 @@
2006-06-19 Till Straumann <strauman@slac.stanford.edu>
+ * mpc6xx/exceptions/raw_exception.c, mpc6xx/exceptions/raw_exception.h:
+ Added altivec exception. Unfortunately, this doesn't fit
+ the normal scheme of vector = exception # << 8. So we picked
+ an unused vector number (currently 0xa) where we map the special
+ vector 0xf20 (altivec).
+
+2006-06-19 Till Straumann <strauman@slac.stanford.edu>
+
* new-exceptions/cpu.c, new-exceptions/cpu_asm.S: Never
allow the FPU to be switched on for integer-only tasks
(new gcc may use FP regs implicitely).
diff --git a/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.c b/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.c
index e1770ebd58..5f697bfb0f 100644
--- a/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.c
+++ b/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.c
@@ -36,12 +36,29 @@ void * codemove(void *, const void *, unsigned int, unsigned long);
void* mpc60x_get_vector_addr(rtems_vector vector)
{
+ unsigned vaddr = ((unsigned)vector) << 8;
extern rtems_cpu_table Cpu_table;
+ /* Special case; altivec unavailable doesn't fit :-( */
+ if ( ASM_VEC_VECTOR == vector )
+ vaddr = ASM_VEC_VECTOR_OFFSET;
+
if ( Cpu_table.exceptions_in_RAM )
- return ((void*) (((unsigned) vector) << 8));
+ return ((void*) vaddr);
+
+ return ((void*) (vaddr + 0xfff00000));
+}
- return ((void*) (((unsigned) vector) << 8) + 0xfff00000);
+int altivec_vector_is_valid(rtems_vector vector)
+{
+ switch(vector) {
+ case ASM_VEC_VECTOR:
+ case ASM_VEC_ASSIST_VECTOR:
+ return 1;
+ default:
+ break;
+ }
+ return 0;
}
int mpc750_vector_is_valid(rtems_vector vector)
@@ -160,16 +177,22 @@ int mpc60x_vector_is_valid(rtems_vector vector)
{
switch (current_ppc_cpu) {
case PPC_7400:
+ if ( altivec_vector_is_valid(vector) )
+ return 1;
+ /* else fall thru */
case PPC_750:
if (!mpc750_vector_is_valid(vector)) {
return 0;
}
break;
+ case PPC_7455: /* Kate Feng */
+ case PPC_7457:
+ if ( altivec_vector_is_valid(vector) )
+ return 1;
+ /* else fall thru */
case PPC_604:
case PPC_604e:
case PPC_604r:
- case PPC_7455: /* Kate Feng */
- case PPC_7457:
if (!mpc604_vector_is_valid(vector)) {
return 0;
}
diff --git a/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.h b/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.h
index 3153f47cfa..5d84944101 100644
--- a/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.h
+++ b/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.h
@@ -30,44 +30,55 @@
* Exception Vectors as defined in the MCP750 manual
*/
-#define ASM_RESET_VECTOR 0x01
-#define ASM_MACH_VECTOR 0x02
-#define ASM_PROT_VECTOR 0x03
-#define ASM_ISI_VECTOR 0x04
-#define ASM_EXT_VECTOR 0x05
-#define ASM_ALIGN_VECTOR 0x06
-#define ASM_PROG_VECTOR 0x07
-#define ASM_FLOAT_VECTOR 0x08
-#define ASM_DEC_VECTOR 0x09
-#define ASM_SYS_VECTOR 0x0C
-#define ASM_TRACE_VECTOR 0x0D
-#define ASM_PERFMON_VECTOR 0x0F
-#define ASM_IMISS_VECTOR 0x10
-#define ASM_DLMISS_VECTOR 0x11
-#define ASM_DSMISS_VECTOR 0x12
-#define ASM_ADDR_VECTOR 0x13
-#define ASM_SYSMGMT_VECTOR 0x14
-#define ASM_ITM_VECTOR 0x17
+#define ASM_RESET_VECTOR 0x01
+#define ASM_MACH_VECTOR 0x02
+#define ASM_PROT_VECTOR 0x03
+#define ASM_ISI_VECTOR 0x04
+#define ASM_EXT_VECTOR 0x05
+#define ASM_ALIGN_VECTOR 0x06
+#define ASM_PROG_VECTOR 0x07
+#define ASM_FLOAT_VECTOR 0x08
+#define ASM_DEC_VECTOR 0x09
+/* Bummer: Altivec unavailable doesn't fit into this scheme... (0xf20).
+ * We'd like to avoid reserved vectors but OTOH we don't want to use
+ * just an available high number because tables (and copies) are of
+ * size LAST_VALID_EXC.
+ * So until there is a CPU that uses 0xA we'll just use that :-(
+ */
+#define ASM_VEC_VECTOR 0x0A
+#define ASM_SYS_VECTOR 0x0C
+#define ASM_TRACE_VECTOR 0x0D
+#define ASM_PERFMON_VECTOR 0x0F
+#define ASM_IMISS_VECTOR 0x10
+#define ASM_DLMISS_VECTOR 0x11
+#define ASM_DSMISS_VECTOR 0x12
+#define ASM_ADDR_VECTOR 0x13
+#define ASM_SYSMGMT_VECTOR 0x14
+#define ASM_VEC_ASSIST_VECTOR 0x16
+#define ASM_ITM_VECTOR 0x17
#define LAST_VALID_EXC ASM_ITM_VECTOR
/*
* Vector offsets as defined in the MCP750 manual
*/
-#define ASM_RESET_VECTOR_OFFSET (ASM_RESET_VECTOR << 8)
-#define ASM_MACH_VECTOR_OFFSET (ASM_MACH_VECTOR << 8)
-#define ASM_PROT_VECTOR_OFFSET (ASM_PROT_VECTOR << 8)
-#define ASM_ISI_VECTOR_OFFSET (ASM_ISI_VECTOR << 8)
-#define ASM_EXT_VECTOR_OFFSET (ASM_EXT_VECTOR << 8)
-#define ASM_ALIGN_VECTOR_OFFSET (ASM_ALIGN_VECTOR << 8)
-#define ASM_PROG_VECTOR_OFFSET (ASM_PROG_VECTOR << 8)
-#define ASM_FLOAT_VECTOR_OFFSET (ASM_FLOAT_VECTOR << 8)
-#define ASM_DEC_VECTOR_OFFSET (ASM_DEC_VECTOR << 8)
-#define ASM_SYS_VECTOR_OFFSET (ASM_SYS_VECTOR << 8)
-#define ASM_TRACE_VECTOR_OFFSET (ASM_TRACE_VECTOR << 8)
-#define ASM_ADDR_VECTOR_OFFSET (ASM_ADDR_VECTOR << 8)
-#define ASM_SYSMGMT_VECTOR_OFFSET (ASM_SYSMGMT_VECTOR << 8)
-#define ASM_ITM_VECTOR_OFFSET (ASM_ITM_VECTOR << 8)
+#define ASM_RESET_VECTOR_OFFSET (ASM_RESET_VECTOR << 8)
+#define ASM_MACH_VECTOR_OFFSET (ASM_MACH_VECTOR << 8)
+#define ASM_PROT_VECTOR_OFFSET (ASM_PROT_VECTOR << 8)
+#define ASM_ISI_VECTOR_OFFSET (ASM_ISI_VECTOR << 8)
+#define ASM_EXT_VECTOR_OFFSET (ASM_EXT_VECTOR << 8)
+#define ASM_ALIGN_VECTOR_OFFSET (ASM_ALIGN_VECTOR << 8)
+#define ASM_PROG_VECTOR_OFFSET (ASM_PROG_VECTOR << 8)
+#define ASM_FLOAT_VECTOR_OFFSET (ASM_FLOAT_VECTOR << 8)
+#define ASM_DEC_VECTOR_OFFSET (ASM_DEC_VECTOR << 8)
+#define ASM_SYS_VECTOR_OFFSET (ASM_SYS_VECTOR << 8)
+#define ASM_TRACE_VECTOR_OFFSET (ASM_TRACE_VECTOR << 8)
+#define ASM_PERFMON_VECTOR_OFFSET (ASM_PERFMON_VECTOR << 8)
+#define ASM_VEC_VECTOR_OFFSET (0xf20)
+#define ASM_ADDR_VECTOR_OFFSET (ASM_ADDR_VECTOR << 8)
+#define ASM_SYSMGMT_VECTOR_OFFSET (ASM_SYSMGMT_VECTOR << 8)
+#define ASM_VEC_ASSIST_VECTOR_OFFSET (ASM_VEC_ASSIST_VECTOR << 8)
+#define ASM_ITM_VECTOR_OFFSET (ASM_ITM_VECTOR << 8)
#ifndef ASM