Whitespace removal.

4 files changed, 84 insertions, 84 deletions

diff --git a/c/src/lib/libcpu/m68k/mcf5206/clock/ckinit.c b/c/src/lib/libcpu/m68k/mcf5206/clock/ckinit.c
index 462fac6fbb..d0739d66a9 100644
--- a/c/src/lib/libcpu/m68k/mcf5206/clock/ckinit.c
+++ b/c/src/lib/libcpu/m68k/mcf5206/clock/ckinit.c
@@ -1,8 +1,8 @@
 /*
  *  Clock Driver for MCF5206eLITE board
  *
- *  This driver initailizes timer1 on the MCF5206E as the 
- *  main system clock 
+ *  This driver initailizes timer1 on the MCF5206E as the
+ *  main system clock
  *
  *  Author: Victor V. Vengerov <vvv@oktet.ru>
  *
@@ -36,7 +36,7 @@ volatile uint32_t   Clock_driver_ticks;
 /*
  * These are set by clock driver during its init
  */
- 
+
 rtems_device_major_number rtems_clock_major = ~0;
 rtems_device_minor_number rtems_clock_minor;
 
@@ -114,33 +114,33 @@ Install_clock(rtems_isr_entry clock_isr)
             MCF5206E_ICR_AVEC |
             ((BSP_INTLVL_TIMER1 << MCF5206E_ICR_IL_S) & MCF5206E_ICR_IL) |
             ((BSP_INTPRIO_TIMER1 << MCF5206E_ICR_IP_S) & MCF5206E_ICR_IP);
-        
+
         /* Register the interrupt handler */
         set_vector(clock_isr, BSP_INTVEC_TIMER1, 1);
-        
+
         /* Reset timer 1 */
         *MCF5206E_TMR(MBAR, 1) = MCF5206E_TMR_RST;
         *MCF5206E_TMR(MBAR, 1) = MCF5206E_TMR_ICLK_STOP;
         *MCF5206E_TMR(MBAR, 1) = MCF5206E_TMR_RST;
         *MCF5206E_TCN(MBAR, 1) = 0; /* Reset counter */
         *MCF5206E_TER(MBAR, 1) = MCF5206E_TER_REF | MCF5206E_TER_CAP;
-        
+
         /* Set Timer 1 prescaler so that it counts in microseconds */
         *MCF5206E_TMR(MBAR, 1) =
-            (((BSP_SYSTEM_FREQUENCY/1000000 - 1) << MCF5206E_TMR_PS_S) & 
+            (((BSP_SYSTEM_FREQUENCY/1000000 - 1) << MCF5206E_TMR_PS_S) &
              MCF5206E_TMR_PS) |
             MCF5206E_TMR_CE_NONE | MCF5206E_TMR_ORI | MCF5206E_TMR_FRR |
             MCF5206E_TMR_RST;
-            
-        /* Set the timer timeout value from the BSP config */      
+
+        /* Set the timer timeout value from the BSP config */
         *MCF5206E_TRR(MBAR, 1) = rtems_configuration_get_microseconds_per_tick() - 1;
 
         /* Feed system frequency to the timer */
         *MCF5206E_TMR(MBAR, 1) |= MCF5206E_TMR_ICLK_MSCLK;
-            
+
         /* Enable timer 1 interrupts */
         *MCF5206E_IMR(MBAR) &= ~MCF5206E_INTR_BIT(MCF5206E_INTR_TIMER_1);
-        
+
         /* Register the driver exit procedure so we can shutdown */
         atexit(Clock_exit);
     }
@@ -166,10 +166,10 @@ Clock_initialize(rtems_device_major_number major,
                  void *pargp)
 {
     Install_clock (Clock_isr);
- 
+
     /* Make major/minor avail to others such as shared memory driver */
     rtems_clock_major = major;
     rtems_clock_minor = minor;
- 
+
     return RTEMS_SUCCESSFUL;
 }
diff --git a/c/src/lib/libcpu/m68k/mcf5206/console/mcfuart.c b/c/src/lib/libcpu/m68k/mcf5206/console/mcfuart.c
index 810476e132..d17e63423b 100644
--- a/c/src/lib/libcpu/m68k/mcf5206/console/mcfuart.c
+++ b/c/src/lib/libcpu/m68k/mcf5206/console/mcfuart.c
@@ -21,7 +21,7 @@
 #include <rtems/libio.h>
 #include "mcf5206/mcfuart.h"
 
-/* 
+/*
  * int_driven_uart -- mapping between interrupt vector number and
  * UART descriptor structures
  */
@@ -33,7 +33,7 @@ static struct {
 /* Forward function declarations */
 static rtems_isr
 mcfuart_interrupt_handler(rtems_vector_number vec);
-         
+
 /*
  * mcfuart_init --
  *     This function verifies the input parameters and perform initialization
@@ -56,14 +56,14 @@ mcfuart_init(mcfuart *uart, void *tty, uint8_t   intvec,
 {
     if (uart == NULL)
         return RTEMS_INVALID_ADDRESS;
-    
+
     if ((chn <= 0) || (chn > MCF5206E_UART_CHANNELS))
         return RTEMS_INVALID_NUMBER;
-    
+
     uart->chn = chn;
     uart->intvec = intvec;
     uart->tty = tty;
-    
+
     return RTEMS_SUCCESSFUL;
 }
 
@@ -107,9 +107,9 @@ mcfuart_set_baudrate(mcfuart *uart, speed_t baud)
 #endif
         default:      rate = 9600; break;
     }
-        
+
     div = SYSTEM_CLOCK_FREQUENCY / (rate * 32);
-    
+
     *MCF5206E_UBG1(MBAR,uart->chn) = (uint8_t)((div >> 8) & 0xff);
     *MCF5206E_UBG2(MBAR,uart->chn) = (uint8_t)(div & 0xff);
 }
@@ -136,16 +136,16 @@ mcfuart_reset(mcfuart *uart)
 {
     register uint32_t   chn;
     rtems_status_code rc;
-    
+
     if (uart == NULL)
         return RTEMS_INVALID_ADDRESS;
-    
+
     chn = uart->chn;
-    
+
     /* Reset the receiver and transmitter */
     *MCF5206E_UCR(MBAR,chn) = MCF5206E_UCR_MISC_RESET_RX;
     *MCF5206E_UCR(MBAR,chn) = MCF5206E_UCR_MISC_RESET_TX;
-    
+
     /*
      * Program the vector number for a UART module interrupt, or
      * disable UART interrupts if polled I/O. Enable the desired
@@ -170,16 +170,16 @@ mcfuart_reset(mcfuart *uart)
     {
         *MCF5206E_UIMR(MBAR,chn) = 0;
     }
-    
+
     /* Select the receiver and transmitter clock. */
     mcfuart_set_baudrate(uart, B19200); /* dBUG defaults (unfortunately,
                                            it is differ to termios default */
-    *MCF5206E_UCSR(MBAR,chn) = 
+    *MCF5206E_UCSR(MBAR,chn) =
         MCF5206E_UCSR_RCS_TIMER | MCF5206E_UCSR_TCS_TIMER;
-    
+
     /* Mode Registers 1,2 - set termios defaults (8N1) */
     *MCF5206E_UCR(MBAR,chn) = MCF5206E_UCR_MISC_RESET_MR;
-    *MCF5206E_UMR(MBAR,chn) = 
+    *MCF5206E_UMR(MBAR,chn) =
 /*      MCF5206E_UMR1_RXRTS | */
         MCF5206E_UMR1_PM_NO_PARITY |
         MCF5206E_UMR1_BC_8;
@@ -187,12 +187,12 @@ mcfuart_reset(mcfuart *uart)
         MCF5206E_UMR2_CM_NORMAL |
 /*      MCF5206E_UMR2_TXCTS | */
         MCF5206E_UMR2_SB_1;
-    
+
     /* Enable Receiver and Transmitter */
     *MCF5206E_UCR(MBAR,chn) = MCF5206E_UCR_MISC_RESET_ERR;
     *MCF5206E_UCR(MBAR,chn) = MCF5206E_UCR_TC_ENABLE;
     *MCF5206E_UCR(MBAR,chn) = MCF5206E_UCR_RC_ENABLE;
-    
+
     return RTEMS_SUCCESSFUL;
 }
 
@@ -212,7 +212,7 @@ rtems_status_code
 mcfuart_disable(mcfuart *uart)
 {
     rtems_status_code rc;
-    *MCF5206E_UCR(MBAR,uart->chn) = 
+    *MCF5206E_UCR(MBAR,uart->chn) =
         MCF5206E_UCR_TC_DISABLE |
         MCF5206E_UCR_RC_DISABLE;
     if (uart->intvec != 0)
@@ -247,18 +247,18 @@ mcfuart_set_attributes(mcfuart *uart, const struct termios *t)
     int level;
     speed_t baud;
     uint8_t   umr1, umr2;
-    
+
     baud = cfgetospeed(t);
     umr1 = 0;
     umr2 = MCF5206E_UMR2_CM_NORMAL;
-    
+
     /* Set flow control */
     if ((t->c_cflag & CRTSCTS) != 0)
     {
         umr1 |= MCF5206E_UMR1_RXRTS;
         umr2 |= MCF5206E_UMR2_TXCTS;
     }
-    
+
     /* Set character size */
     switch (t->c_cflag & CSIZE)
     {
@@ -267,7 +267,7 @@ mcfuart_set_attributes(mcfuart *uart, const struct termios *t)
         case CS7: umr1 |= MCF5206E_UMR1_BC_7; break;
         case CS8: umr1 |= MCF5206E_UMR1_BC_8; break;
     }
-    
+
     /* Set number of stop bits */
     if ((t->c_cflag & CSTOPB) != 0)
     {
@@ -291,7 +291,7 @@ mcfuart_set_attributes(mcfuart *uart, const struct termios *t)
             umr2 |= MCF5206E_UMR2_SB_1;
         }
     }
-    
+
     /* Set parity mode */
     if ((t->c_cflag & PARENB) != 0)
     {
@@ -308,9 +308,9 @@ mcfuart_set_attributes(mcfuart *uart, const struct termios *t)
     {
         umr1 |= MCF5206E_UMR1_PM_NO_PARITY;
     }
-    
+
     rtems_interrupt_disable(level);
-    *MCF5206E_UCR(MBAR,uart->chn) = 
+    *MCF5206E_UCR(MBAR,uart->chn) =
         MCF5206E_UCR_TC_DISABLE | MCF5206E_UCR_RC_DISABLE;
     mcfuart_set_baudrate(uart, baud);
     *MCF5206E_UCR(MBAR,uart->chn) = MCF5206E_UCR_MISC_RESET_MR;
@@ -318,7 +318,7 @@ mcfuart_set_attributes(mcfuart *uart, const struct termios *t)
     *MCF5206E_UMR(MBAR,uart->chn) = umr2;
     if ((t->c_cflag & CREAD) != 0)
     {
-        *MCF5206E_UCR(MBAR,uart->chn) = 
+        *MCF5206E_UCR(MBAR,uart->chn) =
             MCF5206E_UCR_TC_ENABLE | MCF5206E_UCR_RC_ENABLE;
     }
     else
@@ -326,7 +326,7 @@ mcfuart_set_attributes(mcfuart *uart, const struct termios *t)
         *MCF5206E_UCR(MBAR,uart->chn) = MCF5206E_UCR_TC_ENABLE;
     }
     rtems_interrupt_enable(level);
-    
+
     return RTEMS_SUCCESSFUL;
 }
 
@@ -423,7 +423,7 @@ mcfuart_interrupt_handler(rtems_vector_number vec)
     register uint8_t   uisr;
     register int chn;
     register int bp = 0;
-    
+
     /* Find UART descriptor from vector number */
     if (int_driven_uart[0].vec == vec)
         uart = int_driven_uart[0].uart;
@@ -431,15 +431,15 @@ mcfuart_interrupt_handler(rtems_vector_number vec)
         uart = int_driven_uart[1].uart;
     else
         return;
-    
+
     chn = uart->chn;
-    
+
     uisr = *MCF5206E_UISR(MBAR, chn);
     if (uisr & MCF5206E_UISR_DB)
     {
         *MCF5206E_UCR(MBAR, chn) = MCF5206E_UCR_MISC_RESET_BRK;
     }
-    
+
     /* Receiving */
     while (1)
     {
@@ -465,9 +465,9 @@ mcfuart_interrupt_handler(rtems_vector_number vec)
             {
                 buf[bp++] = *MCF5206E_URB(MBAR, chn);
             }
-            
+
             /* Reset error condition if any errors has been detected */
-            if (usr & (MCF5206E_USR_RB | MCF5206E_USR_FE | 
+            if (usr & (MCF5206E_USR_RB | MCF5206E_USR_FE |
                        MCF5206E_USR_PE | MCF5206E_USR_OE))
             {
                 *MCF5206E_UCR(MBAR, chn) = MCF5206E_UCR_MISC_RESET_ERR;
@@ -480,7 +480,7 @@ mcfuart_interrupt_handler(rtems_vector_number vec)
             break;
         }
     }
-    
+
     /* Transmitting */
     while (1)
     {
@@ -525,7 +525,7 @@ mcfuart_interrupt_write(mcfuart *uart, const char *buf, int len)
     uart->tx_buf = buf;
     uart->tx_buf_len = len;
     uart->tx_ptr = 0;
-    *MCF5206E_UIMR(MBAR, uart->chn) = 
+    *MCF5206E_UIMR(MBAR, uart->chn) =
             MCF5206E_UIMR_FFULL | MCF5206E_UIMR_TXRDY;
     while (((*MCF5206E_USR(MBAR,uart->chn) & MCF5206E_USR_TXRDY) != 0) &&
            (uart->tx_ptr < uart->tx_buf_len))
diff --git a/c/src/lib/libcpu/m68k/mcf5206/mbus/mcfmbus.c b/c/src/lib/libcpu/m68k/mcf5206/mbus/mcfmbus.c
index a4bfa72986..6433837a55 100644
--- a/c/src/lib/libcpu/m68k/mcf5206/mbus/mcfmbus.c
+++ b/c/src/lib/libcpu/m68k/mcf5206/mbus/mcfmbus.c
@@ -181,7 +181,7 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
                 case EVENT_NEXTMSG:  /* Start new message processing */
                     bus->cmsg++;
                     /* FALLTHRU */
-                
+
                 case EVENT_TRANSFER: /* Initiate new transfer */
                     if (bus->cmsg - bus->msg >= bus->nmsg)
                     {
@@ -192,7 +192,7 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
                         bus->done(bus->done_arg_ptr);
                         break;
                     }
-                    
+
                     /* Initiate START or REPEATED START condition on the bus */
                     if (event == EVENT_TRANSFER)
                     {
@@ -202,10 +202,10 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
                     {
                         mcfmbus_rstart(bus);
                     }
-                    
+
                     bus->byte = 0;
                     mcfmbus_tx_mode(bus);
-                    
+
                     /* Initiate slave address sending */
                     if (bus->cmsg->flags & I2C_MSG_ADDR_10)
                     {
@@ -239,13 +239,13 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
                         mcfmbus_send(bus, b);
                     }
                     break;
-                
+
                 default:
                     mcfmbus_machine_error(bus, event);
                     break;
             }
             break;
-        
+
         case STATE_ADDR_7:
             switch (event)
             {
@@ -257,7 +257,7 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
                         mcfmbus_send_ack(bus);
                     next_state(bus, STATE_RECEIVING);
                     break;
-                
+
                 case EVENT_NACK:
                     mcfmbus_error(bus, I2C_NO_DEVICE);
                     next_state(bus, STATE_IDLE);
@@ -269,14 +269,14 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
                     next_state(bus, STATE_IDLE);
                     mcfmbus_machine(bus, EVENT_NEXTMSG);
                     break;
-                    
+
                 default:
                     mcfmbus_machine_error(bus, event);
                     break;
             }
             break;
 
-        case STATE_ADDR_1_R:         
+        case STATE_ADDR_1_R:
         case STATE_ADDR_1_W:
             switch (event)
             {
@@ -300,25 +300,25 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
                     }
                     break;
                 }
-                
+
                 case EVENT_NACK:
                     mcfmbus_error(bus, I2C_NO_DEVICE);
                     next_state(bus, STATE_IDLE);
                     mcfmbus_machine(bus, EVENT_NEXTMSG);
                     break;
-                
+
                 case EVENT_ARB_LOST:
                     mcfmbus_error(bus, I2C_ARBITRATION_LOST);
                     next_state(bus, STATE_IDLE);
                     mcfmbus_machine(bus, EVENT_NEXTMSG);
                     break;
-                
+
                 default:
                     mcfmbus_machine_error(bus, event);
                     break;
             }
             break;
-             
+
         case STATE_SENDING:
             switch (event)
             {
@@ -334,7 +334,7 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
                         next_state(bus, STATE_SENDING);
                     }
                     break;
-                    
+
                 case EVENT_NACK:
                     if (bus->byte == 0)
                     {
@@ -347,20 +347,20 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
                     next_state(bus, STATE_IDLE);
                     mcfmbus_machine(bus, EVENT_NEXTMSG);
                     break;
-                    
+
                 case EVENT_ARB_LOST:
                     mcfmbus_error(bus, I2C_ARBITRATION_LOST);
                     next_state(bus, STATE_IDLE);
                     mcfmbus_machine(bus, EVENT_NEXTMSG);
                     break;
-                
+
                 default:
                     mcfmbus_machine_error(bus, event);
                     break;
-                    
+
             }
             break;
-                
+
         case STATE_RECEIVING:
             switch (event)
             {
@@ -463,7 +463,7 @@ mcfmbus_select_clock_divider(mcfmbus *i2c_bus, int divider)
         int divider;
         int mbc;
     } dividers[] ={
-        { 20,   0x20 }, { 22,   0x21 }, { 24,   0x22 }, { 26,   0x23 }, 
+        { 20,   0x20 }, { 22,   0x21 }, { 24,   0x22 }, { 26,   0x23 },
         { 28,   0x00 }, { 30,   0x01 }, { 32,   0x25 }, { 34,   0x02 },
         { 36,   0x26 }, { 40,   0x03 }, { 44,   0x04 }, { 48,   0x05 },
         { 56,   0x06 }, { 64,   0x2a }, { 68,   0x07 }, { 72,   0x2B },
@@ -480,7 +480,7 @@ mcfmbus_select_clock_divider(mcfmbus *i2c_bus, int divider)
 
     if (i2c_bus == NULL)
         return RTEMS_INVALID_ADDRESS;
-    
+
     for (i = 0, mbc = -1; i < sizeof(dividers)/sizeof(dividers[0]); i++)
     {
         mbc = dividers[i].mbc;
@@ -511,20 +511,20 @@ mcfmbus_initialize(mcfmbus *i2c_bus, uint32_t   base)
 
     if (mbus != NULL) /* Check if already initialized */
         return RTEMS_RESOURCE_IN_USE;
-        
+
     if (i2c_bus == NULL)
         return RTEMS_INVALID_ADDRESS;
 
-    
+
     i2c_bus->base = base;
     i2c_bus->state = STATE_IDLE;
     i2c_bus->msg = NULL;
     i2c_bus->cmsg = NULL;
     i2c_bus->nmsg = 0;
     i2c_bus->byte = 0;
-    
+
     sc = rtems_interrupt_catch(
-        mcfmbus_interrupt_handler, 
+        mcfmbus_interrupt_handler,
         24 + ((*MCF5206E_ICR(base, MCF5206E_INTR_MBUS) & MCF5206E_ICR_IL) >>
                                    MCF5206E_ICR_IL_S),
         &i2c_bus->oldisr
@@ -540,7 +540,7 @@ mcfmbus_initialize(mcfmbus *i2c_bus, uint32_t   base)
     *MCF5206E_MBDR(base) = 0x1F; /* Maximum possible divider is 3840 */
     *MCF5206E_MBCR(base) = MCF5206E_MBCR_MEN | MCF5206E_MBCR_MIEN;
     rtems_interrupt_enable(level);
-    
+
     return RTEMS_SUCCESSFUL;
 }
 
@@ -565,7 +565,7 @@ mcfmbus_i2c_transfer(mcfmbus *bus, int nmsg, i2c_message *msg,
 {
     if (bus != mbus)
         return RTEMS_NOT_CONFIGURED;
-    
+
     bus->done = done;
     bus->done_arg_ptr = done_arg_ptr;
     bus->cmsg = bus->msg = msg;
@@ -594,12 +594,12 @@ mcfmbus_i2c_done(mcfmbus *i2c_bus)
     uint32_t   base;
     if (mbus == NULL)
         return RTEMS_NOT_CONFIGURED;
-    
+
     if (mbus != i2c_bus)
         return RTEMS_INVALID_ADDRESS;
-    
+
     base = i2c_bus->base;
-    
+
     *MCF5206E_IMR(base) |= MCF5206E_INTR_BIT(MCF5206E_INTR_MBUS);
     *MCF5206E_MBCR(base) = 0;
 
diff --git a/c/src/lib/libcpu/m68k/mcf5206/timer/timer.c b/c/src/lib/libcpu/m68k/mcf5206/timer/timer.c
index 3d30b98dcc..8dbb9d8613 100644
--- a/c/src/lib/libcpu/m68k/mcf5206/timer/timer.c
+++ b/c/src/lib/libcpu/m68k/mcf5206/timer/timer.c
@@ -18,7 +18,7 @@
  *  found in the file LICENSE in this distribution or at
  *
  *  http://www.rtems.com/license/LICENSE.
- * 
+ *
  *  $Id$
  */
 
@@ -26,7 +26,7 @@
 #include <bsp.h>
 #include "mcf5206/mcf5206e.h"
 
-#define TRR2_VAL 65530  
+#define TRR2_VAL 65530
 
 uint32_t   Timer_interrupts;
 
@@ -50,16 +50,16 @@ benchmark_timer_initialize(void)
 {
     /* Catch timer2 interrupts */
     set_vector(timerisr, BSP_INTVEC_TIMER2, 0);
-    
+
     /* Initialize interrupts for timer2 */
     *MCF5206E_ICR(MBAR, MCF5206E_INTR_TIMER_2) =
         MCF5206E_ICR_AVEC |
         ((BSP_INTLVL_TIMER2 << MCF5206E_ICR_IL_S) & MCF5206E_ICR_IL) |
         ((BSP_INTPRIO_TIMER2 << MCF5206E_ICR_IP_S) & MCF5206E_ICR_IP);
-        
+
     /* Enable interrupts from timer2 */
     *MCF5206E_IMR(MBAR) &= ~MCF5206E_INTR_BIT(MCF5206E_INTR_TIMER_2);
-    
+
     /* Reset Timer */
     *MCF5206E_TMR(MBAR, 2) = MCF5206E_TMR_RST;
     *MCF5206E_TMR(MBAR, 2) = MCF5206E_TMR_ICLK_STOP;
@@ -113,13 +113,13 @@ benchmark_timer_read( void )
      *  rolled over.
      */
     clicks = *MCF5206E_TCN(MBAR, 2);
-  
+
     /* Stop Timer... */
     *MCF5206E_TMR(MBAR, 2) = MCF5206E_TMR_ICLK_STOP |
                              MCF5206E_TMR_RST;
 
     /*
-     *  Total is calculated by taking into account the number of timer 
+     *  Total is calculated by taking into account the number of timer
      *  overflow interrupts since the timer was initialized and clicks
      *  since the last interrupts.
      */