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authorHesham ALMatary <heshamelmatary@gmail.com>2021-09-30 16:33:48 -0500
committerJoel Sherrill <joel@rtems.org>2021-10-13 14:45:37 -0500
commit0f62af0ef88606773582643fdc6eae01e26a103c (patch)
tree7eb0ebab1c46e57e92934d1322b86d4e9ef2e0df /c
parentedf8b49ee54935e94bbdee877e318e8b47c2fd57 (diff)
downloadrtems-0f62af0ef88606773582643fdc6eae01e26a103c.tar.bz2
bsps: Add MicroBlaze FPGA BSP
Diffstat (limited to 'c')
-rw-r--r--c/src/lib/libbsp/microblaze/microblaze_fpga/console/console-io.c74
-rw-r--r--c/src/lib/libbsp/microblaze/microblaze_fpga/include/bsp.h48
-rw-r--r--c/src/lib/libbsp/microblaze/microblaze_fpga/include/tm27.h48
-rw-r--r--c/src/lib/libbsp/microblaze/microblaze_fpga/start/start.S109
-rw-r--r--c/src/lib/libbsp/microblaze/microblaze_fpga/startup/_exception_handler.S38
-rw-r--r--c/src/lib/libbsp/microblaze/microblaze_fpga/startup/_interrupt_handler.S38
-rw-r--r--c/src/lib/libbsp/microblaze/microblaze_fpga/startup/sim-crtinit.S85
-rw-r--r--c/src/lib/libbsp/microblaze/shared/include/linker-symbols.h104
8 files changed, 544 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/microblaze/microblaze_fpga/console/console-io.c b/c/src/lib/libbsp/microblaze/microblaze_fpga/console/console-io.c
new file mode 100644
index 0000000000..47592967ac
--- /dev/null
+++ b/c/src/lib/libbsp/microblaze/microblaze_fpga/console/console-io.c
@@ -0,0 +1,74 @@
+/**
+ * @file
+ *
+ * @ingroup microblaze_uart
+ *
+ * @brief Console Configuration.
+ */
+
+/*
+ * Copyright (C) 2015 Hesham Almatary
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <rtems/bspIo.h>
+
+#include <libchip/serial.h>
+
+#include <bspopts.h>
+#include <bsp/uart.h>
+
+console_tbl Console_Configuration_Ports [] = {
+ {
+ .sDeviceName = "/dev/ttyS0",
+ .deviceType = SERIAL_CUSTOM,
+ .pDeviceFns = &microblaze_uart_fns,
+ .deviceProbe = NULL,
+ .pDeviceFlow = NULL,
+ .ulCtrlPort1 = UART_BASEADDRESS,
+ .ulCtrlPort2 = 0,
+ .ulClock = 9600,
+ .ulIntVector = 0
+ }
+};
+
+#define PORT_COUNT \
+ (sizeof(Console_Configuration_Ports) \
+ / sizeof(Console_Configuration_Ports [0]))
+
+unsigned long Console_Configuration_Count = PORT_COUNT;
+
+static void output_char(char c)
+{
+ const console_fns *con =
+ Console_Configuration_Ports [Console_Port_Minor].pDeviceFns;
+
+ if (c == '\n') {
+ con->deviceWritePolled((int) Console_Port_Minor, '\r');
+ }
+ con->deviceWritePolled((int) Console_Port_Minor, c);
+}
+
+BSP_output_char_function_type BSP_output_char = output_char;
+
+BSP_polling_getchar_function_type BSP_poll_char = NULL;
diff --git a/c/src/lib/libbsp/microblaze/microblaze_fpga/include/bsp.h b/c/src/lib/libbsp/microblaze/microblaze_fpga/include/bsp.h
new file mode 100644
index 0000000000..cb72835571
--- /dev/null
+++ b/c/src/lib/libbsp/microblaze/microblaze_fpga/include/bsp.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2015 Hesham Almatary
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _BSP_H
+#define _BSP_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <bspopts.h>
+
+#include <rtems.h>
+#include <rtems/iosupp.h>
+#include <rtems/console.h>
+#include <rtems/clockdrv.h>
+
+/* support for simulated clock tick */
+Thread clock_driver_sim_idle_body(uintptr_t);
+#define BSP_IDLE_TASK_BODY clock_driver_sim_idle_body
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/c/src/lib/libbsp/microblaze/microblaze_fpga/include/tm27.h b/c/src/lib/libbsp/microblaze/microblaze_fpga/include/tm27.h
new file mode 100644
index 0000000000..393990157f
--- /dev/null
+++ b/c/src/lib/libbsp/microblaze/microblaze_fpga/include/tm27.h
@@ -0,0 +1,48 @@
+/*
+ * COPYRIGHT (c) 1989-2011.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTEMS_TMTEST27
+#error "This is an RTEMS internal file you must not include directly."
+#endif
+
+#ifndef __tm27_h
+#define __tm27_h
+
+/*
+ * Define the interrupt mechanism for Time Test 27
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector( handler ) /* set_vector( (handler), 6, 1 ) */
+
+#define Cause_tm27_intr() /* XXX */
+
+#define Clear_tm27_intr() /* XXX */
+
+#define Lower_tm27_intr() /* empty */
+
+#endif
diff --git a/c/src/lib/libbsp/microblaze/microblaze_fpga/start/start.S b/c/src/lib/libbsp/microblaze/microblaze_fpga/start/start.S
new file mode 100644
index 0000000000..bb3dc3dd65
--- /dev/null
+++ b/c/src/lib/libbsp/microblaze/microblaze_fpga/start/start.S
@@ -0,0 +1,109 @@
+/* Copyright (c) 2001, 2009 Xilinx, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are
+ met:
+
+ 1. Redistributions source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+ 3. Neither the name of Xilinx nor the names of its contributors may be
+ used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
+ IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
+ XMD load *.elf error:
+ MicroBlaze Vector Map for standalone executables
+
+ Address Vector type Label
+ ------- ----------- ------
+
+ # 0x00 # (-- IMM --)
+ # 0x04 # Reset _start1
+
+ # 0x08 # (-- IMM --)
+ # 0x0c # Software Exception _exception_handler
+
+ # 0x10 # (-- IMM --)
+ # 0x14 # Hardware Interrupt _interrupt_handler
+
+ # 0x18 # (-- IMM --)
+ # 0x1C # Breakpoint Exception (-- Don't Care --)
+
+ # 0x20 # (-- IMM --)
+ # 0x24 # Hardware Exception _hw_exception_handler
+
+*/
+
+
+ .globl _start
+ .section .vectors.reset, "ax"
+ .align 2
+ .ent _start
+ .type _start, @function
+_start:
+ brai _start1
+ .end _start
+
+ .section .vectors.sw_exception, "ax"
+ .align 2
+_vector_sw_exception:
+ brai _exception_handler
+
+ .section .vectors.interrupt, "ax"
+ .align 2
+_vector_interrupt:
+ brai _interrupt_handler
+
+ .section .vectors.hw_exception, "ax"
+ .align 2
+_vector_hw_exception:
+ brai _hw_exception_handler
+
+ .section .text
+ .globl _start1
+ .align 2
+ .ent _start1
+ .type _start1, @function
+_start1:
+ //la r13, r0, _SDA_BASE_ /* Set the Small Data Anchors and the stack pointer */
+ //la r2, r0, _SDA2_BASE_
+ la r1, r0, bsp_section_stack_begin-16 /* 16 bytes (4 words are needed by crtinit for args and link reg */
+
+ brlid r15, _crtinit /* Initialize BSS and run program */
+ nop
+
+ brlid r15, exit /* Call exit with the return value of main */
+ addik r5, r3, 0
+
+ /* Control does not reach here */
+ .end _start1
+
+
+/*
+ _exit
+ Our simple _exit
+*/
+ .globl _exit
+ .align 2
+ .ent _exit
+ .type _exit, @function
+_exit:
+ bri 0
+ .end _exit
diff --git a/c/src/lib/libbsp/microblaze/microblaze_fpga/startup/_exception_handler.S b/c/src/lib/libbsp/microblaze/microblaze_fpga/startup/_exception_handler.S
new file mode 100644
index 0000000000..dd9fee22f6
--- /dev/null
+++ b/c/src/lib/libbsp/microblaze/microblaze_fpga/startup/_exception_handler.S
@@ -0,0 +1,38 @@
+/* Copyright (c) 2001, 2009 Xilinx, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are
+ met:
+
+ 1. Redistributions source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+ 3. Neither the name of Xilinx nor the names of its contributors may be
+ used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
+ IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+ .text
+ .globl _exception_handler # Exception Handler Label
+ .align 2
+
+ _exception_handler:
+ rtsd r17, 0
+ nop
diff --git a/c/src/lib/libbsp/microblaze/microblaze_fpga/startup/_interrupt_handler.S b/c/src/lib/libbsp/microblaze/microblaze_fpga/startup/_interrupt_handler.S
new file mode 100644
index 0000000000..50326c1a93
--- /dev/null
+++ b/c/src/lib/libbsp/microblaze/microblaze_fpga/startup/_interrupt_handler.S
@@ -0,0 +1,38 @@
+/* Copyright (c) 2001, 2009 Xilinx, Inc. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are
+ met:
+
+ 1. Redistributions source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+ 3. Neither the name of Xilinx nor the names of its contributors may be
+ used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
+ IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+ .text
+ .globl _interrupt_handler # Interrupt Handler Label
+ .align 2
+
+ _interrupt_handler:
+ rtid r14, 0
+ nop
diff --git a/c/src/lib/libbsp/microblaze/microblaze_fpga/startup/sim-crtinit.S b/c/src/lib/libbsp/microblaze/microblaze_fpga/startup/sim-crtinit.S
new file mode 100644
index 0000000000..0cefb63116
--- /dev/null
+++ b/c/src/lib/libbsp/microblaze/microblaze_fpga/startup/sim-crtinit.S
@@ -0,0 +1,85 @@
+## Copyright (c) 2015, Hesham Almatary
+## Copyright (c) 2001, 2009 Xilinx, Inc. All rights reserved.
+##
+## Redistribution and use in source and binary forms, with or without
+## modification, are permitted provided that the following conditions are
+## met:
+##
+## 1. Redistributions source code must retain the above copyright notice,
+## this list of conditions and the following disclaimer.
+##
+## 2. Redistributions in binary form must reproduce the above copyright
+## notice, this list of conditions and the following disclaimer in the
+## documentation and/or other materials provided with the distribution.
+##
+## 3. Neither the name of Xilinx nor the names of its contributors may be
+## used to endorse or promote products derived from this software without
+## specific prior written permission.
+##
+## THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
+## IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+## TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+## PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+## HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+## SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+## TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+## PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+## LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+## NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+## SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#
+# sim-crtinit.s
+#
+# Default second stage of C run-time initialization that does not peform
+# BSS initialization to zero. Typical use is on a simulator.
+#
+
+ .globl _crtinit
+ .align 2
+ .ent _crtinit
+
+_crtinit:
+ addi r1, r1, -20 /* Save Link register */
+ swi r15, r1, 0
+
+#ifndef __rtems__
+ brlid r15, _program_init /* Initialize the program */
+ nop
+
+ brlid r15, __init /* Invoke language initialization functions */
+ nop
+#endif
+
+
+ /* Init .bss */
+ addi r6, r0, bsp_section_bss_begin
+ addi r7, r0, bsp_section_bss_end
+
+_clear_bss_loop:
+ swi r0, r6, 0
+
+ addi r6, r6, 4
+ cmpu r8, r6, r7
+ bgti r8, _clear_bss_loop
+
+ addi r6, r0, 0 /* Initialize argc = 1 and argv = NULL and envp = NULL */
+ addi r7, r0, 0
+ brlid r15, boot_card /* Execute the program */
+ addi r5, r0, 0
+
+ addik r19, r3, 0 /* Save return value */
+
+#ifndef __rtems__
+ brlid r15, __fini /* Invoke language cleanup functions */
+ nop
+
+ brlid r15, _program_clean /* Cleanup the program */
+ nop
+#endif
+
+ lw r15, r1, r0 /* Return back to CRT */
+ addik r3, r19, 0 /* Restore return value */
+ rtsd r15, 8
+ addi r1, r1, 20
+ .end _crtinit
diff --git a/c/src/lib/libbsp/microblaze/shared/include/linker-symbols.h b/c/src/lib/libbsp/microblaze/shared/include/linker-symbols.h
new file mode 100644
index 0000000000..60a5057486
--- /dev/null
+++ b/c/src/lib/libbsp/microblaze/shared/include/linker-symbols.h
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2015 Hesham Almatary
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_MICROBLAZE_SHARED_LINKER_SYMBOLS_H
+#define LIBBSP_MICROBLAZE_SHARED_LINKER_SYMBOLS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * @defgroup microblaze Linker Support
+ *
+ * @ingroup microblaze_shared
+ *
+ * @brief Linker support.
+ *
+ * @{
+ */
+
+#ifndef ASM
+ #define LINKER_SYMBOL(sym) extern char sym [];
+#else
+ #define LINKER_SYMBOL(sym) .extern sym
+#endif
+
+LINKER_SYMBOL(bsp_section_start_begin)
+LINKER_SYMBOL(bsp_section_start_end)
+LINKER_SYMBOL(bsp_section_start_size)
+
+LINKER_SYMBOL(bsp_section_vector_begin)
+LINKER_SYMBOL(bsp_section_vector_end)
+LINKER_SYMBOL(bsp_section_vector_size)
+
+LINKER_SYMBOL(bsp_section_text_begin)
+LINKER_SYMBOL(bsp_section_text_end)
+LINKER_SYMBOL(bsp_section_text_size)
+LINKER_SYMBOL(bsp_section_text_load_begin)
+LINKER_SYMBOL(bsp_section_text_load_end)
+
+LINKER_SYMBOL(bsp_section_rodata_begin)
+LINKER_SYMBOL(bsp_section_rodata_end)
+LINKER_SYMBOL(bsp_section_rodata_size)
+LINKER_SYMBOL(bsp_section_rodata_load_begin)
+LINKER_SYMBOL(bsp_section_rodata_load_end)
+
+LINKER_SYMBOL(bsp_section_data_begin)
+LINKER_SYMBOL(bsp_section_data_end)
+LINKER_SYMBOL(bsp_section_data_size)
+LINKER_SYMBOL(bsp_section_data_load_begin)
+LINKER_SYMBOL(bsp_section_data_load_end)
+
+LINKER_SYMBOL(bsp_section_bss_begin)
+LINKER_SYMBOL(bsp_section_bss_end)
+LINKER_SYMBOL(bsp_section_bss_size)
+
+LINKER_SYMBOL(bsp_section_work_begin)
+LINKER_SYMBOL(bsp_section_work_end)
+LINKER_SYMBOL(bsp_section_work_size)
+
+LINKER_SYMBOL(bsp_section_stack_begin)
+LINKER_SYMBOL(bsp_section_stack_end)
+LINKER_SYMBOL(bsp_section_stack_size)
+
+LINKER_SYMBOL(bsp_vector_table_begin)
+LINKER_SYMBOL(bsp_vector_table_end)
+LINKER_SYMBOL(bsp_vector_table_size)
+
+LINKER_SYMBOL(bsp_start_vector_table_begin)
+LINKER_SYMBOL(bsp_start_vector_table_end)
+LINKER_SYMBOL(bsp_start_vector_table_size)
+
+LINKER_SYMBOL(bsp_translation_table_base)
+LINKER_SYMBOL(bsp_translation_table_end)
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_MICROBLAZE_SHARED_LINKER_SYMBOLS_H */