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| author | Christian Mauderer <Christian.Mauderer@embedded-brains.de> | 2018-01-11 08:54:27 +0100 |
|---|---|---|
| committer | Christian Mauderer <christian.mauderer@embedded-brains.de> | 2018-02-12 14:25:02 +0100 |
| commit | 03fecae9c4236b6e2d24b67bd3940576f2880fee (patch) | |
| tree | f1c14549a735a9dd45737c97d8b51855dfe47f8f /c | |
| parent | fsclose01: Fix task mode, use attribute (diff) | |
| download | rtems-03fecae9c4236b6e2d24b67bd3940576f2880fee.tar.bz2 | |
bsp/atsam: Add option to disable 32kHz XTAL.
Diffstat (limited to 'c')
| -rw-r--r-- | c/src/lib/libbsp/arm/atsam/README | 4 | ||||
| -rw-r--r-- | c/src/lib/libbsp/arm/atsam/configure.ac | 8 | ||||
| -rw-r--r-- | c/src/lib/libbsp/arm/atsam/libraries/libboard/resources_v71/system_samv71.c | 2 |
3 files changed, 14 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/atsam/README b/c/src/lib/libbsp/arm/atsam/README index c374e861c3..2ebaa726c8 100644 --- a/c/src/lib/libbsp/arm/atsam/README +++ b/c/src/lib/libbsp/arm/atsam/README @@ -43,6 +43,10 @@ const struct BOARD_Sdram_Config BOARD_Sdram_Config = { }; -------- +Use ATSAM_SLOWCLOCK_USE_XTAL=0 to disable the usage of the external 32kHz +oscillator for the slow clock. This is useful for example for the SAM E70 +Xplained kit. + Use ATSAM_CONSOLE_BAUD=XYZ to set the initial baud for console devices (default 115200). diff --git a/c/src/lib/libbsp/arm/atsam/configure.ac b/c/src/lib/libbsp/arm/atsam/configure.ac index 519d5237f6..3ebeb93255 100644 --- a/c/src/lib/libbsp/arm/atsam/configure.ac +++ b/c/src/lib/libbsp/arm/atsam/configure.ac @@ -72,6 +72,14 @@ RTEMS_BSPOPTS_HELP([ATSAM_MCK], [Frequency of the MCK in Hz. Set to 0 to force application defined speed. See startup/pmc-config.c for available clock configurations.]) +RTEMS_BSPOPTS_SET([ATSAM_SLOWCLOCK_USE_XTAL],[*],[1]) +RTEMS_BSPOPTS_HELP([ATSAM_SLOWCLOCK_USE_XTAL], +[Use the external crystal as source for the slow clock instead of the internal +RC oscillator. Note that on the ATSAM the NRST pin seems to depend on the slow +clock as well as all watchdogs. If ATSAM_SLOWCLOCK_USE_XTAL is set to 1 without +a external crystal connected, the controller might hang in the switching process +without a working NRST pin. ]) + RTEMS_BSPOPTS_SET([ATSAM_CHANGE_CLOCK_FROM_SRAM],[*],[0]) RTEMS_BSPOPTS_HELP([ATSAM_CHANGE_CLOCK_FROM_SRAM], [Move the functions that set up the clock into the SRAM. diff --git a/c/src/lib/libbsp/arm/atsam/libraries/libboard/resources_v71/system_samv71.c b/c/src/lib/libbsp/arm/atsam/libraries/libboard/resources_v71/system_samv71.c index 8d7eb8e6a7..19c5a947b5 100644 --- a/c/src/lib/libbsp/arm/atsam/libraries/libboard/resources_v71/system_samv71.c +++ b/c/src/lib/libbsp/arm/atsam/libraries/libboard/resources_v71/system_samv71.c @@ -93,6 +93,7 @@ extern "C" { * OSC */ +#if ATSAM_SLOWCLOCK_USE_XTAL == 1 read_MOR = PMC->CKGR_MOR; /* enable external crystal - enable RC OSC */ read_MOR |= (CKGR_MOR_KEY_PASSWD | CKGR_MOR_XT32KFME); @@ -104,6 +105,7 @@ extern "C" { while (!(SUPC->SUPC_SR & SUPC_SR_OSCSEL)); } +#endif /* Initialize main oscillator */ if (!(PMC->CKGR_MOR & CKGR_MOR_MOSCSEL)) { |