arm/a9mpcore: Add support to get the clock via a weak linkage function.

This allows an application to provide a localised clock freq with
needing to go down the BSP opts path. This is important with the
Zynq where the Xilinx tools generate the frequency.

3 files changed, 46 insertions, 3 deletions

diff --git a/c/src/lib/libbsp/arm/shared/arm-a9mpcore-clock-config.c b/c/src/lib/libbsp/arm/shared/arm-a9mpcore-clock-config.c
index dbd720a923..85a62490fa 100644
--- a/c/src/lib/libbsp/arm/shared/arm-a9mpcore-clock-config.c
+++ b/c/src/lib/libbsp/arm/shared/arm-a9mpcore-clock-config.c
@@ -18,9 +18,19 @@
 
 #define A9MPCORE_PT ((volatile a9mpcore_pt *) BSP_ARM_A9MPCORE_PT_BASE)
 
+static uint64_t a9mpcore_clock_last_tick_k;
+
 /* This is defined in clockdrv_shell.h */
 void Clock_isr(rtems_irq_hdl_param arg);
 
+uint32_t a9mpcore_clock_periphclk(void) __attribute__ ((weak));
+
+uint32_t a9mpcore_clock_periphclk(void)
+{
+  /* default to the BSP option. */
+  return BSP_ARM_A9MPCORE_PERIPHCLK;
+}
+
 static void a9mpcore_clock_at_tick(void)
 {
   volatile a9mpcore_pt *pt = A9MPCORE_PT;
@@ -50,9 +60,12 @@ static void a9mpcore_clock_handler_install(void)
 static void a9mpcore_clock_initialize(void)
 {
   volatile a9mpcore_pt *pt = A9MPCORE_PT;
-  uint64_t interval = ((uint64_t) BSP_ARM_A9MPCORE_PERIPHCLK
+  uint64_t periphclk = (uint64_t) a9mpcore_clock_periphclk();
+  uint64_t interval = (periphclk
     * (uint64_t) rtems_configuration_get_microseconds_per_tick()) / 1000000;
 
+  a9mpcore_clock_last_tick_k = (1000000000ULL << 32) / periphclk;
+
   pt->load = (uint32_t) interval - 1;
   pt->ctrl = A9MPCORE_PT_CTRL_AUTO_RLD
     | A9MPCORE_PT_CTRL_IRQ_EN
@@ -83,7 +96,7 @@ static void a9mpcore_clock_cleanup(void)
 static uint32_t a9mpcore_clock_nanoseconds_since_last_tick(void)
 {
   volatile a9mpcore_pt *pt = A9MPCORE_PT;
-  uint64_t k = (1000000000ULL << 32) / BSP_ARM_A9MPCORE_PERIPHCLK;
+  uint64_t k = a9mpcore_clock_last_tick_k;
   uint32_t c = pt->cntr;
   uint32_t p = pt->load + 1;
 
diff --git a/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-clock.h b/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-clock.h
new file mode 100644
index 0000000000..3440b2b8bf
--- /dev/null
+++ b/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-clock.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2013 Chris Johns <chrisj@rtems.org>.  All rights reserved.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_SHARED_ARM_A9MPCORE_CLOCK_H
+#define LIBBSP_ARM_SHARED_ARM_A9MPCORE_CLOCK_H
+
+#include <bsp.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/*
+ * Return the peripheral clock. For systems such as the zynq this
+ * is controlled by the PL logic generation and can vary. Provide this
+ * function in your application to override the BSP default.
+ */
+uint32_t a9mpcore_clock_periphclk(void);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_SHARED_ARM_A9MPCORE_CLOCK_H */
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am b/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
index 99ad202a9f..52711fd05a 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
@@ -33,6 +33,7 @@ include_bsp_HEADERS += ../../shared/include/irq-info.h
 include_bsp_HEADERS += ../../shared/include/stackalloc.h
 include_bsp_HEADERS += ../../shared/tod.h
 include_bsp_HEADERS += ../shared/include/start.h
+include_bsp_HEADERS += ../shared/include/arm-a9mpcore-clock.h
 include_bsp_HEADERS += ../shared/include/arm-a9mpcore-irq.h
 include_bsp_HEADERS += ../shared/include/arm-a9mpcore-regs.h
 include_bsp_HEADERS += ../shared/include/arm-a9mpcore-start.h
@@ -127,7 +128,7 @@ libbsp_a_SOURCES += include/cache_.h
 libbsp_a_CPPFLAGS += -I$(srcdir)/include
 
 # Start hooks
-libbsp_a_SOURCES += startup/bspstarthooks.c
+libbsp_a_SOURCES += startup/bspstarthooks.c startup/bspstartmmu.c
 
 if HAS_SMP
 libbsp_a_SOURCES += ../shared/arm-a9mpcore-smp.c