diff options
| author | Pragnesh Patel <pragnesh.patel@sifive.com> | 2019-10-22 10:20:05 +0000 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-10-23 08:11:50 +0200 |
| commit | a7f5e42cc5234f239a01b8f69847ebb018710948 (patch) | |
| tree | 75d1abe5128bc54b678580c7d2d03b6823568e70 /c/src | |
| parent | libdebugger/arm: Clean up the building on arm variants. (diff) | |
| download | rtems-a7f5e42cc5234f239a01b8f69847ebb018710948.tar.bz2 | |
riscv: add freedom E310 Arty A7 bsp
Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board.
Update #3785.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Diffstat (limited to 'c/src')
| -rw-r--r-- | c/src/lib/libbsp/riscv/riscv/Makefile.am | 8 | ||||
| -rw-r--r-- | c/src/lib/libbsp/riscv/riscv/configure.ac | 16 |
2 files changed, 23 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/riscv/riscv/Makefile.am b/c/src/lib/libbsp/riscv/riscv/Makefile.am index 34bedf844f..15b0865306 100644 --- a/c/src/lib/libbsp/riscv/riscv/Makefile.am +++ b/c/src/lib/libbsp/riscv/riscv/Makefile.am @@ -46,7 +46,11 @@ librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/bspgetworkarea-defa librtemsbsp_a_SOURCES +=../../../../../../bsps/riscv/riscv/clock/clockdrv.c # Timer +#if RISCV_ENABLE_FRDME310ARTY_SUPPORT != 0 +librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/btimer/btimer-cpucounter.c +#else librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/btimer/btimer-stub.c +#endif # IRQ librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-default-handler.c @@ -60,6 +64,10 @@ librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/serial/console-termio librtemsbsp_a_SOURCES += ../../../../../../bsps/riscv/riscv/console/console-config.c librtemsbsp_a_SOURCES += ../../../../../../bsps/riscv/riscv/console/htif.c +#if RISCV_ENABLE_FRDME310ARTY_SUPPORT != 0 +librtemsbsp_a_SOURCES += ../../../../../../bsps/riscv/riscv/console/fe310-uart.c +#endif + if HAS_SMP librtemsbsp_a_SOURCES += ../../../../../../bsps/riscv/riscv/start/bspsmp.c endif diff --git a/c/src/lib/libbsp/riscv/riscv/configure.ac b/c/src/lib/libbsp/riscv/riscv/configure.ac index b01dee242e..26a3e07e98 100644 --- a/c/src/lib/libbsp/riscv/riscv/configure.ac +++ b/c/src/lib/libbsp/riscv/riscv/configure.ac @@ -36,9 +36,14 @@ RTEMS_BSPOPTS_HELP([RISCV_MAXIMUM_EXTERNAL_INTERRUPTS],[maximum number of extern RTEMS_BSPOPTS_SET([RISCV_ENABLE_HTIF_SUPPORT],[*],[]) RTEMS_BSPOPTS_HELP([RISCV_ENABLE_HTIF_SUPPORT],[enables the HTIF support if defined to a non-zero value, otherwise it is disabled (disabled by default)]) +RTEMS_BSPOPTS_SET([RISCV_CONSOLE_MAX_NS16550_DEVICES],[frdme310arty*],[]) RTEMS_BSPOPTS_SET([RISCV_CONSOLE_MAX_NS16550_DEVICES],[*],[2]) RTEMS_BSPOPTS_HELP([RISCV_CONSOLE_MAX_NS16550_DEVICES],[maximum number of NS16550 devices supported by the console driver (2 by default)]) +RTEMS_BSPOPTS_SET([RISCV_ENABLE_FRDME310ARTY_SUPPORT],[frdme310arty*],[1]) +RTEMS_BSPOPTS_SET([RISCV_ENABLE_FRDME310ARTY_SUPPORT],[*],[]) +RTEMS_BSPOPTS_HELP([RISCV_ENABLE_FRDME310ARTY_SUPPORT],[enables support sifive Freedom E310 Arty board if defined to a non-zero value,otherwise it is disabled (disabled by default)]) + RTEMS_BSP_CLEANUP_OPTIONS case "${RTEMS_BSP}" in @@ -53,13 +58,22 @@ case "${RTEMS_BSP}" in ;; esac +case "${RTEMS_BSP}" in + frdm*310arty) + RISCV_RAM_REGION_SIZE_DEFAULT=0x10000000 + ;; + *) + RISCV_RAM_REGION_SIZE_DEFAULT=0x04000000 + ;; +esac + AC_DEFUN([RISCV_LINKCMD],[ AC_ARG_VAR([$1],[$2])dnl [$1]=[$]{[$1]:-[$3]} ]) RISCV_LINKCMD([RISCV_RAM_REGION_BEGIN],[begin of the RAM region for linker command file (default is 0x70000000 for 64-bit with -mcmodel=medlow and 0x80000000 for all other)],[${RISCV_RAM_REGION_BEGIN_DEFAULT}]) -RISCV_LINKCMD([RISCV_RAM_REGION_SIZE],[size of the RAM region for linker command file (default 64MiB)],[0x04000000]) +RISCV_LINKCMD([RISCV_RAM_REGION_SIZE],[size of the RAM region for linker command file (default is 256 MiB for frdme310arty and 64 MiB for all other)],[${RISCV_RAM_REGION_SIZE_DEFAULT}]) AC_CONFIG_FILES([ Makefile |