diff options
author | Hesham Almatary <heshamelmatary@gmail.com> | 2017-10-27 09:51:09 +1100 |
---|---|---|
committer | Hesham Almatary <heshamelmatary@gmail.com> | 2017-11-01 10:11:20 +1100 |
commit | 8fa827cc83f40c831ace4a759d8c2f1280073ac6 (patch) | |
tree | 3d35b0a5f5010750fa9358cdbea5f0745b6c4be2 /c/src | |
parent | cpukit: RISC-V - make riscv32 code work for riscv64 - v2 (diff) | |
download | rtems-8fa827cc83f40c831ace4a759d8c2f1280073ac6.tar.bz2 |
bsp: Make riscv_generic work for both riscv32 and riscv64 - v2
Update #3109
Diffstat (limited to 'c/src')
-rw-r--r-- | c/src/aclocal/canonical-target-name.m4 | 2 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/Makefile.am (renamed from c/src/lib/libbsp/riscv32/Makefile.am) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/acinclude.m4 (renamed from c/src/lib/libbsp/riscv32/acinclude.m4) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/configure.ac (renamed from c/src/lib/libbsp/riscv32/configure.ac) | 4 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/preinstall.am (renamed from c/src/lib/libbsp/riscv32/preinstall.am) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/Makefile.am (renamed from c/src/lib/libbsp/riscv32/riscv_generic/Makefile.am) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/bsp_specs (renamed from c/src/lib/libbsp/riscv32/riscv_generic/bsp_specs) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/clock/clockdrv.c (renamed from c/src/lib/libbsp/riscv32/riscv_generic/clock/clockdrv.c) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/configure.ac (renamed from c/src/lib/libbsp/riscv32/riscv_generic/configure.ac) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/console/console-io.c (renamed from c/src/lib/libbsp/riscv32/riscv_generic/console/console-io.c) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/include/bsp.h (renamed from c/src/lib/libbsp/riscv32/riscv_generic/include/bsp.h) | 6 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/include/bspopts.h (renamed from c/src/lib/libbsp/riscv32/riscv_generic/include/bspopts.h) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/include/irq.h (renamed from c/src/lib/libbsp/riscv32/riscv_generic/include/irq.h) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/include/tm27.h (renamed from c/src/lib/libbsp/riscv32/riscv_generic/include/tm27.h) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/irq/irq.c (renamed from c/src/lib/libbsp/riscv32/riscv_generic/irq/irq.c) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/make/custom/riscv64_generic.cfg | 7 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/make/custom/riscv_generic.cfg (renamed from c/src/lib/libbsp/riscv32/riscv_generic/make/custom/riscv_generic.cfg) | 2 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/preinstall.am (renamed from c/src/lib/libbsp/riscv32/riscv_generic/preinstall.am) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/start/start.S (renamed from c/src/lib/libbsp/riscv32/riscv_generic/start/start.S) | 10 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/startup/bsp_fatal_halt.c (renamed from c/src/lib/libbsp/riscv32/riscv_generic/startup/bsp_fatal_halt.c) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/startup/linkcmds (renamed from c/src/lib/libbsp/riscv32/riscv_generic/startup/linkcmds) | 5 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/timer/timer.c (renamed from c/src/lib/libbsp/riscv32/riscv_generic/timer/timer.c) | 0 | ||||
-rw-r--r-- | c/src/lib/libbsp/riscv/shared/include/linker-symbols.h (renamed from c/src/lib/libbsp/riscv32/shared/include/linker-symbols.h) | 0 |
23 files changed, 21 insertions, 15 deletions
diff --git a/c/src/aclocal/canonical-target-name.m4 b/c/src/aclocal/canonical-target-name.m4 index a237c7ba25..d3c2531cda 100644 --- a/c/src/aclocal/canonical-target-name.m4 +++ b/c/src/aclocal/canonical-target-name.m4 @@ -8,6 +8,8 @@ AC_DEFUN([RTEMS_CANONICAL_TARGET_CPU], [AC_REQUIRE([AC_CANONICAL_HOST]) AC_MSG_CHECKING(rtems target cpu) case "${host}" in +riscv*-*-rtems*) + RTEMS_CPU=riscv;; *-*-rtems*) RTEMS_CPU="$host_cpu";; *) diff --git a/c/src/lib/libbsp/riscv32/Makefile.am b/c/src/lib/libbsp/riscv/Makefile.am index 9c319b6fd4..9c319b6fd4 100644 --- a/c/src/lib/libbsp/riscv32/Makefile.am +++ b/c/src/lib/libbsp/riscv/Makefile.am diff --git a/c/src/lib/libbsp/riscv32/acinclude.m4 b/c/src/lib/libbsp/riscv/acinclude.m4 index 23589932ba..23589932ba 100644 --- a/c/src/lib/libbsp/riscv32/acinclude.m4 +++ b/c/src/lib/libbsp/riscv/acinclude.m4 diff --git a/c/src/lib/libbsp/riscv32/configure.ac b/c/src/lib/libbsp/riscv/configure.ac index 116fa2f91a..4479d9ab48 100644 --- a/c/src/lib/libbsp/riscv32/configure.ac +++ b/c/src/lib/libbsp/riscv/configure.ac @@ -1,8 +1,8 @@ # Process this file with autoconf to produce a configure script. AC_PREREQ([2.69]) -AC_INIT([rtems-c-src-lib-libbsp-riscv32],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla]) -AC_CONFIG_SRCDIR([../riscv32]) +AC_INIT([rtems-c-src-lib-libbsp-riscv],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla]) +AC_CONFIG_SRCDIR([../riscv]) RTEMS_TOP(../../../../..) RTEMS_CANONICAL_TARGET_CPU diff --git a/c/src/lib/libbsp/riscv32/preinstall.am b/c/src/lib/libbsp/riscv/preinstall.am index e055b4da8a..e055b4da8a 100644 --- a/c/src/lib/libbsp/riscv32/preinstall.am +++ b/c/src/lib/libbsp/riscv/preinstall.am diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/Makefile.am b/c/src/lib/libbsp/riscv/riscv_generic/Makefile.am index 83257acf5e..83257acf5e 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/Makefile.am +++ b/c/src/lib/libbsp/riscv/riscv_generic/Makefile.am diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/bsp_specs b/c/src/lib/libbsp/riscv/riscv_generic/bsp_specs index 32c105fd0f..32c105fd0f 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/bsp_specs +++ b/c/src/lib/libbsp/riscv/riscv_generic/bsp_specs diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/clock/clockdrv.c b/c/src/lib/libbsp/riscv/riscv_generic/clock/clockdrv.c index 974ada0fd3..974ada0fd3 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/clock/clockdrv.c +++ b/c/src/lib/libbsp/riscv/riscv_generic/clock/clockdrv.c diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/configure.ac b/c/src/lib/libbsp/riscv/riscv_generic/configure.ac index 92c1b9609d..92c1b9609d 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/configure.ac +++ b/c/src/lib/libbsp/riscv/riscv_generic/configure.ac diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/console/console-io.c b/c/src/lib/libbsp/riscv/riscv_generic/console/console-io.c index 8e03b993b8..8e03b993b8 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/console/console-io.c +++ b/c/src/lib/libbsp/riscv/riscv_generic/console/console-io.c diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/include/bsp.h b/c/src/lib/libbsp/riscv/riscv_generic/include/bsp.h index 99fe958e82..79f359ac34 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/include/bsp.h +++ b/c/src/lib/libbsp/riscv/riscv_generic/include/bsp.h @@ -60,11 +60,11 @@ extern "C" { * @{ */ -#define REG(x) (*((volatile uint32_t *) (x))) +#define REG(x) (*((volatile unsigned long *) (x))) #define BIT(n) (1 << (n)) -#define MTIME_MM 0x0200bff8 -#define MTIMECMP_MM 0x02004000 +#define MTIME_MM 0x000000000200bff8 +#define MTIMECMP_MM 0x0000000002004000 #ifdef __cplusplus } diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/include/bspopts.h b/c/src/lib/libbsp/riscv/riscv_generic/include/bspopts.h index 7858ce0426..7858ce0426 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/include/bspopts.h +++ b/c/src/lib/libbsp/riscv/riscv_generic/include/bspopts.h diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/include/irq.h b/c/src/lib/libbsp/riscv/riscv_generic/include/irq.h index d7ee45b378..d7ee45b378 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/include/irq.h +++ b/c/src/lib/libbsp/riscv/riscv_generic/include/irq.h diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/include/tm27.h b/c/src/lib/libbsp/riscv/riscv_generic/include/tm27.h index 392f106da4..392f106da4 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/include/tm27.h +++ b/c/src/lib/libbsp/riscv/riscv_generic/include/tm27.h diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/irq/irq.c b/c/src/lib/libbsp/riscv/riscv_generic/irq/irq.c index af6e08e52b..af6e08e52b 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/irq/irq.c +++ b/c/src/lib/libbsp/riscv/riscv_generic/irq/irq.c diff --git a/c/src/lib/libbsp/riscv/riscv_generic/make/custom/riscv64_generic.cfg b/c/src/lib/libbsp/riscv/riscv_generic/make/custom/riscv64_generic.cfg new file mode 100644 index 0000000000..04897e5bba --- /dev/null +++ b/c/src/lib/libbsp/riscv/riscv_generic/make/custom/riscv64_generic.cfg @@ -0,0 +1,7 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = riscv + +CPU_CFLAGS = -mcmodel=medany + +CFLAGS_OPTIMIZE_V ?= -O0 -g diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/make/custom/riscv_generic.cfg b/c/src/lib/libbsp/riscv/riscv_generic/make/custom/riscv_generic.cfg index 73d8c06a1f..785ac42c67 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/make/custom/riscv_generic.cfg +++ b/c/src/lib/libbsp/riscv/riscv_generic/make/custom/riscv_generic.cfg @@ -1,6 +1,6 @@ include $(RTEMS_ROOT)/make/custom/default.cfg -RTEMS_CPU = riscv32 +RTEMS_CPU = riscv CPU_CFLAGS = diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/preinstall.am b/c/src/lib/libbsp/riscv/riscv_generic/preinstall.am index 4d71e7173c..4d71e7173c 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/preinstall.am +++ b/c/src/lib/libbsp/riscv/riscv_generic/preinstall.am diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/start/start.S b/c/src/lib/libbsp/riscv/riscv_generic/start/start.S index 692afe560b..ccefb818bd 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/start/start.S +++ b/c/src/lib/libbsp/riscv/riscv_generic/start/start.S @@ -28,11 +28,9 @@ */ #include <bsp/linker-symbols.h> #include <rtems/score/riscv-utility.h> +#include <rtems/score/cpu.h> #include <rtems/asm.h> -# define LREG lw -# define SREG sw - EXTERN(bsp_section_bss_begin) EXTERN(bsp_section_bss_end) EXTERN(ISR_Handler) @@ -90,8 +88,8 @@ SYM(_start): _loop_clear_bss: bge t0, t1, _end_clear_bss - sw x0, 0(t0) - addi t0, t0, 4 + SREG x0, 0(t0) + addi t0, t0, CPU_SIZEOF_POINTER j _loop_clear_bss _end_clear_bss: @@ -101,7 +99,7 @@ _end_clear_bss: j boot_card - .align 2 + .align 4 bsp_start_vector_table_begin: .word _RISCV_Exception_default /* User int */ .word _RISCV_Exception_default /* Supervisor int */ diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/startup/bsp_fatal_halt.c b/c/src/lib/libbsp/riscv/riscv_generic/startup/bsp_fatal_halt.c index 64c307990b..64c307990b 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/startup/bsp_fatal_halt.c +++ b/c/src/lib/libbsp/riscv/riscv_generic/startup/bsp_fatal_halt.c diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/startup/linkcmds b/c/src/lib/libbsp/riscv/riscv_generic/startup/linkcmds index 6dc5ac48da..14e6f4c245 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/startup/linkcmds +++ b/c/src/lib/libbsp/riscv/riscv_generic/startup/linkcmds @@ -33,7 +33,6 @@ * SUCH DAMAGE. */ -OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv", "elf32-littleriscv") OUTPUT_ARCH (riscv) ENTRY (_start) @@ -68,9 +67,9 @@ bsp_section_xbarrier_align = DEFINED (bsp_section_xbarrier_align) ? bsp_section bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1; bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1; -bsp_stack_align = DEFINED (bsp_stack_align) ? bsp_stack_align : 8; +bsp_stack_align = DEFINED (bsp_stack_align) ? bsp_stack_align : 16; -bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 1024; +bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 4096; bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align); _bsp_processor_count = DEFINED (_bsp_processor_count) ? _bsp_processor_count : 1; diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/timer/timer.c b/c/src/lib/libbsp/riscv/riscv_generic/timer/timer.c index 4dd3193685..4dd3193685 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/timer/timer.c +++ b/c/src/lib/libbsp/riscv/riscv_generic/timer/timer.c diff --git a/c/src/lib/libbsp/riscv32/shared/include/linker-symbols.h b/c/src/lib/libbsp/riscv/shared/include/linker-symbols.h index a4b03f527c..a4b03f527c 100644 --- a/c/src/lib/libbsp/riscv32/shared/include/linker-symbols.h +++ b/c/src/lib/libbsp/riscv/shared/include/linker-symbols.h |