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authorJoel Sherrill <joel.sherrill@OARcorp.com>2003-09-26 20:15:56 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2003-09-26 20:15:56 +0000
commit5ca5a54a5e8c7327ef809ee5286e01daebeecc6e (patch)
tree8460a345703de54cf049cc3585866b0c654c2676 /c/src
parent2003-09-26 Ralf Corsepius <corsepiu@faw.uni-ulm.de> (diff)
downloadrtems-5ca5a54a5e8c7327ef809ee5286e01daebeecc6e.tar.bz2
2003-09-26 Cedric Aubert <cedric_aubert@yahoo.fr>
PR 499/rtems_misc * serial/mc68681.c: Miscellaneous corrections: - Correction of ACR_BIT[7] (Baudrate table) Configuration - Correction of Parity Bit Configuration (Odd was forced) - Correction of Stop Bit configuration (inversed) - Correction of ISR Handler to call rtems_termios_dequeue_character() only if is a Tx Empty IRQ. - Add RTS CTS Hardware flow control Configuration
Diffstat (limited to 'c/src')
-rw-r--r--c/src/libchip/ChangeLog11
-rw-r--r--c/src/libchip/serial/mc68681.c63
2 files changed, 55 insertions, 19 deletions
diff --git a/c/src/libchip/ChangeLog b/c/src/libchip/ChangeLog
index b2c1cc52f1..81cfb027f6 100644
--- a/c/src/libchip/ChangeLog
+++ b/c/src/libchip/ChangeLog
@@ -1,3 +1,14 @@
+2003-09-26 Cedric Aubert <cedric_aubert@yahoo.fr>
+
+ PR 499/rtems_misc
+ * serial/mc68681.c: Miscellaneous corrections:
+ - Correction of ACR_BIT[7] (Baudrate table) Configuration
+ - Correction of Parity Bit Configuration (Odd was forced)
+ - Correction of Stop Bit configuration (inversed)
+ - Correction of ISR Handler to call
+ rtems_termios_dequeue_character() only if is a Tx Empty IRQ.
+ - Add RTS CTS Hardware flow control Configuration
+
2003-09-04 Joel Sherrill <joel@OARcorp.com>
* ide/ata.c, ide/ata.h, ide/ata_internal.h, ide/ide_controller.c,
diff --git a/c/src/libchip/serial/mc68681.c b/c/src/libchip/serial/mc68681.c
index 47ff8a3392..72935367a4 100644
--- a/c/src/libchip/serial/mc68681.c
+++ b/c/src/libchip/serial/mc68681.c
@@ -123,8 +123,8 @@ MC68681_STATIC int mc68681_set_attributes(
if (t->c_cflag & PARENB) {
if (t->c_cflag & PARODD)
mode1 |= 0x04;
- else
- mode1 |= 0x04;
+ /* else
+ mode1 |= 0x04; */
} else {
mode1 |= 0x10;
}
@@ -149,13 +149,23 @@ MC68681_STATIC int mc68681_set_attributes(
*/
if (t->c_cflag & CSTOPB) {
- mode2 |= 0x07; /* 2 stop bits */
+ mode2 |= 0x0F; /* 2 stop bits */
} else {
- if ((t->c_cflag & CSIZE) == CS5) /* CS5 and 2 stop bits not supported */
+ if ((t->c_cflag & CSIZE) == CS5) /* CS5 and 1 stop bits not supported */
return -1;
- mode2 |= 0x0F; /* 1 stop bit */
+ mode2 |= 0x07; /* 1 stop bit */
}
+ /*
+ * Hardware Flow Control
+ */
+
+ if(t->c_cflag & CRTSCTS) {
+ mode1 |= 0x80; /* Enable Rx RTS Control */
+ mode2 |= 0x10; /* Enable CTS Enable Tx */
+ }
+
+
rtems_interrupt_disable(Irql);
(*setReg)( pMC68681, MC68681_AUX_CTRL_REG, acr_bit );
(*setReg)( pMC68681_port, MC68681_CLOCK_SELECT, baud_mask );
@@ -266,27 +276,30 @@ MC68681_STATIC int mc68681_open(
unsigned32 pMC68681;
unsigned32 pMC68681_port;
unsigned int baud;
- unsigned int acr;
+ unsigned int acr_bit;
unsigned int vector;
unsigned int command;
rtems_interrupt_level Irql;
setRegister_f setReg;
-
+ unsigned int status;
+
+
pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
setReg = Console_Port_Tbl[minor].setRegister;
vector = Console_Port_Tbl[minor].ulIntVector;
-
+
/* XXX default baud rate should be from configuration table */
- (void) mc68681_baud_rate( minor, B9600, &baud, &acr, &command );
+ status = mc68681_baud_rate( minor, B9600, &baud, &acr_bit, &command );
+ if (status < 0) rtems_fatal_error_occurred (RTEMS_NOT_DEFINED);
/*
* Set the DUART channel to a default useable state
*/
rtems_interrupt_disable(Irql);
- (*setReg)( pMC68681, MC68681_AUX_CTRL_REG, acr );
+ (*setReg)( pMC68681, MC68681_AUX_CTRL_REG, acr_bit << 7 );
(*setReg)( pMC68681_port, MC68681_CLOCK_SELECT, baud );
if ( command ) {
(*setReg)( pMC68681_port, MC68681_COMMAND, command ); /* RX */
@@ -553,8 +566,10 @@ MC68681_STATIC int mc68681_baud_rate(
acr_bit = 0;
status = 0;
- if ( !(Console_Port_Tbl[minor].ulDataPort & MC68681_DATA_BAUD_RATE_SET_1) )
+ if (Console_Port_Tbl[minor].ulDataPort & MC68681_DATA_BAUD_RATE_SET_2)
+ {
acr_bit = 1;
+ }
is_extended = 0;
@@ -611,6 +626,7 @@ MC68681_STATIC void mc68681_process(
unsigned32 pMC68681;
unsigned32 pMC68681_port;
volatile unsigned8 ucLineStatus;
+ volatile unsigned8 ucISRStatus;
unsigned char cChar;
getRegister_f getReg;
setRegister_f setReg;
@@ -620,6 +636,19 @@ MC68681_STATIC void mc68681_process(
getReg = Console_Port_Tbl[minor].getRegister;
setReg = Console_Port_Tbl[minor].setRegister;
+ /* Get ISR at the beginning of the IT routine */
+ ucISRStatus = (*getReg)(pMC68681, MC68681_INTERRUPT_STATUS_REG);
+
+ /* Get good ISR a or b channel */
+ if (pMC68681 != pMC68681_port){
+ ucISRStatus >>= 4;
+ }
+
+ /* See if is usefull to call rtems_termios_dequeue */
+ if(Console_Port_Data[minor].bActive == FALSE) {
+ ucISRStatus = ucISRStatus & ~MC68681_IR_TX_READY;
+ }
+
/*
* Deal with any received characters
*/
@@ -650,18 +679,14 @@ MC68681_STATIC void mc68681_process(
* Deal with the transmitter
*/
- ucLineStatus = (*getReg)(pMC68681, MC68681_INTERRUPT_STATUS_REG);
- if (pMC68681 != pMC68681_port)
- ucLineStatus >>= 4;
-
- if(ucLineStatus & MC68681_IR_TX_READY) {
- if (rtems_termios_dequeue_characters(
- Console_Port_Data[minor].termios_data, 1)) {
+ if (ucISRStatus & MC68681_IR_TX_READY) {
+ if (!rtems_termios_dequeue_characters(
+ Console_Port_Data[minor].termios_data, 1)) {
+ /* If no more char to send, disable TX interrupt */
Console_Port_Data[minor].bActive = FALSE;
mc68681_enable_interrupts(minor, MC68681_IMR_ENABLE_ALL_EXCEPT_TX);
}
}
-
}
/*