diff options
author | Daniel Ramirez <javamonn@gmail.com> | 2013-12-21 15:46:33 -0600 |
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committer | Gedare Bloom <gedare@rtems.org> | 2013-12-22 14:22:18 -0500 |
commit | 582553d9d46c9499dc0ee4c041040f3a14e0aeea (patch) | |
tree | bfc937e1c8a278c5a262edc95f15649ada41ba25 /c/src | |
parent | arm_edb7312: added new doxygen (diff) | |
download | rtems-582553d9d46c9499dc0ee4c041040f3a14e0aeea.tar.bz2 |
arm_gp32: added new doxygen
Diffstat (limited to 'c/src')
-rw-r--r-- | c/src/lib/libbsp/arm/gp32/include/bsp.h | 53 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/gp32/smc/smc.h | 18 |
2 files changed, 54 insertions, 17 deletions
diff --git a/c/src/lib/libbsp/arm/gp32/include/bsp.h b/c/src/lib/libbsp/arm/gp32/include/bsp.h index a6671a80dc..b0bd8ba8e3 100644 --- a/c/src/lib/libbsp/arm/gp32/include/bsp.h +++ b/c/src/lib/libbsp/arm/gp32/include/bsp.h @@ -1,7 +1,7 @@ /** - * @file - * - * This include file contains definitions related to the GP32 BSP. + * @file + * @ingroup arm_gp32 + * @brief Global BSP definitons. */ /* @@ -35,36 +35,57 @@ extern "C" { #define gp32_getButtons() \ ( (((~rPEDAT >> 6) & 0x3 )<<8) | (((~rPBDAT >> 8) & 0xFF)<<0) ) -/*functions to get the differents s3c2400 clks*/ +/** + * @defgroup arm_gp32 GP32 Support + * @ingroup bsp_arm + * @brief GP32 Support Pacakge + * @{ + */ + +/** + * @brief functions to get the differents s3c2400 clks + * @{ + */ + uint32_t get_FCLK(void); uint32_t get_HCLK(void); uint32_t get_PCLK(void); uint32_t get_UCLK(void); +/** @} */ void gp32_setPalette( unsigned char pos, uint16_t color); /* What is the input clock freq in hertz? */ -#define BSP_OSC_FREQ 12000000 /* 12 MHz oscillator */ -#define M_MDIV 81 /* FCLK=133Mhz */ +/** @brief 12 MHz oscillator */ +#define BSP_OSC_FREQ 12000000 +/** @brief FCLK=133Mhz */ +#define M_MDIV 81 #define M_PDIV 2 #define M_SDIV 1 -#define M_CLKDIVN 2 /* HCLK=FCLK/2, PCLK=FCLK/2 */ +/** @brief HCLK=FCLK/2, PCLK=FCLK/2 */ +#define M_CLKDIVN 2 +/** @brief enable refresh */ +#define REFEN 0x1 +/** @brief CBR(CAS before RAS)/auto refresh */ +#define TREFMD 0x0 +/** @brief 2 clk */ +#define Trp 0x0 +/** @brief 7 clk */ +#define Trc 0x3 +/** @brief 3 clk */ +#define Tchr 0x2 -#define REFEN 0x1 /* enable refresh */ -#define TREFMD 0x0 /* CBR(CAS before RAS)/auto refresh */ -#define Trp 0x0 /* 2 clk */ -#define Trc 0x3 /* 7 clk */ -#define Tchr 0x2 /* 3 clk */ - - -/* - * This BSP provides its own IDLE thread to override the RTEMS one. +/** + * @brief This BSP provides its own IDLE thread to override the RTEMS one. + * * So we prototype it and define the constant confdefs.h expects * to configure a BSP specific one. */ void *bsp_idle_thread(uintptr_t ignored); +/** @} */ + #define BSP_IDLE_TASK_BODY bsp_idle_thread #ifdef __cplusplus diff --git a/c/src/lib/libbsp/arm/gp32/smc/smc.h b/c/src/lib/libbsp/arm/gp32/smc/smc.h index cd886ef219..19600e8a1e 100644 --- a/c/src/lib/libbsp/arm/gp32/smc/smc.h +++ b/c/src/lib/libbsp/arm/gp32/smc/smc.h @@ -1,3 +1,9 @@ +/** + * @file + * @ingroup gp32_smc + * @brief SMC disk driver initialization entry point + */ + #ifndef __SMC_H__ #define __SMC_H__ @@ -9,7 +15,15 @@ extern "C" { #include "rtems/blkdev.h" -/* smc_initialize -- +/** + * @defgroup gp32_smc SMC Disk Driver + * @ingroup arm_gp32 + * @brief SMC Disk Driver Support + * @{ + */ + +/** + * @brief smc_initialize * SMC disk driver initialization entry point. */ rtems_device_driver @@ -21,6 +35,8 @@ smc_initialize( #define SMC_DRIVER_TABLE_ENTRY \ { smc_initialize, GENERIC_BLOCK_DEVICE_DRIVER_ENTRIES } +/** @} */ + #ifdef __cplusplus } #endif |