changes to support GW_LCFM

15 files changed, 271 insertions, 61 deletions

diff --git a/c/src/lib/libcpu/powerpc/ChangeLog b/c/src/lib/libcpu/powerpc/ChangeLog
index ecb6c6f293..14ef039368 100644
--- a/c/src/lib/libcpu/powerpc/ChangeLog
+++ b/c/src/lib/libcpu/powerpc/ChangeLog
@@ -1,3 +1,15 @@
+2010-04-07      Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
+
+	* mpc55xx/edma/edma.c, mpc55xx/esci/esci.c, mpc55xx/include/irq.h,
+	mpc55xx/include/reg-defs.h, mpc55xx/include/regs.h,
+	mpc55xx/misc/copy.S, mpc55xx/misc/fmpll.S, mpc5xx/irq/irq_init.c,
+	mpc5xx/vectors/vectors_init.c,
+	new-exceptions/bspsupport/ppc_exc_address.c,
+	new-exceptions/bspsupport/ppc_exc_categories.c,
+	new-exceptions/bspsupport/ppc_exc_initialize.c,
+	shared/include/cpuIdent.c, shared/include/cpuIdent.h: adapted for
+	GW_LCFM support
+
 2010-03-27      Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
 
 	* ppc403/clock/clock.c, ppc403/clock/clock_4xx.c: code changes to
diff --git a/c/src/lib/libcpu/powerpc/mpc55xx/edma/edma.c b/c/src/lib/libcpu/powerpc/mpc55xx/edma/edma.c
index 23550a8d6f..c867fe74dd 100644
--- a/c/src/lib/libcpu/powerpc/mpc55xx/edma/edma.c
+++ b/c/src/lib/libcpu/powerpc/mpc55xx/edma/edma.c
@@ -31,13 +31,17 @@
 
 #include <rtems/status-checks.h>
 
-#define MPC55XX_EDMA_CHANNEL_NUMBER 64U
+#if   ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))
+#define MPC55XX_EDMA_CHANNEL_COUNT 16U
+#else /* ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517)) */
+#define MPC55XX_EDMA_CHANNEL_COUNT 64U
+#endif /* ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517)) */
 
-#define MPC55XX_EDMA_INVALID_CHANNEL MPC55XX_EDMA_CHANNEL_NUMBER
+#define MPC55XX_EDMA_INVALID_CHANNEL MPC55XX_EDMA_CHANNEL_COUNT
 
-#define MPC55XX_EDMA_IS_CHANNEL_INVALID( i) ((unsigned) (i) >= MPC55XX_EDMA_CHANNEL_NUMBER)
+#define MPC55XX_EDMA_IS_CHANNEL_INVALID( i) ((unsigned) (i) >= MPC55XX_EDMA_CHANNEL_COUNT)
 
-#define MPC55XX_EDMA_IS_CHANNEL_VALID( i) ((unsigned) (i) < MPC55XX_EDMA_CHANNEL_NUMBER)
+#define MPC55XX_EDMA_IS_CHANNEL_VALID( i) ((unsigned) (i) < MPC55XX_EDMA_CHANNEL_COUNT)
 
 #define MPC55XX_EDMA_IRQ_PRIORITY MPC55XX_INTC_DEFAULT_PRIORITY
 
@@ -78,7 +82,7 @@ static void mpc55xx_edma_interrupt_error_handler( void *arg)
 	do {
 		error_channels_update = 0;
 
-		for (i = 0; i < MPC55XX_EDMA_CHANNEL_NUMBER; ++i) {
+		for (i = 0; i < MPC55XX_EDMA_CHANNEL_COUNT; ++i) {
 			uint64_t channel_flags = 0;
 			unsigned minor_link = i;
 			unsigned major_link = i;
@@ -125,7 +129,7 @@ static void mpc55xx_edma_interrupt_error_handler( void *arg)
 	}
 
 	/* Clear the error interrupt requests */
-	for (i = 0; i < MPC55XX_EDMA_CHANNEL_NUMBER; ++i) {
+	for (i = 0; i < MPC55XX_EDMA_CHANNEL_COUNT; ++i) {
 		if (IS_FLAG_SET( error_channels, MPC55XX_EDMA_CHANNEL_FLAG( i))) {
 			EDMA.CER.R = (uint8_t) i;
 		}
@@ -170,7 +174,8 @@ rtems_status_code mpc55xx_edma_init(void)
 	EDMA.CR.B.ERGA = 1;
 
 	/* Clear TCDs */
-	memset( (void *)&EDMA.TCD [0], 0, sizeof( EDMA.TCD));
+	memset( (void *)&EDMA.TCD [0], 0, 
+		MPC55XX_EDMA_CHANNEL_COUNT * sizeof( EDMA.TCD[0]));
 
 	/* Error interrupt handlers */
 	sc = mpc55xx_interrupt_handler_install(
@@ -182,6 +187,8 @@ rtems_status_code mpc55xx_edma_init(void)
 		NULL
 	);
 	RTEMS_CHECK_SC( sc, "install low error interrupt handler");
+
+#if defined(MPC55XX_IRQ_EDMA_ERROR_HIGH)
 	sc = mpc55xx_interrupt_handler_install(
 		MPC55XX_IRQ_EDMA_ERROR_HIGH,
 		"eDMA Error (High)",
@@ -191,6 +198,7 @@ rtems_status_code mpc55xx_edma_init(void)
 		NULL
 	);
 	RTEMS_CHECK_SC( sc, "install high error interrupt handler");
+#endif /* defined(MPC55XX_IRQ_EDMA_ERROR_HIGH) */
 
 	return RTEMS_SUCCESSFUL;
 }
diff --git a/c/src/lib/libcpu/powerpc/mpc55xx/esci/esci.c b/c/src/lib/libcpu/powerpc/mpc55xx/esci/esci.c
index 4d3e66a602..5a6bc7b37e 100644
--- a/c/src/lib/libcpu/powerpc/mpc55xx/esci/esci.c
+++ b/c/src/lib/libcpu/powerpc/mpc55xx/esci/esci.c
@@ -398,13 +398,13 @@ static int mpc55xx_esci_termios_set_attributes( int minor, const struct termios
 		return RTEMS_IO_ERROR;
 	}
 
-	/* Set control registers */
-	regs->CR1.R = cr1.R;
-	regs->CR2.R = cr2.R;
-
 	/* Disable LIN */
 	regs->LCR.R = 0;
 
+	/* Set control registers */
+	regs->CR2.R = cr2.R;
+	regs->CR1.R = cr1.R;
+
 	return RTEMS_SUCCESSFUL;
 }
 
diff --git a/c/src/lib/libcpu/powerpc/mpc55xx/include/irq.h b/c/src/lib/libcpu/powerpc/mpc55xx/include/irq.h
index 6b2be34fe5..fc7ea53744 100644
--- a/c/src/lib/libcpu/powerpc/mpc55xx/include/irq.h
+++ b/c/src/lib/libcpu/powerpc/mpc55xx/include/irq.h
@@ -35,6 +35,8 @@ extern "C" {
 /* Basics */
 #define MPC55XX_IRQ_MIN 0U
 #define MPC55XX_IRQ_MAX 328U
+#define MPC55XX_IRQ_MIN 0U
+#define MPC55XX_IRQ_MAX 328U
 #define MPC55XX_IRQ_BASE MPC55XX_IRQ_MIN
 #define MPC55XX_IRQ_NUMBER (MPC55XX_IRQ_MAX + 1U)
 
@@ -45,15 +47,56 @@ extern "C" {
 #define MPC55XX_IRQ_SOFTWARE_GET_REQUEST( i) (i)
 #define MPC55XX_IRQ_SOFTWARE_NUMBER (MPC55XX_IRQ_SOFTWARE_MAX + 1U)
 
+#if ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))
+#else  /*((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))*/
+#endif /*((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))*/
+
+#if ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))
+
+/* eDMA interrupts */
+#define MPC55XX_IRQ_EDMA_ERROR_LOW 10U
+#define MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN 11U
+#define MPC55XX_IRQ_EDMA_REQUEST_LOW_MAX 26U
+
+#define MPC55XX_IRQ_EDMA_GET_CHANNEL( v) \
+  ((v) - MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN)
+#define MPC55XX_IRQ_EDMA_GET_REQUEST( c) \
+  ((c) + MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN)
+
+/* SIU external interrupts */
+#define MPC55XX_IRQ_SIU_EXTERNAL_0 53U
+#define MPC55XX_IRQ_SIU_EXTERNAL_1 54U
+#define MPC55XX_IRQ_SIU_EXTERNAL_2 55U
+#define MPC55XX_IRQ_SIU_EXTERNAL_3 56U
+#define MPC55XX_IRQ_SIU_EXTERNAL_4_15 57U
+
+/* eMIOS interrupts */
+#define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN 58U
+#define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MAX 81U
+#define MPC55XX_IRQ_EMIOS_GET_CHANNEL( v) \
+  ((v) - MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN)
+#define MPC55XX_IRQ_EMIOS_GET_REQUEST( c) \
+  ((c) + MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN)
+
+#else  /*((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))*/
+
 /* eDMA interrupts */
 #define MPC55XX_IRQ_EDMA_ERROR_LOW 10U
-#define MPC55XX_IRQ_EDMA_ERROR_HIGH 210U
 #define MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN 11U
 #define MPC55XX_IRQ_EDMA_REQUEST_LOW_MAX 42U
+
+#define MPC55XX_IRQ_EDMA_ERROR_HIGH 210U
 #define MPC55XX_IRQ_EDMA_REQUEST_HIGH_MIN 211U
 #define MPC55XX_IRQ_EDMA_REQUEST_HIGH_MAX 242U
-#define MPC55XX_IRQ_EDMA_GET_CHANNEL( v) (((v) > MPC55XX_IRQ_EDMA_REQUEST_LOW_MAX) ? ((v) + 32U - MPC55XX_IRQ_EDMA_REQUEST_HIGH_MIN) : ((v) - MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN))
-#define MPC55XX_IRQ_EDMA_GET_REQUEST( c) (((c) >= 32U) ? ((c) - 32U + MPC55XX_IRQ_EDMA_REQUEST_HIGH_MIN) : ((c) + MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN))
+
+#define MPC55XX_IRQ_EDMA_GET_CHANNEL( v) \
+  (((v) > MPC55XX_IRQ_EDMA_REQUEST_LOW_MAX)		\
+   ? ((v) + 32U - MPC55XX_IRQ_EDMA_REQUEST_HIGH_MIN)	\
+   : ((v) - MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN))
+#define MPC55XX_IRQ_EDMA_GET_REQUEST( c) \
+  (((c) >= 32U)					     \
+   ? ((c) - 32U + MPC55XX_IRQ_EDMA_REQUEST_HIGH_MIN) \
+   : ((c) + MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN))
 
 /* SIU external interrupts */
 #define MPC55XX_IRQ_SIU_EXTERNAL_0 46U
@@ -67,12 +110,26 @@ extern "C" {
 #define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MAX 66U
 #define MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN 202U
 #define MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MAX 209U
-#define MPC55XX_IRQ_EMIOS_GET_CHANNEL( v) (((v) > MPC55XX_IRQ_EMIOS_REQUEST_LOW_MAX) ? ((v) + 16U - MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN) : ((v) - MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN))
-#define MPC55XX_IRQ_EMIOS_GET_REQUEST( c) (((c) >= 16U) ? ((c) - 16U + MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN) : ((c) + MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN))
+
+#define MPC55XX_IRQ_EMIOS_GET_CHANNEL( v)	      \
+  (((v) > MPC55XX_IRQ_EMIOS_REQUEST_LOW_MAX)	      \
+   ? ((v) + 16U - MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN) \
+   : ((v) - MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN))
+
+#define MPC55XX_IRQ_EMIOS_GET_REQUEST( c)	      \
+  (((c) >= 16U)					      \
+   ? ((c) - 16U + MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN) \
+   : ((c) + MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN))
+
+#endif /*((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))*/
 
 /* Checks */
-#define MPC55XX_IRQ_IS_VALID(v) ((v) >= MPC55XX_IRQ_MIN && (v) <= MPC55XX_IRQ_MAX)
-#define MPC55XX_IRQ_IS_SOFTWARE(v) ((v) >= MPC55XX_IRQ_SOFTWARE_MIN && (v) <= MPC55XX_IRQ_SOFTWARE_MAX)
+#define MPC55XX_IRQ_IS_VALID(v) \
+  ((v) >= MPC55XX_IRQ_MIN &&	\
+   (v) <= MPC55XX_IRQ_MAX)
+#define MPC55XX_IRQ_IS_SOFTWARE(v) \
+  ((v) >= MPC55XX_IRQ_SOFTWARE_MIN && \
+   (v) <= MPC55XX_IRQ_SOFTWARE_MAX)
 
 /*
  * Interrupt controller
diff --git a/c/src/lib/libcpu/powerpc/mpc55xx/include/reg-defs.h b/c/src/lib/libcpu/powerpc/mpc55xx/include/reg-defs.h
index a5a4396972..338e8063b5 100644
--- a/c/src/lib/libcpu/powerpc/mpc55xx/include/reg-defs.h
+++ b/c/src/lib/libcpu/powerpc/mpc55xx/include/reg-defs.h
@@ -21,6 +21,7 @@
 #ifndef LIBCPU_POWERPC_MPC55XX_REG_DEFS_H
 #define LIBCPU_POWERPC_MPC55XX_REG_DEFS_H
 
+#include <bspopts.h>
 /*
  * Register addresses
  */
@@ -31,8 +32,17 @@
 #define FMPLL_ESYNCR2 0xFFFF000C
 #define FLASH_BIUCR   0xFFFF801C
 #define SIU_ECCR      0xFFFE8984
+#define SIU_SYSCLK    0xFFFE89A0
 #define SIU_SRCR      0xFFFE8010
 
+/*
+ * Definitions for SIU_SYSCLK 
+ */
+#define SIU_SYSCLK_SYSCLKSEL_MASK 0xC0000000
+#define SIU_SYSCLK_SYSCLKSEL_IRC  0x00000000
+#define SIU_SYSCLK_SYSCLKSEL_XOSC 0x40000000
+#define SIU_SYSCLK_SYSCLKSEL_PLL  0x80000000
+
 #else /* ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))*/
 
 #define FMPLL_SYNCR 0xC3F80000
diff --git a/c/src/lib/libcpu/powerpc/mpc55xx/include/regs.h b/c/src/lib/libcpu/powerpc/mpc55xx/include/regs.h
index 5ddfd2d326..10dab8fe7c 100644
--- a/c/src/lib/libcpu/powerpc/mpc55xx/include/regs.h
+++ b/c/src/lib/libcpu/powerpc/mpc55xx/include/regs.h
@@ -426,7 +426,8 @@ extern "C" {
                 uint32_t BA:17;
                   uint32_t:3;
                 uint32_t PS:1;
-                  uint32_t:4;
+                  uint32_t:3;
+	        uint32_t AD_MUX:1; /* only MPC551x */
                 uint32_t BL:1;
                 uint32_t WEBS:1;
                 uint32_t TBDIP:1;
@@ -493,7 +494,9 @@ extern "C" {
                 uint32_t EARP:2;
                   uint32_t:4;
                 uint32_t MDIS:1;
-                  uint32_t:5;
+                  uint32_t:3;
+	        uint32_t D16_32:1; /* only for MPC551x */
+                uint32_t ADMUX:1;  /* only for MPC551x */
                 uint32_t DBM:1;
             } B;
         } MCR;
@@ -4424,8 +4427,8 @@ extern "C" {
 #define CAN_B     (*(volatile struct FLEXCAN2_tag *)  0xFFFC4000)
 #define CAN_C     (*(volatile struct FLEXCAN2_tag *)  0xFFFC8000)
 #define CAN_D     (*(volatile struct FLEXCAN2_tag *)  0xFFFCC000)
-#define CAN_D     (*(volatile struct FLEXCAN2_tag *)  0xFFFD0000)
-#define CAN_D     (*(volatile struct FLEXCAN2_tag *)  0xFFFD4000)
+#define CAN_E     (*(volatile struct FLEXCAN2_tag *)  0xFFFD0000)
+#define CAN_F     (*(volatile struct FLEXCAN2_tag *)  0xFFFD4000)
 
 #define EMIOS     (*(volatile struct EMIOS_tag *)     0xFFFE4000)
 #define SIU       (*(volatile struct SIU_tag *)       0xFFFE8000)
diff --git a/c/src/lib/libcpu/powerpc/mpc55xx/misc/copy.S b/c/src/lib/libcpu/powerpc/mpc55xx/misc/copy.S
index 279620346b..7608b5c9ed 100644
--- a/c/src/lib/libcpu/powerpc/mpc55xx/misc/copy.S
+++ b/c/src/lib/libcpu/powerpc/mpc55xx/misc/copy.S
@@ -19,6 +19,7 @@
  */
 
 #include <libcpu/powerpc-utility.h>
+#include <bspopts.h>
 
 .section ".text"
 
@@ -31,6 +32,34 @@
  * to be aligned on 8 byte boundaries.  The size @a n must be evenly divisible by 8.
  * The SPE operations @b evxor, @b evlddx and @b evstddx will be used.
  */
+#if       ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))
+GLOBAL_FUNCTION mpc55xx_copy_8
+#endif /* ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */
+GLOBAL_FUNCTION mpc55xx_copy_4
+	/* Loop counter = data size / 4 */
+	srwi. r5, r5, 2
+	beqlr
+	mtctr r5
+	xor   r5,r5,r5
+copy_data4:
+	lwzx  r6, r5, r3
+	stwx  r6, r5, r4
+	addi r5, r5, 4
+	bdnz copy_data4
+
+	/* Return */
+	blr
+
+#if  !((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))
+/**
+ * @fn int mpc55xx_copy_8( const void *src, void *dest, size_t n)
+ *
+ * @brief Copy @a n bytes from @a src to @a dest with 8 byte reads and writes.
+ *
+ * The memory areas should not overlap.  The addresses @a src and @a dest have
+ * to be aligned on 8 byte boundaries.  The size @a n must be evenly divisible by 8.
+ * The SPE operations @b evxor, @b evlddx and @b evstddx will be used.
+ */
 GLOBAL_FUNCTION mpc55xx_copy_8
 	/* Loop counter = data size / 8 */
 	srwi. r5, r5, 3
@@ -48,7 +77,51 @@ copy_data:
 
 	/* Return */
 	blr
+#endif /*!((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))*/
+
+/**
+ * @fn int mpc55xx_zero_4( void *dest, size_t n)
+ *
+ * @brief Zero all @a n bytes starting at @a dest with 4 byte writes.
+ *
+ * The address @a dest has to be aligned on 4 byte boundaries.  The size @a n
+ * must be evenly divisible by 4.  No SPE operations are used.
+ */
+#if       ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))
+GLOBAL_FUNCTION mpc55xx_zero_32
+GLOBAL_FUNCTION mpc55xx_zero_8
+#endif /* ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */
+GLOBAL_FUNCTION mpc55xx_zero_4
+	/* Create zero */
+	xor r0, r0, r0
 
+	/* Loop counter for the first bytes up to 16 bytes */
+	rlwinm. r9, r4, 29, 30, 31
+	beq zero_more4
+	mtctr r9
+	xor   r5,r5,r5
+
+zero_data4:
+	stwx r0, r5, r3
+	addi r5, r5, 4
+	bdnz zero_data4
+
+zero_more4:
+	/* More than 16 bytes? */
+	srwi. r9, r4, 4
+	beqlr
+	mtctr r9
+
+zero_big_data4:
+	stw r0,  0(r3)
+	stw r0,  4(r3)
+	stw r0,  8(r3)
+	stw r0, 12(r3)
+	addi r3, r3, 16
+	bdnz zero_big_data4
+	/* Return */
+	blr
+#if      !((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))
 /**
  * @fn int mpc55xx_zero_8( void *dest, size_t n)
  *
@@ -95,7 +168,6 @@ zero_big_data:
 	evstddx r0, r3, r8
 	addi r8, r8, 32
 	bdnz zero_big_data
-
 	/* Return */
 	blr
 
@@ -148,3 +220,4 @@ zero_big_line:
 
 	/* Return */
 	blr
+#endif  /*  !((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */
diff --git a/c/src/lib/libcpu/powerpc/mpc55xx/misc/fmpll.S b/c/src/lib/libcpu/powerpc/mpc55xx/misc/fmpll.S
index be6a5d1433..41d37c4b61 100644
--- a/c/src/lib/libcpu/powerpc/mpc55xx/misc/fmpll.S
+++ b/c/src/lib/libcpu/powerpc/mpc55xx/misc/fmpll.S
@@ -53,14 +53,27 @@ GLOBAL_FUNCTION mpc55xx_fmpll_reset_config
 	 */
 	LA r4, FMPLL_ESYNCR2
 
-	DO_SETTING 0(r3)
+	lwz r5, 0(r3)
+	stw r5, 0(r4)
+	msync
 
 	lwz r5, 8(r3)
 	stw r5, (FMPLL_ESYNCR1-FMPLL_ESYNCR2)(r4)	
 	msync
+	bl mpc55xx_fmpll_wait_for_lock
 
 	DO_SETTING 4(r3)
 
+	/*
+	 * switch to PLL clock in SIU
+	 */
+	LA r4, SIU_SYSCLK
+	lwz r5, 0(r4)
+	LWI r6, ~SIU_SYSCLK_SYSCLKSEL_MASK
+	and r5, r5, r6
+	LWI r6, SIU_SYSCLK_SYSCLKSEL_PLL
+	or  r5, r5, r6
+	stw r5, 0(r4)
 #else
 	/*
 	 * for MPC5566: pass in ptr to array with:
@@ -72,7 +85,7 @@ GLOBAL_FUNCTION mpc55xx_fmpll_reset_config
 
 	DO_SETTING 0(r3)
 	DO_SETTING 4(r3)
-#endif
+
 	/* Enable loss-of-clock and loss-of-lock IRQs */
 	lwz r5, 0(r4)
 	LWI r6, FMPLL_SYNCR_LOCIRQ | FMPLL_SYNCR_LOLIRQ
@@ -82,6 +95,7 @@ GLOBAL_FUNCTION mpc55xx_fmpll_reset_config
 	LWI r6, ~FMPLL_SYNCR_LOCRE & ~FMPLL_SYNCR_LOLRE
 	and r5, r5, r6
 	stw r5, 0(r4)
+#endif
 
 	/* Restore link register and return */
 	mtlr r9
@@ -124,20 +138,20 @@ GLOBAL_FUNCTION mpc55xx_get_system_clock
 	rlwinm r5, r3,16, 28, 31
 
 	/* MFD */
-	rlwinm r6, r3,32, 24, 31
+	rlwinm r6, r3,0, 24, 31
 
 	LA r4, FMPLL_ESYNCR2
 	lwz r3, 0(r4)
 	/* ERFD */
-	rlwinm r7, r3,32, 26, 31
+	rlwinm r7, r3,0, 26, 31
 
 	LWI r8, MPC55XX_FMPLL_REF_CLOCK
 	addi r5, r5, 1
 	addi r6, r6,16
 	addi r7, r7, 1
-	mullw r6, r6, r8
-	divw r3, r6, r5
-	divw r3, r3, r7
+	divw r3, r8, r5  /* REF_CLOCK/PREDIV */
+	mullw r3, r6, r3 /* REF_CLOCK/PREDIV*MFD */
+	divw r3, r3, r7  /* REF_CLOCK/PREDIV*MFD/RFD */
 	
 #else
 	LA r4, FMPLL_SYNCR
diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c b/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c
index 009443cca2..2fb5798057 100644
--- a/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c
+++ b/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c
@@ -38,12 +38,12 @@ static void nop_func(){}
 /*
  * default isOn function
  */
-static int not_connected() {return 0;}
+static int not_connected(void) {return 0;}
 
 /*
  * default possible isOn function
  */
-static int connected() {return 1;}
+static int connected(void) {return 1;}
 
 static rtems_irq_connect_data     	rtemsIrq[CPU_IRQ_COUNT];
 static rtems_irq_global_settings     	initial_config;
@@ -76,7 +76,7 @@ static rtems_irq_prio irqPrioTable[CPU_IRQ_COUNT]={
   0
 };
 
-void CPU_USIU_irq_init()
+void CPU_USIU_irq_init(void)
 {
   /*
    * In theory we should initialize two registers at least : SIMASK and
diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors_init.c b/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors_init.c
index 66bc729852..d0d9b1d60d 100644
--- a/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors_init.c
+++ b/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors_init.c
@@ -96,7 +96,7 @@ int except_always_enabled(const rtems_raw_except_connect_data* ptr)
   return 1;
 }
 
-void initialize_exceptions()
+void initialize_exceptions(void)
 {
   int i;
 
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c
index 1121afc9f4..8707a96c4a 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c
@@ -66,6 +66,10 @@ void *ppc_exc_vector_address(unsigned vector)
   }
 
   if (ppc_cpu_has_ivpr_and_ivor()) {
+    /*
+     * XXX: this directly matches the vector offsets in a e200z1, 
+     * which has hardwired IVORs (IVOR0=0,IVOR1=0x10,IVOR2=0x20...) 
+     */
     vector_offset >>= 4;
   }
 
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_categories.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_categories.c
index a331e58350..d71ba7be07 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_categories.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_categories.c
@@ -275,6 +275,8 @@ const ppc_exc_categories *ppc_exc_categories_for_cpu(ppc_cpu_id_t cpu)
       return &psim_category_table;
     case PPC_8540:
       return &e500_category_table;
+    case PPC_e200z0:
+    case PPC_e200z1:
     case PPC_e200z6:
       return &e200_category_table;
     case PPC_5XX:
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c
index c9751ff586..93f0fb5544 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c
@@ -66,26 +66,28 @@ static void ppc_exc_initialize_e200(void)
   /* Interupt vector prefix register */
   MTIVPR(ppc_exc_vector_base);
 
-  /* Interupt vector offset register */
-  MTIVOR(0,  0); /* Critical input */
-  MTIVOR(1,  ppc_exc_vector_address( ASM_MACH_VECTOR));
-  MTIVOR(2,  ppc_exc_vector_address( ASM_PROT_VECTOR));
-  MTIVOR(3,  ppc_exc_vector_address( ASM_ISI_VECTOR));
-  MTIVOR(4,  ppc_exc_vector_address( ASM_EXT_VECTOR));
-  MTIVOR(5,  ppc_exc_vector_address( ASM_ALIGN_VECTOR));
-  MTIVOR(6,  ppc_exc_vector_address( ASM_PROG_VECTOR));
-  MTIVOR(7,  ppc_exc_vector_address( ASM_FLOAT_VECTOR));
-  MTIVOR(8,  ppc_exc_vector_address( ASM_SYS_VECTOR));
-  MTIVOR(9,  0); /* APU unavailable */
-  MTIVOR(10, ppc_exc_vector_address( ASM_BOOKE_DEC_VECTOR));
-  MTIVOR(11, ppc_exc_vector_address( ASM_BOOKE_FIT_VECTOR));
-  MTIVOR(12, ppc_exc_vector_address( ASM_BOOKE_WDOG_VECTOR));
-  MTIVOR(13, ppc_exc_vector_address( ASM_BOOKE_ITLBMISS_VECTOR));
-  MTIVOR(14, ppc_exc_vector_address( ASM_BOOKE_DTLBMISS_VECTOR));
-  MTIVOR(15, ppc_exc_vector_address( ASM_TRACE_VECTOR));
-  MTIVOR(32, ppc_exc_vector_address( ASM_E200_SPE_UNAVAILABLE_VECTOR));
-  MTIVOR(33, ppc_exc_vector_address( ASM_E200_SPE_DATA_VECTOR));
-  MTIVOR(34, ppc_exc_vector_address( ASM_E200_SPE_ROUND_VECTOR));
+  if (ppc_cpu_has_ivor()) {
+    /* Interupt vector offset register */
+    MTIVOR(0,  0); /* Critical input */
+    MTIVOR(1,  ppc_exc_vector_address( ASM_MACH_VECTOR));
+    MTIVOR(2,  ppc_exc_vector_address( ASM_PROT_VECTOR));
+    MTIVOR(3,  ppc_exc_vector_address( ASM_ISI_VECTOR));
+    MTIVOR(4,  ppc_exc_vector_address( ASM_EXT_VECTOR));
+    MTIVOR(5,  ppc_exc_vector_address( ASM_ALIGN_VECTOR));
+    MTIVOR(6,  ppc_exc_vector_address( ASM_PROG_VECTOR));
+    MTIVOR(7,  ppc_exc_vector_address( ASM_FLOAT_VECTOR));
+    MTIVOR(8,  ppc_exc_vector_address( ASM_SYS_VECTOR));
+    MTIVOR(9,  0); /* APU unavailable */
+    MTIVOR(10, ppc_exc_vector_address( ASM_BOOKE_DEC_VECTOR));
+    MTIVOR(11, ppc_exc_vector_address( ASM_BOOKE_FIT_VECTOR));
+    MTIVOR(12, ppc_exc_vector_address( ASM_BOOKE_WDOG_VECTOR));
+    MTIVOR(13, ppc_exc_vector_address( ASM_BOOKE_ITLBMISS_VECTOR));
+    MTIVOR(14, ppc_exc_vector_address( ASM_BOOKE_DTLBMISS_VECTOR));
+    MTIVOR(15, ppc_exc_vector_address( ASM_TRACE_VECTOR));
+    MTIVOR(32, ppc_exc_vector_address( ASM_E200_SPE_UNAVAILABLE_VECTOR));
+    MTIVOR(33, ppc_exc_vector_address( ASM_E200_SPE_DATA_VECTOR));
+    MTIVOR(34, ppc_exc_vector_address( ASM_E200_SPE_ROUND_VECTOR));
+  }
 }
 
 rtems_status_code ppc_exc_initialize(
@@ -140,7 +142,8 @@ rtems_status_code ppc_exc_initialize(
   ppc_exc_msr_bits |= MSR_VE;
 #endif
  
-  if (ppc_cpu_is(PPC_e200z6)) {
+  if (ppc_cpu_is(PPC_e200z1) || 
+      ppc_cpu_is(PPC_e200z6)) {
     ppc_exc_initialize_e200();
   } else if (ppc_cpu_is_bookE() == PPC_BOOKE_STD || ppc_cpu_is_bookE() == PPC_BOOKE_E500) {
     ppc_exc_initialize_e500();
diff --git a/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c b/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c
index de91e7a90a..dab61288e8 100644
--- a/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c
+++ b/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c
@@ -35,7 +35,8 @@ ppc_feature_t      current_ppc_features = {
   .has_8_bats = 0,
   .has_epic = 0,
   .has_shadowed_gprs = 0,
-  .has_ivpr_and_ivor = 0
+  .has_ivpr = 0,
+  .has_ivor = 0
 };
 
 char *get_ppc_cpu_type_name(ppc_cpu_id_t cpu)
@@ -62,6 +63,8 @@ char *get_ppc_cpu_type_name(ppc_cpu_id_t cpu)
     case PPC_8245:		return "MPC8245";
     case PPC_8540:		return "MPC8540";
     case PPC_PSIM:		return "PSIM";
+    case PPC_e200z0:		return "e200z0";
+    case PPC_e200z1:		return "e200z1";
     case PPC_e200z6:		return "e200z6";
     default:
       printk("Unknown CPU value of 0x%x. Please add it to "
@@ -102,6 +105,8 @@ ppc_cpu_id_t get_ppc_cpu_type(void)
     case PPC_8245:
     case PPC_PSIM:
     case PPC_8540:
+    case PPC_e200z0:
+    case PPC_e200z1:
     case PPC_e200z6:
     case PPC_e300c1:
     case PPC_e300c2:
@@ -158,6 +163,8 @@ ppc_cpu_id_t get_ppc_cpu_type(void)
 		current_ppc_features.is_bookE			= PPC_BOOKE_405;
 	break;
   	case PPC_8540:
+  	case PPC_e200z0:
+  	case PPC_e200z1:
   	case PPC_e200z6:
 		current_ppc_features.is_bookE			= PPC_BOOKE_E500;
 	default:
@@ -185,8 +192,14 @@ ppc_cpu_id_t get_ppc_cpu_type(void)
   }
 
 	switch (current_ppc_cpu) {
+		case PPC_e200z0:
+		case PPC_e200z1:
+			current_ppc_features.has_ivpr = 1;
+			current_ppc_features.has_hwivor = 1;
+			break;
 		case PPC_e200z6:
-			current_ppc_features.has_ivpr_and_ivor = 1;
+			current_ppc_features.has_ivpr = 1;
+			current_ppc_features.has_ivor = 1;
 			break;
 		default:
 			break;
diff --git a/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h b/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h
index 95b8e05d2d..a0adf2324c 100644
--- a/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h
+++ b/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h
@@ -55,8 +55,10 @@ typedef enum
   PPC_e300c1  = 0x8083, /* e300c1  core, in MPC83xx*/
   PPC_e300c2  = 0x8084, /* e300c2  core */
   PPC_e300c3  = 0x8085, /* e300c3  core */
-  PPC_e200z6 = 0x8115,
-  PPC_PSIM = 0xfffe,  /* GDB PowerPC simulator -- fake version */
+  PPC_e200z0  = 0x8171,
+  PPC_e200z1  = 0x8144,
+  PPC_e200z6  = 0x8115,
+  PPC_PSIM    = 0xfffe,  /* GDB PowerPC simulator -- fake version */
   PPC_UNKNOWN = 0xffff
 } ppc_cpu_id_t;
 
@@ -79,7 +81,9 @@ typedef struct {
 	unsigned has_8_bats			: 1;
 	unsigned has_epic           : 1;
 	unsigned has_shadowed_gprs  : 1;
-	unsigned has_ivpr_and_ivor  : 1;
+	unsigned has_ivpr           : 1;
+	unsigned has_ivor           : 1;
+	unsigned has_hwivor         : 1;
 } ppc_feature_t;
 
 extern ppc_feature_t   current_ppc_features;
@@ -108,10 +112,17 @@ _PPC_FEAT_DECL(is_60x)
 _PPC_FEAT_DECL(has_8_bats)
 _PPC_FEAT_DECL(has_epic)
 _PPC_FEAT_DECL(has_shadowed_gprs)
-_PPC_FEAT_DECL(has_ivpr_and_ivor)
+_PPC_FEAT_DECL(has_ivpr)
+_PPC_FEAT_DECL(has_ivor)
+_PPC_FEAT_DECL(has_hwivor)
 
 #undef _PPC_FEAT_DECL
 
+static inline unsigned ppc_cpu_has_ivpr_and_ivor() { \
+  return ppc_cpu_has_ivpr() 
+    && (ppc_cpu_has_ivor() || ppc_cpu_has_hwivor());
+}
+
 static inline ppc_cpu_id_t ppc_cpu_current(void)
 {
 	return current_ppc_cpu;