2004-08-03 Jay Monkman <jtm@lopingdog.com>

* .cvsignore, ChangeLog, Makefile.am, README, bsp_specs, configure.ac, times, console/.cvsignore, console/console-io.c, include/.cvsignore, include/bsp.h, include/coverhd.h, include/tm27.h, network/network.c, start/.cvsignore, start/start.S, startup/.cvsignore, startup/bspclean.c, startup/bspstart.c, startup/init5272.c, startup/linkcmds: New files.
author: Jay Monkman <jtm@smoothsmoothie.com> 2004-08-03 05:01:51 +0000
committer: Jay Monkman <jtm@smoothsmoothie.com> 2004-08-03 05:01:51 +0000
commit: 02e708dc257687b6fe5eb624af9020e688094085 (patch)
tree: bf62686a2df10a6069e834c0d10e62c4a0159658 /c/src
parent: 2004-08-02 Jay Monkman <jtm@lopingdog.com> (diff)
download: rtems-02e708dc257687b6fe5eb624af9020e688094085.tar.bz2
23 files changed, 2749 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/m68k/ChangeLog b/c/src/lib/libbsp/m68k/ChangeLog
index 95afd4020b..fda109d643 100644
--- a/c/src/lib/libbsp/m68k/ChangeLog
+++ b/c/src/lib/libbsp/m68k/ChangeLog
@@ -1,3 +1,16 @@
+2004-08-03	Jay Monkman <jtm@lopingdog.com>
+
+	* acinclude.m4: Added CSB360 BSP
+	* csb360/.cvsignore, csb360/ChangeLog, csb360/Makefile.am,
+	csb360/README, csb360/bsp_specs, csb360/configure.ac, csb360/times,
+	csb360/console/.cvsignore, csb360/console/console-io.c,
+	csb360/include/.cvsignore, csb360/include/bsp.h,
+	csb360/include/coverhd.h, csb360/include/tm27.h,
+	csb360/network/network.c, csb360/start/.cvsignore,
+	csb360/start/start.S, csb360/startup/.cvsignore,
+	csb360/startup/bspclean.c, csb360/startup/bspstart.c,
+	csb360/startup/init5272.c, csb360/startup/linkcmds: New files.
+
 2004-02-12	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
 
 	* acinclude.m4: Regenerate.
diff --git a/c/src/lib/libbsp/m68k/acinclude.m4 b/c/src/lib/libbsp/m68k/acinclude.m4
index 4170a9a35d..2e80f1098e 100644
--- a/c/src/lib/libbsp/m68k/acinclude.m4
+++ b/c/src/lib/libbsp/m68k/acinclude.m4
@@ -2,6 +2,8 @@
 AC_DEFUN([RTEMS_CHECK_BSPDIR],
 [
   case "$1" in
+  csb360 )
+    AC_CONFIG_SUBDIRS([csb360]);;
   dmv152 )
     AC_CONFIG_SUBDIRS([dmv152]);;
   gen68302 )
diff --git a/c/src/lib/libbsp/m68k/csb360/.cvsignore b/c/src/lib/libbsp/m68k/csb360/.cvsignore
new file mode 100644
index 0000000000..bfdfd995be
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/.cvsignore
@@ -0,0 +1,14 @@
+aclocal.m4
+autom4te*.cache
+config.cache
+config.guess
+config.log
+config.status
+config.sub
+configure
+depcomp
+install-sh
+Makefile
+Makefile.in
+missing
+mkinstalldirs
diff --git a/c/src/lib/libbsp/m68k/csb360/ChangeLog b/c/src/lib/libbsp/m68k/csb360/ChangeLog
new file mode 100644
index 0000000000..84d5a1ba8d
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/ChangeLog
@@ -0,0 +1,9 @@
+2004-08-03	Jay Monkman <jtm@lopingdog.com>
+
+	* .cvsignore, ChangeLog, Makefile.am, README, bsp_specs, configure.ac,
+	times, console/.cvsignore, console/console-io.c, include/.cvsignore,
+	include/bsp.h, include/coverhd.h, include/tm27.h, network/network.c,
+	start/.cvsignore, start/start.S, startup/.cvsignore,
+	startup/bspclean.c, startup/bspstart.c, startup/init5272.c,
+	startup/linkcmds: New files.
+
diff --git a/c/src/lib/libbsp/m68k/csb360/Makefile.am b/c/src/lib/libbsp/m68k/csb360/Makefile.am
new file mode 100644
index 0000000000..a83eb9207b
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/Makefile.am
@@ -0,0 +1,129 @@
+##
+## $Id$
+##
+
+ACLOCAL_AMFLAGS = -I ../../../../aclocal
+
+include $(top_srcdir)/../../../../automake/compile.am
+include $(top_srcdir)/../../bsp.am
+
+dist_project_lib_DATA = bsp_specs
+
+include_HEADERS = include/bsp.h
+include_HEADERS += include/tm27.h
+nodist_include_HEADERS = include/bspopts.h
+
+EXTRA_PROGRAMS =
+CLEANFILES =
+noinst_DATA =
+
+include_HEADERS += include/coverhd.h
+
+EXTRA_DIST = times
+
+EXTRA_DIST += start/start.S
+start$(LIB_VARIANT).$(OBJEXT): start/start.S
+	$(CPPASCOMPILE) -DASM -o $@ -c $<
+
+project_lib_DATA = start$(LIB_VARIANT).$(OBJEXT)
+
+dist_project_lib_DATA += startup/linkcmds
+
+EXTRA_PROGRAMS += startup.rel
+CLEANFILES += startup.rel
+startup_rel_SOURCES = startup/bspclean.c ../../shared/bsplibc.c \
+    ../../shared/bsppost.c ../../m68k/shared/m68kpretaskinghook.c \
+    startup/bspstart.c startup/init5272.c ../../shared/bootcard.c \
+    ../../shared/main.c ../../shared/sbrk.c ../../m68k/shared/setvec.c \
+    ../../shared/gnatinstallhandler.c
+startup_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_OPTIMIZE_V)
+startup_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+
+EXTRA_PROGRAMS += startup_g.rel
+CLEANFILES += startup_g.rel
+startup_g_rel_SOURCES = $(startup_rel_SOURCES)
+startup_g_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_DEBUG_V)
+startup_g_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+
+noinst_DATA += startup$(LIB_VARIANT).rel
+
+# console
+EXTRA_PROGRAMS += console.rel
+CLEANFILES += console.rel
+console_rel_SOURCES = console/console-io.c ../../shared/console-polled.c
+console_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_OPTIMIZE_V)
+console_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+
+EXTRA_PROGRAMS += console_g.rel
+CLEANFILES += console_g.rel
+console_g_rel_SOURCES = $(console_rel_SOURCES)
+console_g_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_DEBUG_V)
+console_g_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+
+noinst_DATA += console$(LIB_VARIANT).rel
+
+EXTRA_LIBRARIES = libbsp.a
+CLEANFILES += libbsp.a
+libbsp_a_SOURCES =
+libbsp_a_LIBADD = startup$(LIB_VARIANT).rel  console$(LIB_VARIANT).rel
+libbsp_a_LIBADD += \
+    ../../../libcpu/@RTEMS_CPU@/shared/misc$(LIB_VARIANT).rel \
+    ../../../libcpu/@RTEMS_CPU@/mcf5272/clock$(LIB_VARIANT).rel \
+    ../../../libcpu/@RTEMS_CPU@/mcf5272/timer$(LIB_VARIANT).rel
+
+EXTRA_LIBRARIES += libbsp_g.a
+CLEANFILES += libbsp_g.a
+libbsp_g_a_SOURCES = $(libbsp_a_SOURCES)
+libbsp_g_a_LIBADD = $(libbsp_a_LIBADD)
+
+noinst_DATA += libbsp$(LIB_VARIANT).a
+
+all-local: $(PREINSTALL_FILES) $(TMPINSTALL_FILES)
+
+PREINSTALL_DIRS =
+PREINSTALL_FILES =
+TMPINSTALL_FILES =
+
+$(PROJECT_INCLUDE)/$(dirstamp):
+	@$(mkdir_p) $(PROJECT_INCLUDE)
+	@: > $(PROJECT_INCLUDE)/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
+
+$(PROJECT_LIB)/$(dirstamp):
+	@$(mkdir_p) $(PROJECT_LIB)
+	@: > $(PROJECT_LIB)/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
+
+$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
+PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
+
+$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
+
+$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
+
+$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
+
+$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
+
+$(PROJECT_LIB)/start$(LIB_VARIANT).$(OBJEXT): start$(LIB_VARIANT).$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/start$(LIB_VARIANT).$(OBJEXT)
+TMPINSTALL_FILES += $(PROJECT_LIB)/start$(LIB_VARIANT).$(OBJEXT)
+
+$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
+PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
+
+CLEANFILES += $(PREINSTALL_FILES)
+DISTCLEANFILES = $(PREINSTALL_DIRS)
+CLEANFILES += $(TMPINSTALL_FILES)
+
+include $(top_srcdir)/../../../../automake/local.am
diff --git a/c/src/lib/libbsp/m68k/csb360/README b/c/src/lib/libbsp/m68k/csb360/README
new file mode 100644
index 0000000000..a70e318c7d
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/README
@@ -0,0 +1,51 @@
+#
+# README for CSB360
+#
+# Copyright (C) 2004 by Cogent Computer Systems
+# Author: Jay Monkman <jtm@lopingdog.com>
+#
+# @(#) README,v 1.1 2001/10/26 19:30:10 joel Exp
+#
+
+BSP NAME:	    csb360
+BOARD:              Cogent CSB360 
+BUS:                none
+CPU FAMILY:         Motorola ColdFire MCF5272
+COPROCESSORS:       none
+MODE:               not applicable
+DEBUG MONITOR:      none (Hardware provides BDM)
+
+PERIPHERALS
+===========
+TIMERS:             
+  RESOLUTION:       
+SERIAL PORTS:       
+REAL-TIME CLOCK:    
+NVRAM:              
+DMA:                
+VIDEO:              
+SCSI:               
+NETWORKING:         
+I2C BUS:            
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       
+IOSUPP DRIVER:      
+SHMSUPP:            
+TIMER DRIVER:       
+I2C DRIVER:         
+
+STDIO
+=====
+PORT:               
+ELECTRICAL:         
+BAUD:               
+BITS PER CHARACTER: 
+PARITY:             
+STOP BITS:          
+
+NOTES
+=====
+
+
diff --git a/c/src/lib/libbsp/m68k/csb360/bsp_specs b/c/src/lib/libbsp/m68k/csb360/bsp_specs
new file mode 100644
index 0000000000..37a30fe46e
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/bsp_specs
@@ -0,0 +1,28 @@
+%rename cpp old_cpp
+%rename lib old_lib
+%rename endfile old_endfile
+%rename startfile old_startfile
+%rename link old_link
+
+*cpp:
+%(old_cpp) %{qrtems: -D__embedded__} -Asystem(embedded)
+
+*lib:
+%{!qrtems: %(old_lib)} %{!nostdlib: %{qrtems: --start-group \
+%{!qrtems_debug: -lrtemsbsp -lrtemscpu} %{qrtems_debug: -lrtemsbsp_g -lrtemscpu_g} \
+-lc -lgcc --end-group \
+%{!qnolinkcmds: \
+%{!qflash: -T linkcmds%s} %{qflash: -T linkcmds.flash%s}}}}
+
+*startfile:
+%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: \
+%{!qrtems_debug: start.o%s} \
+%{qrtems_debug: start_g.o%s} \
+crti.o%s crtbegin.o%s }}
+
+*link:
+%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N -e start} \
+%{qclock=*: -defsym _SYS_CLOCK_FREQUENCY=%*}
+
+*endfile:
+%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s}
diff --git a/c/src/lib/libbsp/m68k/csb360/configure.ac b/c/src/lib/libbsp/m68k/csb360/configure.ac
new file mode 100644
index 0000000000..54a6ac63cb
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/configure.ac
@@ -0,0 +1,22 @@
+## Process this file with autoconf to produce a configure script.
+## 
+## $Id$
+
+AC_PREREQ(2.59)
+AC_INIT([rtems-c-src-lib-libbsp-m68k-csb360],[_RTEMS_VERSION],[rtems-bugs@rtems.com])
+AC_CONFIG_SRCDIR([bsp_specs])
+RTEMS_TOP(../../../../../..)
+
+RTEMS_CANONICAL_TARGET_CPU
+AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.8])
+RTEMS_BSP_CONFIGURE
+
+RTEMS_PROG_CC_FOR_TARGET
+RTEMS_CANONICALIZE_TOOLS
+RTEMS_PROG_CCAS
+
+RTEMS_CHECK_NETWORKING
+
+# Explicitly list all Makefiles here
+AC_CONFIG_FILES([Makefile])
+AC_OUTPUT
diff --git a/c/src/lib/libbsp/m68k/csb360/console/.cvsignore b/c/src/lib/libbsp/m68k/csb360/console/.cvsignore
new file mode 100644
index 0000000000..282522db03
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/console/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/c/src/lib/libbsp/m68k/csb360/console/console-io.c b/c/src/lib/libbsp/m68k/csb360/console/console-io.c
new file mode 100644
index 0000000000..302a12bdef
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/console/console-io.c
@@ -0,0 +1,96 @@
+/*
+ *  This file contains the hardware specific portions of the TTY driver
+ *  for the serial ports on the mcf5272
+ *
+ *  COPYRIGHT (c) 1989-2000.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <rtems/libio.h>
+#include <mcf5272/mcf5272.h>
+
+volatile g_cnt = 0;
+
+/*
+ *  console_initialize_hardware
+ *
+ *  This routine initializes the console hardware.
+ *
+ */
+
+void console_initialize_hardware(void)
+{
+}
+
+
+/*
+ *  console_outbyte_polled
+ *
+ *  This routine transmits a character using polling.
+ */
+
+void console_outbyte_polled(
+  int  port,
+  char ch
+)
+{
+    uart_regs_t *uart;
+    int i;
+    if (port == 0) {
+        uart = g_uart0_regs;
+    } else {
+        uart = g_uart1_regs;
+    }
+
+    /* wait for the fifo to make room */
+/*    while ((uart->usr & MCF5272_USR_TXRDY) == 0) { */
+    while ((uart->ucsr & MCF5272_USR_TXRDY) == 0) {
+        continue;
+    }
+    
+    uart->udata = ch;
+    for (i = 0; i < 1000; i++) g_cnt++;
+}
+
+/*
+ *  console_inbyte_nonblocking 
+ *
+ *  This routine polls for a character.
+ */
+
+int console_inbyte_nonblocking(
+  int port
+)
+{
+    uart_regs_t *uart;
+    unsigned char c;
+
+    if (port == 0) {
+        uart = g_uart0_regs;
+    } else {
+        uart = g_uart1_regs;
+    }
+
+/*    if (uart->usr & MCF5272_USR_RXRDY) { */
+    if (uart->ucsr & MCF5272_USR_RXRDY) {
+        c = (char)uart->udata;
+        return c;
+    } else {
+        return -1;
+    }
+}
+
+#include <rtems/bspIo.h>
+
+void mcf5272_output_char(char c) { console_outbyte_polled( 0, c ); }
+
+BSP_output_char_function_type           BSP_output_char = mcf5272_output_char;
+BSP_polling_getchar_function_type       BSP_poll_char = NULL;
+
diff --git a/c/src/lib/libbsp/m68k/csb360/include/.cvsignore b/c/src/lib/libbsp/m68k/csb360/include/.cvsignore
new file mode 100644
index 0000000000..b0be3c54e6
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/include/.cvsignore
@@ -0,0 +1,6 @@
+Makefile
+Makefile.in
+bspopts.h
+bspopts.h.in
+stamp-h
+stamp-h.in
diff --git a/c/src/lib/libbsp/m68k/csb360/include/bsp.h b/c/src/lib/libbsp/m68k/csb360/include/bsp.h
new file mode 100644
index 0000000000..c41d8355b1
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/include/bsp.h
@@ -0,0 +1,218 @@
+/*
+ * Board Support Package for CSB360 evaluation board
+ * BSP definitions
+ *
+ * Copyright 2004 Cogent Computer Systems
+ * Author: Jay Monkman <jtm@lopingdog.com>
+ *
+ * Derived from mcf5206elite BSP:
+ * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
+ * Author: Victor V. Vengerov <vvv@oktet.ru>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ *
+ * http://www.OARcorp.com/rtems/license.html.
+ *
+ *  bsp.h,v 1.1 2001/10/26 19:30:10 joel Exp
+ */
+
+#ifndef __CSB360_BSP_H__
+#define __CSB360_BSP_H__
+
+#include <mcf5272/mcf5272.h>
+
+
+/*** Board resources allocation ***/
+#define BSP_MEM_ADDR_SRAM 0x20000000
+#define BSP_MEM_SIZE_SRAM 4096
+
+/* Location and size of sdram. Note this includes space used by
+ * umon.
+ */
+#define BSP_MEM_ADDR_SDRAM 0x00000000
+#define BSP_MEM_MASK_SDRAM 0x01ffffff
+#define BSP_MEM_SIZE_SDRAM (32 * 1024 * 1024)
+
+/* Address to put SIM Modules */
+#define BSP_MBAR 0x10000000
+
+/* Address to put SRAM */
+#define BSP_RAMBAR BSP_MEM_ADDR_SRAM
+
+/* Interrupt Vectors */
+#define BSP_INTVEC_INT1   65
+#define BSP_INTVEC_INT2   66
+#define BSP_INTVEC_INT3   67
+#define BSP_INTVEC_INT4   68
+#define BSP_INTVEC_TMR0   69
+#define BSP_INTVEC_TMR1   70
+#define BSP_INTVEC_TMR2   71
+#define BSP_INTVEC_TMR3   72
+#define BSP_INTVEC_UART1  73
+#define BSP_INTVEC_UART2  74
+#define BSP_INTVEC_PLIP   75
+#define BSP_INTVEC_PLIA   76
+#define BSP_INTVEC_USB0   77
+#define BSP_INTVEC_USB1   78
+#define BSP_INTVEC_USB2   79
+#define BSP_INTVEC_USB3   80
+#define BSP_INTVEC_USB4   81
+#define BSP_INTVEC_USB5   82
+#define BSP_INTVEC_USB6   83
+#define BSP_INTVEC_USB7   84
+#define BSP_INTVEC_DMA    85
+#define BSP_INTVEC_ERX    86
+#define BSP_INTVEC_ETX    87
+#define BSP_INTVEC_ENTC   88
+#define BSP_INTVEC_QSPI   89
+#define BSP_INTVEC_INT5   90
+#define BSP_INTVEC_INT6   91
+#define BSP_INTVEC_SWTO   92
+
+#define BSP_INTLVL_INT1   1
+#define BSP_INTLVL_INT2   1
+#define BSP_INTLVL_INT3   1
+#define BSP_INTLVL_INT4   1
+#define BSP_INTLVL_TMR0   1
+#define BSP_INTLVL_TMR1   1
+#define BSP_INTLVL_TMR2   1
+#define BSP_INTLVL_TMR3   1
+#define BSP_INTLVL_UART1  1
+#define BSP_INTLVL_UART2  1
+#define BSP_INTLVL_PLIP   1
+#define BSP_INTLVL_PLIA   1
+#define BSP_INTLVL_USB0   1
+#define BSP_INTLVL_USB1   1
+#define BSP_INTLVL_USB2   1
+#define BSP_INTLVL_USB3   1
+#define BSP_INTLVL_USB4   1
+#define BSP_INTLVL_USB5   1
+#define BSP_INTLVL_USB6   1
+#define BSP_INTLVL_USB7   1
+#define BSP_INTLVL_DMA    1
+#define BSP_INTLVL_ERX    1
+#define BSP_INTLVL_ETX    1
+#define BSP_INTLVL_ENTC   1
+#define BSP_INTLVL_QSPI   1
+#define BSP_INTLVL_INT5   1
+#define BSP_INTLVL_INT6   1
+#define BSP_INTLVL_SWTO   1
+
+
+
+#ifndef ASM
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <bspopts.h>
+#include <rtems.h>
+#include <rtems/console.h>
+#include <rtems/iosupp.h>
+#include <rtems/clockdrv.h>
+
+struct rtems_bsdnet_ifconfig;
+extern int rtems_enet_driver_attach (struct rtems_bsdnet_ifconfig *config);
+#define RTEMS_BSP_NETWORK_DRIVER_NAME	"eth0"
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH	rtems_enet_driver_attach
+
+/*
+ *  confdefs.h overrides for this BSP:
+ *   - termios serial ports (defaults to 1)
+ *   - Interrupt stack space is not minimum if defined.
+ */
+
+#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2
+#define CONFIGURE_INTERRUPT_STACK_MEMORY  (4 * 1024)
+
+/* System frequency */
+#define BSP_SYSTEM_FREQUENCY (66 * 1000 * 1000)
+
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+/*
+ *  Simple spin delay in microsecond units for device drivers.
+ *  This is very dependent on the clock speed of the target.
+ */
+
+#define delay( microseconds ) \
+  { register rtems_unsigned32 _delay=(microseconds); \
+    register rtems_unsigned32 _tmp=123; \
+    asm volatile( "0: \
+                     nbcd      %0 ; \
+                     nbcd      %0 ; \
+                     dbf       %1,0b" \
+                  : "=d" (_tmp), "=d" (_delay) \
+                  : "0"  (_tmp), "1"  (_delay) ); \
+  }
+
+/* Constants */
+
+/* Structures */
+
+/*
+ *  Device Driver Table Entries
+ */
+
+/*
+ * NOTE: Use the standard Console driver entry
+ */
+ 
+/*
+ * NOTE: Use the standard Clock driver entry
+ */
+
+/*
+ * Real-Time Clock Driver Table Entry
+ * NOTE: put this entry to the device driver table AFTER I2C bus driver!
+ */
+#define RTC_DRIVER_TABLE_ENTRY \
+    { rtc_initialize, NULL, NULL, NULL, NULL, NULL }
+extern rtems_device_driver rtc_initialize(
+    rtems_device_major_number major,
+    rtems_device_minor_number minor,
+    void *arg
+);
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+
+extern m68k_isr_entry M68Kvec[];   /* vector table address */
+
+extern rtems_isr (*rtems_clock_hook)(rtems_vector_number);
+
+/* functions */
+
+void bsp_cleanup( void );
+
+m68k_isr_entry set_vector(
+  rtems_isr_entry     handler,
+  rtems_vector_number vector,
+  int                 type
+);
+
+/*
+ * Values assigned by link editor
+ */
+extern void *_RomBase, *_RamBase;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ASM */
+
+#endif
+/* end of include file */
diff --git a/c/src/lib/libbsp/m68k/csb360/include/coverhd.h b/c/src/lib/libbsp/m68k/csb360/include/coverhd.h
new file mode 100644
index 0000000000..e102b5ddbf
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/include/coverhd.h
@@ -0,0 +1,82 @@
+/*
+ * This file based on output of tmoverhd test.
+ *
+ * $Id$
+ */
+
+#ifndef __COVERHD_H__
+#define __COVERHD_H__
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 0
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 0
+#define CALLING_OVERHEAD_TASK_CREATE 1
+#define CALLING_OVERHEAD_TASK_IDENT 0
+#define CALLING_OVERHEAD_TASK_START 0
+#define CALLING_OVERHEAD_TASK_RESTART 0
+#define CALLING_OVERHEAD_TASK_DELETE 0
+#define CALLING_OVERHEAD_TASK_SUSPEND 0
+#define CALLING_OVERHEAD_TASK_RESUME 0
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY 0
+#define CALLING_OVERHEAD_TASK_MODE 0
+#define CALLING_OVERHEAD_TASK_GET_NOTE 0
+#define CALLING_OVERHEAD_TASK_SET_NOTE 0
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN 2
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER 0
+#define CALLING_OVERHEAD_INTERRUPT_CATCH 0
+#define CALLING_OVERHEAD_CLOCK_GET 2
+#define CALLING_OVERHEAD_CLOCK_SET 2
+#define CALLING_OVERHEAD_CLOCK_TICK 0
+#define CALLING_OVERHEAD_TIMER_CREATE 0
+#define CALLING_OVERHEAD_TIMER_DELETE 0
+#define CALLING_OVERHEAD_TIMER_IDENT 0
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 0
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 2
+#define CALLING_OVERHEAD_TIMER_RESET 0
+#define CALLING_OVERHEAD_TIMER_CANCEL 0
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE 1
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE 0
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT 0
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 0
+#define CALLING_OVERHEAD_EVENT_SEND 0
+#define CALLING_OVERHEAD_EVENT_RECEIVE 0
+#define CALLING_OVERHEAD_SIGNAL_CATCH 0
+#define CALLING_OVERHEAD_SIGNAL_SEND 0
+#define CALLING_OVERHEAD_PARTITION_CREATE 1
+#define CALLING_OVERHEAD_PARTITION_IDENT 0
+#define CALLING_OVERHEAD_PARTITION_DELETE 0
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 0
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 0
+#define CALLING_OVERHEAD_REGION_CREATE 1
+#define CALLING_OVERHEAD_REGION_IDENT 0
+#define CALLING_OVERHEAD_REGION_DELETE 0
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT 1
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 0
+#define CALLING_OVERHEAD_PORT_CREATE 1
+#define CALLING_OVERHEAD_PORT_IDENT 0
+#define CALLING_OVERHEAD_PORT_DELETE 0
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0
+#define CALLING_OVERHEAD_IO_INITIALIZE 0
+#define CALLING_OVERHEAD_IO_OPEN 0
+#define CALLING_OVERHEAD_IO_CLOSE 0
+#define CALLING_OVERHEAD_IO_READ 0
+#define CALLING_OVERHEAD_IO_WRITE 0
+#define CALLING_OVERHEAD_IO_CONTROL 0
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 0
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 0
+
+#endif /* __COVERHD_H__ */
diff --git a/c/src/lib/libbsp/m68k/csb360/include/tm27.h b/c/src/lib/libbsp/m68k/csb360/include/tm27.h
new file mode 100644
index 0000000000..44886acafc
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/include/tm27.h
@@ -0,0 +1,33 @@
+/*
+ *  tm27.h
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ *  $Id$
+ */
+
+#ifndef _RTEMS_TMTEST27
+#error "This is an RTEMS internal file you must not include directly."
+#endif
+
+#ifndef __tm27_h
+#define __tm27_h
+
+/*
+ *  Stuff for Time Test 27
+ *  Don't bother with hardware -- just use a software-interrupt
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector( handler ) set_vector( (handler), 34, 1 )
+
+#define Cause_tm27_intr()	asm volatile ("trap #2");
+
+#define Clear_tm27_intr() /* empty */
+
+#define Lower_tm27_intr() /* empty */
+
+#endif
diff --git a/c/src/lib/libbsp/m68k/csb360/network/network.c b/c/src/lib/libbsp/m68k/csb360/network/network.c
new file mode 100644
index 0000000000..6c29a2ebba
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/network/network.c
@@ -0,0 +1,984 @@
+/*
+ * RTEMS/TCPIP driver for MCF5272 Ethernet
+ *
+ *  Modified for MPC860 by Jay Monkman (jmonkman@lopingdog.com)
+ *
+ *  This supports Ethernet on either SCC1 or the FEC of the MPC860T.
+ *  Right now, we only do 10 Mbps, even with the FEC. The function
+ *  rtems_enet_driver_attach determines which one to use. Currently,
+ *  only one may be used at a time.
+ *  
+ *  Based on the MC68360 network driver by
+ *  W. Eric Norum
+ *  Saskatchewan Accelerator Laboratory
+ *  University of Saskatchewan
+ *  Saskatoon, Saskatchewan, CANADA
+ *  eric@skatter.usask.ca
+ *
+ *  This supports ethernet on SCC1. Right now, we only do 10 Mbps.
+ *
+ *  Modifications by Darlene Stewart <Darlene.Stewart@iit.nrc.ca>
+ *  and Charles-Antoine Gauthier <charles.gauthier@iit.nrc.ca>
+ *  Copyright (c) 1999, National Research Council of Canada
+ *
+ *  network.c,v 1.9 2002/11/04 22:18:26 joel Exp
+ */
+#include <bsp.h>
+#include <stdio.h>
+#include <rtems/error.h>
+#include <rtems/rtems_bsdnet.h>
+
+#include <sys/param.h>
+#include <sys/mbuf.h>
+#include <sys/socket.h>
+#include <sys/sockio.h>
+
+#include <net/if.h>
+
+#include <netinet/in.h>
+#include <netinet/if_ether.h>
+
+#include <sys/types.h>
+#include <sys/socket.h>
+#include <arpa/inet.h>
+
+/*
+ * Number of interfaces supported by this driver
+ */
+#define NIFACES 1
+
+/*
+ * Default number of buffer descriptors set aside for this driver.
+ * The number of transmit buffer descriptors has to be quite large
+ * since a single frame often uses four or more buffer descriptors.
+ */
+#define RX_BUF_COUNT     32
+#define TX_BUF_COUNT     16
+#define TX_BD_PER_BUF    4
+
+#define INET_ADDR_MAX_BUF_SIZE (sizeof "255.255.255.255")
+
+
+/*
+ * RTEMS event used by interrupt handler to signal daemons.
+ * This must *not* be the same event used by the TCP/IP task synchronization.
+ */
+#define INTERRUPT_EVENT RTEMS_EVENT_1
+
+/*
+ * RTEMS event used to start transmit daemon.
+ * This must not be the same as INTERRUPT_EVENT.
+ */
+#define START_TRANSMIT_EVENT RTEMS_EVENT_2
+
+/*
+ * Receive buffer size -- Allow for a full ethernet packet plus CRC (1518).
+ * Round off to nearest multiple of RBUF_ALIGN.
+ */
+#define MAX_MTU_SIZE	1518
+#define RBUF_ALIGN		4
+#define RBUF_SIZE       ((MAX_MTU_SIZE + RBUF_ALIGN) & ~RBUF_ALIGN)
+
+#if (MCLBYTES < RBUF_SIZE)
+# error "Driver must have MCLBYTES > RBUF_SIZE"
+#endif
+
+typedef struct {
+    unsigned16 status;
+    unsigned16 length;
+    void *buffer;
+} bd_t;
+#define MCF5272_BD_READY       (bit(15))
+#define MCF5272_BD_TO1         (bit(14))
+#define MCF5272_BD_WRAP        (bit(13))
+#define MCF5272_BD_TO2         (bit(12))
+#define MCF5272_BD_LAST        (bit(11))
+#define MCF5272_BD_TX_CRC          (bit(10))
+#define MCF5272_BD_DEFER       (bit(9))
+#define MCF5272_BD_HEARTBEAT   (bit(8))
+#define MCF5272_BD_LATE_COLLISION       (bit(7))
+#define MCF5272_BD_RETRY_LIMIT          (bit(6))
+#define MCF5272_BD_UNDERRUN          (bit(1))
+#define MCF5272_BD_CARRIER_LOST         (bit(0))
+
+#define MCF5272_BD_EMPTY           (bit(15))
+#define MCF5272_BD_RO1         (bit(14))
+#define MCF5272_BD_WRAP        (bit(13))
+#define MCF5272_BD_RO2         (bit(12))
+#define MCF5272_BD_M           (bit(8))
+#define MCF5272_BD_BC          (bit(7))
+#define MCF5272_BD_MC          (bit(6))
+#define MCF5272_BD_LONG          (bit(5))
+#define MCF5272_BD_NONALIGNED          (bit(4))
+#define MCF5272_BD_SHORT          (bit(3))
+#define MCF5272_BD_CRC_ERROR          (bit(2))
+#define MCF5272_BD_OVERRUN          (bit(1))
+#define MCF5272_BD_TRUNCATED          (bit(0))
+
+
+/*
+ * Per-device data
+ */
+struct mcf5272_enet_struct {
+    struct arpcom           arpcom;
+    struct mbuf             **rxMbuf;
+    struct mbuf             **txMbuf;
+    int                     acceptBroadcast;
+    int                     rxBdCount;
+    int                     txBdCount;
+    int                     txBdHead;
+    int                     txBdTail;
+    int                     txBdActiveCount;
+    bd_t                   *rxBdBase;
+    bd_t                   *txBdBase;
+    rtems_id                rxDaemonTid;
+    rtems_id                txDaemonTid;
+    
+    /*
+     * Statistics
+     */
+    unsigned long   rxInterrupts;
+    unsigned long   rxNotFirst;
+    unsigned long   rxNotLast;
+    unsigned long   rxGiant;
+    unsigned long   rxNonOctet;
+    unsigned long   rxRunt;
+    unsigned long   rxBadCRC;
+    unsigned long   rxOverrun;
+    unsigned long   rxTruncated;
+    
+    unsigned long   txInterrupts;
+    unsigned long   txDeferred;
+    unsigned long   txHeartbeat;
+    unsigned long   txLateCollision;
+    unsigned long   txRetryLimit;
+    unsigned long   txUnderrun;
+    unsigned long   txLostCarrier;
+    unsigned long   txRawWait;
+};
+static struct mcf5272_enet_struct enet_driver[NIFACES];
+
+
+void dump_enet_regs(void)
+{
+    printf("**************************************************************\n");
+   printf("ecr:   0x%08x  eir:   0x%08x  eimr:  0x%08x  ivsr:  0x%08x\n\r", 
+          g_enet_regs->ecr, g_enet_regs->eir,     
+          g_enet_regs->eimr, g_enet_regs->ivsr);  
+   printf("rdar:  0x%08x  tdar:  0x%08x  mmfr:  0x%08x  mscr:  0x%08x\n\r", 
+          g_enet_regs->rdar, g_enet_regs->tdar,     
+          g_enet_regs->mmfr, g_enet_regs->mscr);  
+   printf("frbr:  0x%08x  frsr:  0x%08x  tfwr:  0x%08x  tfsr:  0x%08x\n\r", 
+          g_enet_regs->frbr, g_enet_regs->frsr,     
+          g_enet_regs->tfwr, g_enet_regs->tfsr);  
+   printf("rcr:   0x%08x  mflr:  0x%08x  tcr:   0x%08x  malr:  0x%08x\n\r", 
+          g_enet_regs->rcr, g_enet_regs->mflr,
+          g_enet_regs->tcr, g_enet_regs->malr);  
+   printf("maur:  0x%08x  htur:  0x%08x  htlr:  0x%08x  erdsr: 0x%08x\n\r", 
+          g_enet_regs->maur, g_enet_regs->htur,     
+          g_enet_regs->htlr, g_enet_regs->erdsr);  
+   printf("etdsr: 0x%08x  emrbr: 0x%08x\n\r", 
+          g_enet_regs->etdsr, g_enet_regs->emrbr);  
+}
+
+
+
+
+/*#define cp printk("%s:%d\n\r", __FUNCTION__, __LINE__) */
+#define cp 
+#define mcf5272_bd_allocate(_n_) malloc((_n_) * sizeof(bd_t), 0, M_NOWAIT)
+
+
+
+rtems_isr enet_rx_isr(rtems_vector_number vector)
+{
+    cp;
+    /*
+     * Frame received?
+     */
+    if (g_enet_regs->eir & MCF5272_ENET_EIR_RXF) {
+        cp;
+        g_enet_regs->eir = MCF5272_ENET_EIR_RXF;
+        enet_driver[0].rxInterrupts++;
+        rtems_event_send (enet_driver[0].rxDaemonTid, INTERRUPT_EVENT);
+    }
+    cp;
+}
+
+rtems_isr enet_tx_isr(rtems_vector_number vector)
+{
+    cp;
+    /*
+     * Buffer transmitted or transmitter error?
+     */
+    if (g_enet_regs->eir & MCF5272_ENET_EIR_TXF) {
+        cp;
+        g_enet_regs->eir = MCF5272_ENET_EIR_TXF;
+        enet_driver[0].txInterrupts++;
+        rtems_event_send (enet_driver[0].txDaemonTid, INTERRUPT_EVENT);
+    }
+    cp;
+}
+
+
+/*
+ * Initialize the ethernet hardware
+ */
+
+
+static void
+mcf5272_enet_initialize_hardware (struct mcf5272_enet_struct *sc)
+{
+    int i;
+    unsigned char *hwaddr;
+    unsigned32 icr;
+    /*
+     * Issue reset to FEC
+     */
+    g_enet_regs->ecr=0x1;
+    
+    /*
+     * Set the TX and RX fifo sizes. For now, we'll split it evenly
+     */
+    /* If you uncomment these, the FEC will not work right.
+       g_enet_regs->r_fstart = ((g_enet_regs->r_bound & 0x3ff) >> 2) & 0x3ff;
+       g_enet_regs->x_fstart = 0;
+    */
+    
+    /* Copy mac address to device */
+    
+    hwaddr = sc->arpcom.ac_enaddr;
+    
+    g_enet_regs->malr = (hwaddr[0] << 24 |
+                         hwaddr[1] << 16 |
+                         hwaddr[2] << 8 |
+                         hwaddr[3]);
+    g_enet_regs->maur = (hwaddr[4] << 24 |
+                         hwaddr[5] << 16);
+
+    /*
+     * Clear the hash table
+     */
+    g_enet_regs->htlr = 0;
+    g_enet_regs->htur  = 0;
+    
+    /*
+     * Set up receive buffer size
+     */
+    g_enet_regs->emrbr = 0x5f0; /* set to 1520 */
+    
+    /*
+     * Allocate mbuf pointers
+     */
+    sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, 
+                         M_MBUF, M_NOWAIT);
+    sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, 
+                         M_MBUF, M_NOWAIT);
+    if (!sc->rxMbuf || !sc->txMbuf) {
+        rtems_panic ("No memory for mbuf pointers");
+    }
+    
+    /*
+     * Set receiver and transmitter buffer descriptor bases
+     */
+    sc->rxBdBase = mcf5272_bd_allocate(sc->rxBdCount);
+    sc->txBdBase = mcf5272_bd_allocate(sc->txBdCount);
+    g_enet_regs->erdsr = (int)sc->rxBdBase;
+    g_enet_regs->etdsr = (int)sc->txBdBase;
+    
+    /*
+     * Set up Receive Control Register:
+     *   Not promiscuous mode
+     *   MII mode
+     *   Full duplex
+     *   No loopback
+     */
+    g_enet_regs->rcr = 0x00000004;
+    
+    /*
+     * Set up Transmit Control Register:
+     *   Full duplex
+     *   No heartbeat
+     */
+    g_enet_regs->tcr = 0x00000004;
+    
+    /*
+     * Set MII speed to 2.5 MHz for 25 Mhz system clock  
+     */
+    g_enet_regs->mscr = 0x0a;
+    g_enet_regs->mmfr = 0x58021000;
+    
+    /*
+     * Set up receive buffer descriptors
+     */
+    for (i = 0 ; i < sc->rxBdCount ; i++) {
+        (sc->rxBdBase + i)->status = 0;
+    }
+  
+    /*
+     * Set up transmit buffer descriptors
+     */
+    for (i = 0 ; i < sc->txBdCount ; i++) {
+        (sc->txBdBase + i)->status = 0;
+        sc->txMbuf[i] = NULL;
+    }
+
+    sc->txBdHead = sc->txBdTail = 0;
+    sc->txBdActiveCount = 0;
+  
+    /*
+     * Mask all FEC interrupts and clear events
+     */
+    g_enet_regs->eimr = (MCF5272_ENET_EIR_TXF | 
+                        MCF5272_ENET_EIR_RXF);
+    g_enet_regs->eir = ~0;
+
+    /*
+     * Set up interrupts
+     */
+    set_vector(enet_rx_isr, BSP_INTVEC_ERX, 1);
+    set_vector(enet_tx_isr, BSP_INTVEC_ETX, 1);
+
+    /* Configure ethernet interrupts */
+    icr = g_intctrl_regs->icr3;
+    icr = icr & ~((MCF5272_ICR3_ERX_MASK | MCF5272_ICR3_ERX_PI) | 
+                  (MCF5272_ICR3_ETX_MASK | MCF5272_ICR3_ETX_PI));
+    icr |= ((MCF5272_ICR3_ERX_IPL(BSP_INTLVL_ERX) | MCF5272_ICR3_ERX_PI)|
+            (MCF5272_ICR3_ETX_IPL(BSP_INTLVL_ETX) | MCF5272_ICR3_ETX_PI));
+    g_intctrl_regs->icr3 = icr;
+    
+}
+
+
+/*
+ * Soak up buffer descriptors that have been sent.
+ * Note that a buffer descriptor can't be retired as soon as it becomes
+ * ready. The MPC860 manual (MPC860UM/AD 07/98 Rev.1) and the MPC821
+ * manual state that, "If an Ethernet frame is made up of multiple
+ * buffers, the user should not reuse the first buffer descriptor until
+ * the last buffer descriptor of the frame has had its ready bit cleared
+ * by the CPM".
+ */
+static void
+mcf5272_enet_retire_tx_bd (struct mcf5272_enet_struct *sc)
+{
+    rtems_unsigned16 status;
+    int i;
+    int nRetired;
+    struct mbuf *m, *n;
+    
+    i = sc->txBdTail;
+    nRetired = 0;
+    while ((sc->txBdActiveCount != 0) &&
+           (((status = sc->txBdBase[i].status) & MCF5272_BD_READY) == 0)) {
+        /*
+         * See if anything went wrong
+         */
+        if (status & (MCF5272_BD_DEFER |
+                      MCF5272_BD_HEARTBEAT |
+                      MCF5272_BD_LATE_COLLISION |
+                      MCF5272_BD_RETRY_LIMIT |
+                      MCF5272_BD_UNDERRUN |
+                      MCF5272_BD_CARRIER_LOST)) {
+            /*
+             * Check for errors which stop the transmitter.
+             */
+            if (status & (MCF5272_BD_LATE_COLLISION |
+                          MCF5272_BD_RETRY_LIMIT |
+                          MCF5272_BD_UNDERRUN)) {
+                if (status & MCF5272_BD_LATE_COLLISION) {
+                    enet_driver[0].txLateCollision++;
+                }
+                if (status & MCF5272_BD_RETRY_LIMIT) {
+                    enet_driver[0].txRetryLimit++;
+                }
+                if (status & MCF5272_BD_UNDERRUN) {
+                    enet_driver[0].txUnderrun++;
+                }
+            }
+            if (status & MCF5272_BD_DEFER) {
+                enet_driver[0].txDeferred++;
+            }
+            if (status & MCF5272_BD_HEARTBEAT) {
+                enet_driver[0].txHeartbeat++;
+            }
+            if (status & MCF5272_BD_CARRIER_LOST) {
+                enet_driver[0].txLostCarrier++;
+            }
+        }
+        nRetired++;
+        if (status & MCF5272_BD_LAST) {
+            /*
+             * A full frame has been transmitted.
+             * Free all the associated buffer descriptors.
+             */
+            sc->txBdActiveCount -= nRetired;
+            while (nRetired) {
+                nRetired--;
+                m = sc->txMbuf[sc->txBdTail];
+                MFREE (m, n);
+                if (++sc->txBdTail == sc->txBdCount)
+                    sc->txBdTail = 0;
+            }
+        }
+        if (++i == sc->txBdCount) {
+            i = 0;
+        }
+    }
+}
+
+static void
+mcf5272_enet_rxDaemon (void *arg)
+{
+    struct mcf5272_enet_struct *sc = (struct mcf5272_enet_struct *)arg;
+    struct ifnet *ifp = &sc->arpcom.ac_if;
+    struct mbuf *m;
+    rtems_unsigned16 status;
+    bd_t *rxBd;
+    int rxBdIndex;
+    
+    /*
+     * Allocate space for incoming packets and start reception
+     */
+    for (rxBdIndex = 0 ; ;) {
+        rxBd = sc->rxBdBase + rxBdIndex;
+        MGETHDR (m, M_WAIT, MT_DATA);
+        MCLGET (m, M_WAIT);
+        m->m_pkthdr.rcvif = ifp;
+        sc->rxMbuf[rxBdIndex] = m;
+        rxBd->buffer = mtod (m, void *);
+        rxBd->status = MCF5272_BD_EMPTY;
+        g_enet_regs->rdar = 0x1000000;
+        if (++rxBdIndex == sc->rxBdCount) {
+            rxBd->status |= MCF5272_BD_WRAP;
+            break;
+        }
+    }
+    
+    /*
+     * Input packet handling loop
+     */
+    rxBdIndex = 0;
+    for (;;) {
+        rxBd = sc->rxBdBase + rxBdIndex;
+        
+        /*
+         * Wait for packet if there's not one ready
+         */
+        if ((status = rxBd->status) & MCF5272_BD_EMPTY) {
+            /*
+             * Clear old events
+             */
+            g_enet_regs->eir = MCF5272_ENET_EIR_RXF;
+            
+            /*
+             * Wait for packet
+             * Note that the buffer descriptor is checked
+             * *before* the event wait -- this catches the
+             * possibility that a packet arrived between the
+             * `if' above, and the clearing of the event register.
+             */
+            while ((status = rxBd->status) & MCF5272_BD_EMPTY) {
+                rtems_event_set events;
+                
+                /*
+                 * Unmask RXF (Full frame received) event
+                 */
+                g_enet_regs->eir |= MCF5272_ENET_EIR_RXF;
+                
+                rtems_bsdnet_event_receive (INTERRUPT_EVENT,
+                                            RTEMS_WAIT|RTEMS_EVENT_ANY,
+                                            RTEMS_NO_TIMEOUT,
+                                            &events);
+                cp;
+            }
+        }
+    cp;
+        
+        /*
+         * Check that packet is valid
+         */
+        if (status & MCF5272_BD_LAST) {
+            /*
+             * Pass the packet up the chain.
+             * FIXME: Packet filtering hook could be done here.
+             */
+            struct ether_header *eh;
+            
+            m = sc->rxMbuf[rxBdIndex];
+            m->m_len = m->m_pkthdr.len = (rxBd->length -
+                                          sizeof(rtems_unsigned32) -
+                                          sizeof(struct ether_header));
+            eh = mtod (m, struct ether_header *);
+            m->m_data += sizeof(struct ether_header);
+            ether_input (ifp, eh, m);
+            
+            /*
+             * Allocate a new mbuf
+             */
+            MGETHDR (m, M_WAIT, MT_DATA);
+            MCLGET (m, M_WAIT);
+            m->m_pkthdr.rcvif = ifp;
+            sc->rxMbuf[rxBdIndex] = m;
+            rxBd->buffer = mtod (m, void *);
+        }
+        else {
+            /*
+             * Something went wrong with the reception
+             */
+            if (!(status & MCF5272_BD_LAST)) {
+                sc->rxNotLast++;
+            }
+            if (status & MCF5272_BD_LONG) {
+                sc->rxGiant++;
+            }
+            if (status & MCF5272_BD_NONALIGNED) {
+                sc->rxNonOctet++;
+            }
+            if (status & MCF5272_BD_SHORT) {
+                sc->rxRunt++;
+            }
+            if (status & MCF5272_BD_CRC_ERROR) {
+                sc->rxBadCRC++;
+            }
+            if (status & MCF5272_BD_OVERRUN) {
+                sc->rxOverrun++;
+            }
+            if (status & MCF5272_BD_TRUNCATED) {
+                sc->rxTruncated++;
+            }
+        }
+        /*
+         * Reenable the buffer descriptor
+         */
+        rxBd->status = (status & MCF5272_BD_WRAP) | MCF5272_BD_EMPTY;
+        g_enet_regs->rdar = 0x1000000;
+        /*
+         * Move to next buffer descriptor
+         */
+        if (++rxBdIndex == sc->rxBdCount) {
+            rxBdIndex = 0;
+        }
+    }
+}
+
+static void
+mcf5272_enet_sendpacket (struct ifnet *ifp, struct mbuf *m)
+{
+    struct mcf5272_enet_struct *sc = ifp->if_softc;
+    volatile bd_t *firstTxBd, *txBd;
+    /*  struct mbuf *l = NULL; */
+    rtems_unsigned16 status;
+    int nAdded;
+    cp;
+    
+    /*
+     * Free up buffer descriptors
+     */
+    mcf5272_enet_retire_tx_bd (sc);
+    
+    /*
+     * Set up the transmit buffer descriptors.
+     * No need to pad out short packets since the
+     * hardware takes care of that automatically.
+     * No need to copy the packet to a contiguous buffer
+     * since the hardware is capable of scatter/gather DMA.
+     */
+    nAdded = 0;
+    txBd = firstTxBd = sc->txBdBase + sc->txBdHead;
+    for (;;) {
+    cp;
+        /*
+         * Wait for buffer descriptor to become available.
+         */
+        if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
+            /*
+             * Clear old events
+             */
+            g_enet_regs->eir = MCF5272_ENET_EIR_TXF;
+            
+            /*
+             * Wait for buffer descriptor to become available.
+             * Note that the buffer descriptors are checked
+             * *before* * entering the wait loop -- this catches
+             * the possibility that a buffer descriptor became
+             * available between the `if' above, and the clearing
+             * of the event register.
+             * This is to catch the case where the transmitter
+             * stops in the middle of a frame -- and only the
+             * last buffer descriptor in a frame can generate
+             * an interrupt.
+             */
+            mcf5272_enet_retire_tx_bd (sc);
+            while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
+                rtems_event_set events;
+                
+                cp;
+                /*
+                 * Unmask TXB (buffer transmitted) and
+                 * TXE (transmitter error) events.
+                 */
+                g_enet_regs->eir |= MCF5272_ENET_EIR_TXF;
+                rtems_bsdnet_event_receive (INTERRUPT_EVENT,
+                                            RTEMS_WAIT|RTEMS_EVENT_ANY,
+                                            RTEMS_NO_TIMEOUT,
+                                            &events);
+                cp;
+                mcf5272_enet_retire_tx_bd (sc);
+            }
+        }
+        
+        /*
+         * Don't set the READY flag till the
+         * whole packet has been readied.
+         */
+        status = nAdded ? MCF5272_BD_READY : 0;
+        cp;
+        
+        /*
+         *  FIXME: Why not deal with empty mbufs at at higher level?
+         * The IP fragmentation routine in ip_output
+         * can produce packet fragments with zero length.
+         * I think that ip_output should be changed to get
+         * rid of these zero-length mbufs, but for now,
+         * I'll deal with them here.
+         */
+        if (m->m_len) {
+            cp;
+            /*
+             * Fill in the buffer descriptor
+             */
+            txBd->buffer = mtod (m, void *);
+            txBd->length = m->m_len;
+            
+            sc->txMbuf[sc->txBdHead] = m;
+            nAdded++;
+            if (++sc->txBdHead == sc->txBdCount) {
+                status |= MCF5272_BD_WRAP;
+                sc->txBdHead = 0;
+            }
+            /*      l = m;*/
+            m = m->m_next;
+        }
+        else {
+            /*
+             * Just toss empty mbufs
+             */
+            struct mbuf *n;
+            cp;
+            MFREE (m, n);
+            m = n;
+            /*
+              if (l != NULL)
+              l->m_next = m;
+            */
+        }
+    
+        /*
+         * Set the transmit buffer status.
+         * Break out of the loop if this mbuf is the last in the frame.
+         */
+        if (m == NULL) {
+            cp;
+            if (nAdded) {
+                cp;
+                status |= MCF5272_BD_LAST | MCF5272_BD_TX_CRC;
+                txBd->status = status;
+                firstTxBd->status |= MCF5272_BD_READY;
+                g_enet_regs->tdar = 0x1000000;
+                sc->txBdActiveCount += nAdded;
+            }
+            break;
+        }
+        txBd->status = status;
+        txBd = sc->txBdBase + sc->txBdHead;
+    }
+    cp;
+/*
+    dump_enet_regs();
+    dump_intctrl;
+*/
+
+}
+
+
+void
+mcf5272_enet_txDaemon (void *arg)
+{
+    struct mcf5272_enet_struct *sc = (struct mcf5272_enet_struct *)arg;
+    struct ifnet *ifp = &sc->arpcom.ac_if;
+    struct mbuf *m;
+    rtems_event_set events;
+    
+    cp;
+    for (;;) {
+        /*
+         * Wait for packet
+         */
+        rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, 
+                                    RTEMS_EVENT_ANY | RTEMS_WAIT, 
+                                    RTEMS_NO_TIMEOUT, 
+                                    &events);
+        cp;
+        /*
+         * Send packets till queue is empty
+         */
+    cp;
+        for (;;) {
+    cp;
+            /*
+             * Get the next mbuf chain to transmit.
+             */
+            IF_DEQUEUE(&ifp->if_snd, m);
+            if (!m)
+                break;
+            mcf5272_enet_sendpacket (ifp, m);
+        }
+        ifp->if_flags &= ~IFF_OACTIVE;
+    }
+}
+
+
+/*
+ * Send packet (caller provides header).
+ */
+static void
+mcf5272_enet_start (struct ifnet *ifp)
+{
+    struct mcf5272_enet_struct *sc = ifp->if_softc;
+    
+    cp;
+    rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT);
+    cp;
+    ifp->if_flags |= IFF_OACTIVE;
+}
+
+
+static void
+mcf5272_enet_init (void *arg)
+{
+    struct mcf5272_enet_struct *sc = arg;
+    struct ifnet *ifp = &sc->arpcom.ac_if;
+    
+    if (sc->txDaemonTid == 0) {
+        
+        /*
+         * Set up SCC hardware
+         */
+        mcf5272_enet_initialize_hardware (sc);
+        
+        /*
+         * Start driver tasks
+         */
+        sc->txDaemonTid = rtems_bsdnet_newproc("SCtx", 
+                                               4096, 
+                                               mcf5272_enet_txDaemon, 
+                                               sc);
+        sc->rxDaemonTid = rtems_bsdnet_newproc("SCrx", 
+                                               4096, 
+                                               mcf5272_enet_rxDaemon, 
+                                               sc);
+        
+    }
+    
+    /*
+     * Set flags appropriately
+     */
+    if (ifp->if_flags & IFF_PROMISC) {
+        g_enet_regs->rcr |= 0x8;
+    } else {
+        g_enet_regs->rcr &= ~0x8;
+    }
+  
+    /*
+     * Tell the world that we're running.
+     */
+    ifp->if_flags |= IFF_RUNNING;
+    
+    /*
+     * Enable receiver and transmitter
+     */
+    g_enet_regs->ecr = 0x2;
+}
+
+
+static void
+mcf5272_enet_stop (struct mcf5272_enet_struct *sc)
+{
+    struct ifnet *ifp = &sc->arpcom.ac_if;
+    
+    ifp->if_flags &= ~IFF_RUNNING;
+    
+    /*
+     * Shut down receiver and transmitter
+     */
+    g_enet_regs->ecr = 0x0;
+}
+
+
+/*
+ * Show interface statistics
+ */
+static void
+enet_stats (struct mcf5272_enet_struct *sc)
+{
+    printf ("      Rx Interrupts:%-8lu", sc->rxInterrupts);
+    printf ("       Not First:%-8lu", sc->rxNotFirst);
+    printf ("        Not Last:%-8lu\n", sc->rxNotLast);
+    printf ("              Giant:%-8lu", sc->rxGiant);
+    printf ("            Runt:%-8lu", sc->rxRunt);
+    printf ("       Non-octet:%-8lu\n", sc->rxNonOctet);
+    printf ("            Bad CRC:%-8lu", sc->rxBadCRC);
+    printf ("         Overrun:%-8lu", sc->rxOverrun);
+    printf ("       Truncated:%-8lu\n", sc->rxTruncated);
+/*    printf ("          Discarded:%-8lu\n", (unsigned long)mcf5272.scc1p.un.ethernet.disfc); */
+    
+    printf ("      Tx Interrupts:%-8lu", sc->txInterrupts);
+    printf ("        Deferred:%-8lu", sc->txDeferred);
+    printf (" Missed Hearbeat:%-8lu\n", sc->txHeartbeat);
+    printf ("         No Carrier:%-8lu", sc->txLostCarrier);
+    printf ("Retransmit Limit:%-8lu", sc->txRetryLimit);
+    printf ("  Late Collision:%-8lu\n", sc->txLateCollision);
+    printf ("           Underrun:%-8lu", sc->txUnderrun);
+    printf (" Raw output wait:%-8lu\n", sc->txRawWait);
+}
+
+
+/*
+ * Driver ioctl handler
+ */
+static int
+mcf5272_enet_ioctl (struct ifnet *ifp, int command, caddr_t data)
+{
+    struct mcf5272_enet_struct *sc = ifp->if_softc;
+    int error = 0;
+    
+    switch (command) {
+    case SIOCGIFADDR:
+    case SIOCSIFADDR:
+        ether_ioctl (ifp, command, data);
+        break;
+        
+    case SIOCSIFFLAGS:
+        switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
+        case IFF_RUNNING:
+            mcf5272_enet_stop (sc);
+            break;
+            
+        case IFF_UP:
+            mcf5272_enet_init (sc);
+            break;
+            
+        case IFF_UP | IFF_RUNNING:
+            mcf5272_enet_stop (sc);
+            mcf5272_enet_init (sc);
+            break;
+            
+        default:
+            break;
+        }
+        break;
+        
+    case SIO_RTEMS_SHOW_STATS:
+        enet_stats (sc);
+        break;
+        
+        /*
+         * FIXME: All sorts of multicast commands need to be added here!
+         */
+    default:
+        error = EINVAL;
+        break;
+    }
+    return error;
+}
+
+
+int
+rtems_enet_driver_attach (struct rtems_bsdnet_ifconfig *config)
+{
+    struct mcf5272_enet_struct *sc;
+    struct ifnet *ifp;
+    int mtu;
+    int unitNumber;
+    char *unitName;
+    
+    /*
+     * Parse driver name
+     */
+    unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName);
+    if (unitNumber < 0){
+        return 0;
+    }
+    
+    /*
+     * Is driver free?
+     */
+    if ((unitNumber < 0) || (unitNumber > NIFACES)) {
+        printf ("Bad unit number: %d.\n", unitNumber);
+        return 0;
+    }
+
+    sc = &enet_driver[unitNumber];
+    ifp = &sc->arpcom.ac_if;
+    if (ifp->if_softc != NULL) {
+        printf ("Driver already in use.\n");
+        return 0;
+    }
+    
+    /*
+     * Process options
+     */
+
+    sc->arpcom.ac_enaddr[0] = (g_enet_regs->malr >> 24) & 0xff;
+    sc->arpcom.ac_enaddr[1] = (g_enet_regs->malr >> 16) & 0xff;
+    sc->arpcom.ac_enaddr[2] = (g_enet_regs->malr >> 8) & 0xff;
+    sc->arpcom.ac_enaddr[3] = (g_enet_regs->malr >> 0) & 0xff;
+    sc->arpcom.ac_enaddr[4] = (g_enet_regs->maur >> 24) & 0xff;
+    sc->arpcom.ac_enaddr[5] = (g_enet_regs->maur >> 16) & 0xff;
+
+    if (config->mtu) {
+        mtu = config->mtu;
+    } else {
+        mtu = ETHERMTU;
+    }
+
+    if (config->rbuf_count) {
+        sc->rxBdCount = config->rbuf_count;
+    } else {
+        sc->rxBdCount = RX_BUF_COUNT;
+    }
+    if (config->xbuf_count) {
+        sc->txBdCount = config->xbuf_count;
+    } else {
+        sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF;
+    }
+    sc->acceptBroadcast = !config->ignore_broadcast;
+    
+    /*
+     * Set up network interface values
+     */
+    ifp->if_softc = sc;
+    ifp->if_unit = unitNumber;
+    ifp->if_name = unitName;
+    ifp->if_mtu = mtu;
+    ifp->if_init = mcf5272_enet_init;
+    ifp->if_ioctl = mcf5272_enet_ioctl;
+    ifp->if_start = mcf5272_enet_start;
+    ifp->if_output = ether_output;
+    ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX;
+    if (ifp->if_snd.ifq_maxlen == 0) {
+        ifp->if_snd.ifq_maxlen = ifqmaxlen;
+    }
+    
+    /*
+     * Attach the interface
+     */
+    if_attach (ifp);
+    cp;
+    ether_ifattach (ifp);
+    cp;
+    return 1;
+};
+
+
diff --git a/c/src/lib/libbsp/m68k/csb360/start/.cvsignore b/c/src/lib/libbsp/m68k/csb360/start/.cvsignore
new file mode 100644
index 0000000000..282522db03
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/start/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/c/src/lib/libbsp/m68k/csb360/start/start.S b/c/src/lib/libbsp/m68k/csb360/start/start.S
new file mode 100644
index 0000000000..671133c5e2
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/start/start.S
@@ -0,0 +1,417 @@
+/*
+ *  CSB360 startup code
+ *
+ *  This file contains the entry point for the application.
+ *  The name of this entry point is compiler dependent.
+ *  It jumps to the BSP which is responsible for performing
+ *  all initialization.
+ *
+ *  Copyright (C) 2004 Cogent Computer Systems
+ *  Author: Jay Monkman <jtm@lopingdog.com>
+ *
+ *  Based on start.S from mcf520elite BSP:
+ *    Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
+ *    Author: Victor V. Vengerov <vvv@oktet.ru>
+ *	
+ *  Based on work:
+ *    David Fiddes, D.J@fiddes.surfaid.org
+ *    http://www.calm.hw.ac.uk/davidf/coldfire/
+ *
+ *  COPYRIGHT (c) 1989-1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  start.S,v 1.1 2001/10/26 19:30:10 joel Exp
+ */
+
+#include "asm.h"
+#include "bsp.h"
+
+BEGIN_CODE
+
+/* Initial stack situated in on-chip static memory */
+#define INITIAL_STACK BSP_MEM_ADDR_SRAM+BSP_MEM_SIZE_SRAM-4
+
+	PUBLIC	(INTERRUPT_VECTOR)
+SYM(INTERRUPT_VECTOR):
+	.long   INITIAL_STACK		| 00: initial SSP
+	.long	start			| 01: Initial PC
+	.long	_unexp_exception	| 02: Access Error
+	.long	_unexp_exception	| 03: Address Error
+	.long	_unexp_exception	| 04: Illegal Instruction
+	.long	_reserved_int		| 05: Reserved
+	.long	_reserved_int		| 06: Reserved
+	.long	_reserved_int		| 07: Reserved
+	.long	_unexp_exception	| 08: Priveledge Violation
+	.long	_unexp_exception	| 09: Trace
+	.long	_unexp_exception	| 0A: Unimplemented A-Line
+	.long	_unexp_exception	| 0B: Unimplemented F-Line
+	.long	_unexp_exception	| 0C: Debug interrupt
+	.long	_reserved_int		| 0D: Reserved
+	.long	_unexp_exception	| 0E: Format error
+	.long	_unexp_exception	| 0F: Uninitialized interrupt
+	.long	_reserved_int		| 10: Reserved
+	.long	_reserved_int		| 11: Reserved
+	.long	_reserved_int		| 12: Reserved
+	.long	_reserved_int		| 13: Reserved
+	.long	_reserved_int		| 14: Reserved
+	.long	_reserved_int		| 15: Reserved
+	.long	_reserved_int		| 16: Reserved
+	.long	_reserved_int		| 17: Reserved
+	.long	_spurious_int		| 18: Spurious interrupt
+	.long	_avec1_int		| 19: Autovector Level 1
+	.long	_avec2_int		| 1A: Autovector Level 2
+	.long	_avec3_int		| 1B: Autovector Level 3
+	.long	_avec4_int		| 1C: Autovector Level 4
+	.long	_avec5_int		| 1D: Autovector Level 5
+	.long	_avec6_int		| 1E: Autovector Level 6
+	.long	_avec7_int		| 1F: Autovector Level 7
+	.long	_unexp_exception	| 20: TRAP #0
+	.long	_unexp_exception	| 21: TRAP #1
+	.long	_unexp_exception	| 22: TRAP #2
+	.long	_unexp_exception	| 23: TRAP #3
+	.long	_unexp_exception	| 24: TRAP #4
+	.long	_unexp_exception	| 25: TRAP #5
+	.long	_unexp_exception	| 26: TRAP #6
+	.long	_unexp_exception	| 27: TRAP #7
+	.long	_unexp_exception	| 28: TRAP #8
+	.long	_unexp_exception	| 29: TRAP #9
+	.long	_unexp_exception	| 2A: TRAP #10
+	.long	_unexp_exception	| 2B: TRAP #11
+	.long	_unexp_exception	| 2C: TRAP #12
+	.long	_unexp_exception	| 2D: TRAP #13
+	.long	_unexp_exception	| 2E: TRAP #14
+	.long	_unexp_exception	| 2F: TRAP #15
+	.long	_reserved_int		| 30: Reserved
+	.long	_reserved_int		| 31: Reserved
+	.long	_reserved_int		| 32: Reserved
+	.long	_reserved_int		| 33: Reserved
+	.long	_reserved_int		| 34: Reserved
+	.long	_reserved_int		| 35: Reserved
+	.long	_reserved_int		| 36: Reserved
+	.long	_reserved_int		| 37: Reserved
+	.long	_reserved_int		| 38: Reserved
+	.long	_reserved_int		| 39: Reserved
+	.long	_reserved_int		| 3A: Reserved
+	.long	_reserved_int		| 3B: Reserved
+	.long	_reserved_int		| 3C: Reserved
+	.long	_reserved_int		| 3D: Reserved
+	.long	_reserved_int		| 3E: Reserved
+	.long	_reserved_int		| 3F: Reserved
+
+	.long	_unexp_int		| 40-FF: User defined interrupts
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+
+	.long	_unexp_int		| 50:
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+
+	.long	_unexp_int		| 60:
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+
+	.long	_unexp_int		| 70:
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+
+	.long	_unexp_int		| 80:
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+
+	.long	_unexp_int		| 90:
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+
+	.long	_unexp_int		| A0:
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+
+	.long	_unexp_int		| B0:
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+
+	.long	_unexp_int		| C0:
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+
+	.long	_unexp_int		| D0:
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+
+	.long	_unexp_int		| E0:
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+
+	.long	_unexp_int		| F0:
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+	.long	_unexp_int
+
+	PUBLIC(start)
+SYM(start):
+	move.w	#0x2700,sr		| First turn off all interrupts!
+
+	move.l	#(BSP_RAMBAR + MCF5272_RAMBAR_V), d0
+	movec	d0,rambar0		| ...so we have a stack
+
+	move.l	#(INITIAL_STACK),sp	| Set up stack again (may be we are
+					| going here from monitor or with
+					| BDM interface assistance)
+	
+	/*
+	 * Remainder of the startup code is handled by C code
+	 */
+	jmp	SYM(init5272)		| Start C code (which never returns)
+
+/***************************************************************************
+   Function : clear_bss
+
+   Description : clear BSS segment
+ ***************************************************************************/
+	PUBLIC (clear_bss)
+SYM(clear_bss):
+	lea	clear_start,a0		| Get start of BSS
+	lea	clear_end,a1		| Get end of BSS
+	clrl	d0			| Value to set
+	bra.s	ZEROLOOPTEST		| Branch into clear loop
+ZEROLOOP:
+	movel	d0,a0@+			| Clear a word
+ZEROLOOPTEST:
+	cmpl	a1,a0			| Done?
+	bcs.s	ZEROLOOP		| No, skip
+
+	rts
+
+
+
+
+	PUBLIC (start_csb360)
+SYM(start_csb360):
+	/*
+	 * Right : Now we're ready to boot RTEMS
+	 */
+	clrl	d0			| Pass in null to all boot_card() params
+ 	movel	d0,a7@-			| environp
+	movel	d0,a7@-			| argv
+	movel	d0,a7@-			| argc
+	jsr	SYM(boot_card)		| Call C boot_card function to startup RTEMS
+
+
+	
+# Wait forever
+_stop:
+	nop
+	stop	#0x2700
+	jmp	_stop
+
+# The following labelled nops is a placeholders for breakpoints
+_unexp_exception:
+	nop
+	jmp	_stop
+
+_unexp_int:
+	nop
+	jmp	_stop
+
+_reserved_int:
+	nop
+	jmp	_stop
+
+_spurious_int:
+	nop
+	jmp	_stop
+
+_avec1_int:
+	nop
+	jmp	_unexp_int
+
+_avec2_int:
+	nop
+	jmp	_unexp_int
+
+_avec3_int:
+	nop
+	jmp	_unexp_int 
+
+_avec4_int:
+	nop
+	jmp	_unexp_int
+
+_avec5_int:
+	nop
+	jmp	_unexp_int
+
+_avec6_int:
+	nop
+	jmp	_unexp_int
+
+_avec7_int:
+	nop
+	jmp	_unexp_int
+
+
+END_CODE
+
+END
+
diff --git a/c/src/lib/libbsp/m68k/csb360/startup/.cvsignore b/c/src/lib/libbsp/m68k/csb360/startup/.cvsignore
new file mode 100644
index 0000000000..282522db03
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/startup/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/c/src/lib/libbsp/m68k/csb360/startup/bspclean.c b/c/src/lib/libbsp/m68k/csb360/startup/bspclean.c
new file mode 100644
index 0000000000..9e82bffade
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/startup/bspclean.c
@@ -0,0 +1,38 @@
+/*
+ *  CSB360 cleanu code.
+ *
+ *  This routine returns control from RTEMS to the dBUG monitor.
+ *
+ *  Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia.
+ *  Author: Victor V. Vengerov <vvv@oktet.ru>
+ *
+ *  COPYRIGHT (c) 1989-1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ * 
+ *  http://www.OARcorp.com/rtems/license.html.
+ * 
+ *  bspclean.c,v 1.1 2001/10/26 19:30:11 joel Exp
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+
+/* bsp_cleanup --
+ *     This function called when RTEMS execution is finished. bsp_cleanup
+ *     for MCF5206eLITE evaluation board throw execution to the dBUG
+ *     monitor.
+ *
+ * PARAMETERS:
+ *     none
+ *
+ * RETURNS:
+ *     none
+ */
+void
+bsp_cleanup(void)
+{
+}
diff --git a/c/src/lib/libbsp/m68k/csb360/startup/bspstart.c b/c/src/lib/libbsp/m68k/csb360/startup/bspstart.c
new file mode 100644
index 0000000000..e04f4bd65c
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/startup/bspstart.c
@@ -0,0 +1,90 @@
+/*
+ *  BSP startup
+ *
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *
+ *  Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
+ *  Author: Victor V. Vengerov <vvv@oktet.ru>
+ *
+ *  Based on work:
+ *  Author:
+ *    David Fiddes, D.J@fiddes.surfaid.org
+ *    http://www.calm.hw.ac.uk/davidf/coldfire/
+ *
+ *  COPYRIGHT (c) 1989-1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *
+ *  http://www.OARcorp.com/rtems/license.html.
+ * 
+ *  bspstart.c,v 1.2 2002/11/04 14:26:32 joel Exp
+ */
+
+#include <bsp.h>
+#include <rtems/libio.h>
+ 
+#include <rtems/libcsupport.h>
+ 
+#include <string.h>
+
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+
+extern rtems_configuration_table Configuration;
+rtems_configuration_table  BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+
+extern unsigned int _RamSize;
+
+
+char *rtems_progname;
+
+/*
+ *  Use the shared implementations of the following routines
+ */
+ 
+void bsp_postdriver_hook(void);
+void bsp_libc_init( void *, unsigned32, int );
+void bsp_pretasking_hook(void);               /* m68k version */
+
+/* bsp_start --
+ *     This routine does the bulk of the system initialisation.
+ */
+void bsp_start( void )
+{
+    extern void *_WorkspaceBase;
+    extern unsigned long _M68k_Ramsize;
+    _M68k_Ramsize = (unsigned long)&_RamSize;   /* size set in linker script */
+
+
+    /*
+     *  Need to "allocate" the memory for the RTEMS Workspace and
+     *  tell the RTEMS configuration where it is.  This memory is
+     *  not malloc'ed.  It is just "pulled from the air".
+     */
+
+    BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
+
+    /*
+     *  initialize the CPU table for this BSP
+     */
+    Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
+
+    Cpu_table.postdriver_hook = bsp_postdriver_hook;
+
+    Cpu_table.do_zero_of_workspace = TRUE;
+
+    Cpu_table.interrupt_stack_size = 4096;
+
+    Cpu_table.interrupt_vector_table = (m68k_isr *)0; /* vectors at start of RAM */
+
+}
diff --git a/c/src/lib/libbsp/m68k/csb360/startup/init5272.c b/c/src/lib/libbsp/m68k/csb360/startup/init5272.c
new file mode 100644
index 0000000000..c2d4e442ce
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/startup/init5272.c
@@ -0,0 +1,173 @@
+/*
+ *  CSB360 hardware startup routines
+ *
+ *  This is where the real hardware setup is done. A minimal stack
+ *  has been provided by the start.S code. No normal C or RTEMS
+ *  functions can be called from here.
+ *
+ *  This initialization code based on hardware settings of dBUG
+ *  monitor. This must be changed if you like to run it immediately
+ *  after reset.
+ *
+ *  Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
+ *  Author: Victor V. Vengerov <vvv@oktet.ru>
+ *
+ *  Based on work:
+ *  Author:
+ *    David Fiddes, D.J@fiddes.surfaid.org
+ *    http://www.calm.hw.ac.uk/davidf/coldfire/
+ *
+ *  COPYRIGHT (c) 1989-1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *
+ *  http://www.OARcorp.com/rtems/license.html.
+ * 
+ *  init5206e.c,v 1.1 2001/10/26 19:30:11 joel Exp
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <mcf5272/mcf5272.h>
+
+/* Set the pointers to the modules */
+sim_regs_t *g_sim_regs            = (void *) MCF5272_SIM_BASE(BSP_MBAR);
+intctrl_regs_t *g_intctrl_regs    = (void *) MCF5272_INT_BASE(BSP_MBAR);
+chipsel_regs_t *g_chipsel_regs    = (void *) MCF5272_CS_BASE(BSP_MBAR);
+gpio_regs_t *g_gpio_regs          = (void *) MCF5272_GPIO_BASE(BSP_MBAR);
+qspi_regs_t *g_qspi_regs          = (void *) MCF5272_QSPI_BASE(BSP_MBAR);
+pwm_regs_t *g_pwm_regs            = (void *) MCF5272_PWM_BASE(BSP_MBAR);
+dma_regs_t *g_dma_regs            = (void *) MCF5272_DMAC_BASE(BSP_MBAR);
+uart_regs_t *g_uart0_regs         = (void *) MCF5272_UART0_BASE(BSP_MBAR);
+uart_regs_t *g_uart1_regs         = (void *) MCF5272_UART1_BASE(BSP_MBAR);
+timer_regs_t *g_timer_regs        = (void *) MCF5272_TIMER_BASE(BSP_MBAR);
+plic_regs_t *g_plic_regs          = (void *) MCF5272_PLIC_BASE(BSP_MBAR);
+enet_regs_t *g_enet_regs          = (void *) MCF5272_ENET_BASE(BSP_MBAR);
+usb_regs_t *g_usb_regs            = (void *) MCF5272_USB_BASE(BSP_MBAR);
+
+#define m68k_set_cacr( _cacr ) \
+  asm volatile ( "movec %0,%%cacr\n\t" \
+                 "nop\n" \
+                 : : "d" (_cacr) )
+
+#define m68k_set_acr0( _acr0 ) \
+  asm volatile (  "movec %0,%%acr0\n\t" \
+                  "nop\n\t" \
+                  : : "d" (_acr0) )
+
+#define m68k_set_acr1( _acr1 ) \
+  asm volatile (  "movec %0,%%acr1\n\t" \
+                  "nop\n\t" \
+                  : : "d" (_acr1) )
+
+#define m68k_set_srambar( _rambar0 ) \
+  asm volatile (  "movec %0,%%rambar0\n\t" \
+                  "nop\n\t" \
+                  : : "d" (_rambar0) )
+
+#define m68k_set_mbar( _mbar ) \
+  asm volatile (  "movec %0,%%mbar\n\t" \
+                  "nop\n\t" \
+                  : : "d" (_mbar) )
+
+#define mcf5272_enable_cache() \
+  m68k_set_cacr( MCF5272_CACR_CENB )
+
+
+#define mcf5272_disable_cache() \
+  asm volatile (  "nop\n\t"    \
+                  "movec %0,%%cacr\n\t" \
+                  "nop\n\t" \
+                  "movec %0,%%cacr\n\t" \
+                  "nop\n\t" \
+                  : : "d" (MCF5272_CACR_CINV) )
+
+/* init5272 --
+ *     Initialize MCF5272 on-chip modules
+ *
+ * PARAMETERS:
+ *     none
+ *
+ * RETURNS:
+ *     none
+ */
+void
+init5272(void)
+{
+    extern void clear_bss(void);
+    extern void start_csb360(void);
+    int i;
+
+    /* Invalidate the cache - WARNING: It won't complete for 64 clocks */
+    m68k_set_cacr(MCF5272_CACR_CINV);
+
+    /* Set Module Base Address register */
+    m68k_set_mbar((BSP_MBAR & MCF5272_MBAR_BA) | MCF5272_MBAR_V);
+
+    /* Set RAM Base Address register */
+    m68k_set_srambar((BSP_RAMBAR & MCF5272_RAMBAR_BA) | MCF5272_RAMBAR_V);
+    
+    /* Set System Control Register:
+     * Enet has highest priority, 16384 bus cycles before timeout
+     */
+    g_sim_regs->scr = (MCF5272_SCR_HWR_16384);
+    
+    /* System Protection Register:
+     * Enable Hardware watchdog timer.
+     */
+    g_sim_regs->spr = MCF5272_SPR_HWTEN;
+
+    /* Clear and mask all interrupts */
+    g_intctrl_regs->icr1 = 0x88888888;
+    g_intctrl_regs->icr2 = 0x88888888;
+    g_intctrl_regs->icr3 = 0x88888888;
+    g_intctrl_regs->icr4 = 0x88880000;
+
+    /* Copy the interrupt vector table to SRAM */
+    {
+        extern void INTERRUPT_VECTOR();
+        rtems_unsigned32 *inttab = (rtems_unsigned32 *)&INTERRUPT_VECTOR;
+        rtems_unsigned32 *intvec = (rtems_unsigned32 *)BSP_RAMBAR;
+        register int i;
+        for (i = 0; i < 256; i++)
+        {
+            *(intvec++) = *(inttab++);
+        }
+    }
+    m68k_set_vbr(BSP_RAMBAR);
+    
+    
+    /*
+     * Setup ACRs so that if cache turned on, periphal accesses
+     * are not messed up.  (Non-cacheable, serialized)
+     */
+
+    m68k_set_acr0(MCF5272_ACR_BASE(BSP_MEM_ADDR_SDRAM)    |
+                  MCF5272_ACR_MASK(BSP_MEM_MASK_SDRAM)    |
+                  MCF5272_ACR_EN                          |
+                  MCF5272_ACR_SM_ANY);
+
+/*
+    m68k_set_acr1 (MCF5206E_ACR_BASE(BSP_MEM_ADDR_FLASH) |
+                   MCF5206E_ACR_MASK(BSP_MEM_MASK_FLASH) |
+                   MCF5206E_ACR_EN                       |
+                   MCF5206E_ACR_SM_ANY);
+*/
+
+    /* Enable the caches */
+    m68k_set_cacr(MCF5272_CACR_CENB |
+                  MCF5272_CACR_DCM);       /* Default is not cached */
+  
+  /*
+   * Copy data, clear BSS, switch stacks and call boot_card()
+   */
+/*
+  CopyDataClearBSSAndStart(BSP_MEM_SIZE_ESRAM - 0x400);
+*/
+    clear_bss();
+    start_csb360();
+
+}
diff --git a/c/src/lib/libbsp/m68k/csb360/startup/linkcmds b/c/src/lib/libbsp/m68k/csb360/startup/linkcmds
new file mode 100644
index 0000000000..2ff43f115a
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/startup/linkcmds
@@ -0,0 +1,149 @@
+/*
+ * This file contains GNU linker directives for the Cogent
+ * CSB360 development board.
+ *
+ * Copyright (C) 2004 Cogent Computer Systems
+ * Author: Jay Monkman <jtm@lopingdog.com>
+ *
+ *  linkcmds,v 1.4 2003/01/20 20:19:50 joel Exp
+ */
+
+/*
+ * Declare size of heap.
+ * A heap size of 0 means "Use all available memory for the heap".
+ * Initial stack located in on-chip SRAM and not declared there.
+ */
+_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0;
+_RamSize = DEFINED(_RamSize) ? _RamSize : 31M;
+
+/* This is needed for _CPU_ISR_install_vector - 
+*  WARNING: it MUST match BSP_RAMBAR !!!!!!!!!!! */
+_VBR = 0x20000000;
+
+/*
+ * Setup the memory map of the CSB360 board
+ *
+ * The "ram" section is placed in RAM after the space used by umon.
+ * 
+ */
+MEMORY
+{
+  ram     : ORIGIN = 0x00100000, LENGTH = 31M
+}
+
+SECTIONS
+{
+     
+  /*
+   * Text, data and bss segments
+   */
+   .text : 
+   {
+	_RamBase = .;
+        __RamBase = .;
+	CREATE_OBJECT_SYMBOLS
+	*(.text)
+
+	/*
+	 * C++ constructors/destructors
+	 */
+	*(.gnu.linkonce.t.*)
+
+	/*
+	 * Initialization and finalization code.
+	 */
+	. = ALIGN (16);
+	PROVIDE (_init = .);
+	*crti.o(.init)
+	*(.init)
+	*crtn.o(.init)
+	. = ALIGN (16);
+	PROVIDE (_fini = .);
+	*crti.o(.fini)
+	*(.fini)
+	*crtn.o(.fini)
+
+	/*
+	 * Special FreeBSD sysctl sections.
+	 */
+	. = ALIGN (16);
+	__start_set_sysctl_set = .;
+	*(set_sysctl_*);
+	__stop_set_sysctl_set = ABSOLUTE(.);
+	*(set_domain_*);
+	*(set_pseudo_*);
+
+	/*
+	 * C++ constructors/destructors
+	 */
+	. = ALIGN (16);
+	*crtbegin.o(.ctors)
+	*(.ctors)
+	*crtend.o(.ctors)
+	*crtbegin.o(.dtors)
+	*(.dtors)
+	*crtend.o(.dtors)
+
+	/*
+	 * Exception frame info
+	 */
+	. = ALIGN (16);
+	*(.eh_frame)
+
+	/*
+	 * Read-only data
+	 */
+	. = ALIGN (16);
+	_rodata_start = .;
+	*(.rodata*)
+	*(.gnu.linkonce.r*)
+
+	. = ALIGN (16);
+        PROVIDE (etext = .);
+
+   } > ram
+
+   .data :
+   {
+	copy_start = .;
+        *(.shdata)
+        . = ALIGN (0x10);
+        *(.data)
+        . = ALIGN (0x10);
+        *(.gcc_exc)
+        *(.gcc_except_table)
+	*(.jcr)
+        . = ALIGN (0x10);
+        *(.gnu.linkonce.d*)
+        . = ALIGN (0x10);
+        _edata = .;
+	 copy_end = .;
+   } > ram
+
+  .bss :
+  {
+	clear_start = . ;
+	*(.shbss)
+	*(.bss)
+	*(COMMON)
+	. = ALIGN(0x10);
+	_end = .;
+    
+	clear_end = .;
+
+	_WorkspaceBase = .;
+	__WorkspaceBase = .;
+
+  } > ram
+
+  .stab 0 (NOLOAD) :
+  {
+    *(.stab)
+  }
+
+  .stabstr 0 (NOLOAD) :
+  {
+    *(.stabstr)
+  }
+ 
+}
diff --git a/c/src/lib/libbsp/m68k/csb360/times b/c/src/lib/libbsp/m68k/csb360/times
new file mode 100644
index 0000000000..7575650806
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/csb360/times
@@ -0,0 +1,189 @@
+#
+#  Timing Test Suite Results for the Cogent CSB360 MCF5272 BSP
+#
+#  
+#
+
+Board:  Cogent CSB360
+CPU: MCF5372 - Coldfire
+Clock Speed: 66 MHz
+Memory Configuration: SDRAM, 32 bits wide
+
+Times Reported in: microseconds
+Timer Source: Timer 2
+
+Instruction cache is enabled.
+
+== ================================================================  ===
+ 1 rtems_semaphore_create                                            27
+ 1 rtems_semaphore_delete                                            30
+ 1 rtems_semaphore_obtain: available                                 6
+ 1 rtems_semaphore_obtain: not available -- NO_WAIT                  7
+ 1 rtems_semaphore_release: no waiting tasks                         17
+
+ 2 rtems_semaphore_obtain: not available -- caller blocks            53
+
+ 3 rtems_semaphore_release: task readied -- preempts caller          41
+
+ 4 rtems_task_restart: blocked task -- preempts caller               83
+ 4 rtems_task_restart: ready task -- preempts caller                 79
+ 4 rtems_semaphore_release: task readied -- returns to caller        30
+ 4 rtems_task_create                                                 130
+ 4 rtems_task_start                                                  38
+ 4 rtems_task_restart: suspended task -- returns to caller           43
+ 4 rtems_task_delete: suspended task                                 88
+ 4 rtems_task_restart: ready task -- returns to caller               45
+ 4 rtems_task_restart: blocked task -- returns to caller             58
+ 4 rtems_task_delete: blocked task                                   91
+
+ 5 rtems_task_suspend: calling task                                  35
+ 5 rtems_task_resume: task readied -- preempts caller                35
+
+ 6 rtems_task_restart: calling task                                  53
+ 6 rtems_task_suspend: returns to caller                             21
+ 6 rtems_task_resume: task readied -- returns to caller              21
+ 6 rtems_task_delete: ready task                                     93
+
+ 7 rtems_task_restart: suspended task -- preempts caller             65
+
+ 8 rtems_task_set_priority: obtain current priority                  10
+ 8 rtems_task_set_priority: returns to caller                        28
+ 8 rtems_task_mode: obtain current mode                              6
+ 8 rtems_task_mode: no reschedule                                    6
+ 8 rtems_task_mode: reschedule -- returns to caller                  13
+ 8 rtems_task_mode: reschedule -- preempts caller                    35
+ 8 rtems_task_set_note                                               12
+ 8 rtems_task_get_note                                               13
+ 8 rtems_clock_set                                                   32
+ 8 rtems_clock_get                                                   3
+
+ 9 rtems_message_queue_create                                        72
+ 9 rtems_message_queue_send: no waiting tasks                        31
+ 9 rtems_message_queue_urgent: no waiting tasks                      32
+ 9 rtems_message_queue_receive: available                            33
+ 9 rtems_message_queue_flush: no messages flushed                    14
+ 9 rtems_message_queue_flush: messages flushed                       18
+ 9 rtems_message_queue_delete                                        40
+
+10 rtems_message_queue_receive: not available -- NO_WAIT             13
+10 rtems_message_queue_receive: not available -- caller blocks       52
+
+11 rtems_message_queue_send: task readied -- preempts caller         50
+
+12 rtems_message_queue_send: task readied -- returns to caller       35
+
+13 rtems_message_queue_urgent: task readied -- preempts caller       50
+
+14 rtems_message_queue_urgent: task readied -- returns to caller     38
+
+15 rtems_event_receive: obtain current events                        1
+15 rtems_event_receive: not available -- NO_WAIT                     8
+15 rtems_event_receive: not available -- caller blocks               41
+15 rtems_event_send: no task readied                                 12
+15 rtems_event_receive: available                                    16
+15 rtems_event_send: task readied -- returns to caller               23
+
+16 rtems_event_send: task readied -- preempts caller                 41
+
+17 rtems_task_set_priority: preempts caller                          55
+
+18 rtems_task_delete: calling task                                   109
+
+19 rtems_signal_catch                                                9
+19 rtems_signal_send: returns to caller                              20
+19 rtems_signal_send: signal to self                                 30
+19 exit ASR overhead: returns to calling task                        23
+19 exit ASR overhead: returns to preempting task                     28
+
+20 rtems_partition_create                                            34
+20 rtems_region_create                                               50
+20 rtems_partition_get_buffer: available                             17
+20 rtems_partition_get_buffer: not available                         12
+20 rtems_partition_return_buffer                                     29
+20 rtems_partition_delete                                            20
+20 rtems_region_get_segment: available                               48
+20 rtems_region_get_segment: not available -- NO_WAIT                51
+20 rtems_region_return_segment: no waiting tasks                     45
+20 rtems_region_get_segment: not available -- caller blocks          88
+20 rtems_region_return_segment: task readied -- preempts caller      97
+20 rtems_region_return_segment: task readied -- returns to caller    81
+20 rtems_region_delete                                               39
+20 rtems_io_initialize                                               3
+20 rtems_io_open                                                     2
+20 rtems_io_close                                                    3
+20 rtems_io_read                                                     2
+20 rtems_io_write                                                    2
+20 rtems_io_control                                                  2
+
+21 rtems_task_ident                                                  115
+21 rtems_message_queue_ident                                         111
+21 rtems_semaphore_ident                                             127
+21 rtems_partition_ident                                             112
+21 rtems_region_ident                                                114
+21 rtems_port_ident                                                  110
+21 rtems_timer_ident                                                 110
+21 rtems_rate_monotonic_ident                                        111
+
+22 rtems_message_queue_broadcast: task readied -- returns to caller  43
+22 rtems_message_queue_broadcast: no waiting tasks                   20
+22 rtems_message_queue_broadcast: task readied -- preempts caller    58
+
+23 rtems_timer_create                                                12
+23 rtems_timer_fire_after: inactive                                  24
+23 rtems_timer_fire_after: active                                    25
+23 rtems_timer_cancel: active                                        11
+23 rtems_timer_cancel: inactive                                      8
+23 rtems_timer_reset: inactive                                       21
+23 rtems_timer_reset: active                                         23
+23 rtems_timer_fire_when: inactive                                   37
+23 rtems_timer_fire_when: active                                     38
+23 rtems_timer_delete: active                                        18
+23 rtems_timer_delete: inactive                                      16
+23 rtems_task_wake_when                                              60
+
+24 rtems_task_wake_after: yield -- returns to caller                 6
+24 rtems_task_wake_after: yields -- preempts caller                  25
+
+25 rtems_clock_tick                                                  11
+
+26 _ISR_Disable                                                      2
+26 _ISR_Flash                                                        1
+26 _ISR_Enable                                                       1
+26 _Thread_Disable_dispatch                                          1
+26 _Thread_Enable_dispatch                                           6
+26 _Thread_Set_state                                                 13
+26 _Thread_Disptach (NO FP)                                          25
+26 context switch: no floating point contexts                        18
+26 context switch: self                                              5
+26 context switch: to another task                                   5
+26 fp context switch: restore 1st FP task                            18
+26 fp context switch: save idle, restore initialized                 6
+26 fp context switch: save idle, restore idle                        19
+26 fp context switch: save initialized, restore initialized          6
+26 _Thread_Resume                                                    12
+26 _Thread_Unblock                                                   11
+26 _Thread_Ready                                                     11
+26 _Thread_Get                                                       4
+26 _Semaphore_Get                                                    2
+26 _Thread_Get: invalid id                                           1
+
+27 interrupt entry overhead: returns to interrupted task             5
+27 interrupt exit overhead: returns to interrupted task              4
+27 interrupt entry overhead: returns to nested interrupt             3
+27 interrupt exit overhead: returns to nested interrupt              4
+27 interrupt entry overhead: returns to preempting task              4
+27 interrupt exit overhead: returns to preempting task               31
+
+28 rtems_port_create                                                 19
+28 rtems_port_external_to_internal                                   11
+28 rtems_port_internal_to_external                                   10
+28 rtems_port_delete                                                 21
+
+29 rtems_rate_monotonic_create                                       17
+29 rtems_rate_monotonic_period: initiate period -- returns to caller 29
+29 rtems_rate_monotonic_period: obtain status                        16
+29 rtems_rate_monotonic_cancel                                       20
+29 rtems_rate_monotonic_delete: inactive                             25
+29 rtems_rate_monotonic_delete: active                               25
+29 rtems_rate_monotonic_period: conclude periods -- caller blocks    34
+
author	Jay Monkman <jtm@smoothsmoothie.com>	2004-08-03 05:01:51 +0000
committer	Jay Monkman <jtm@smoothsmoothie.com>	2004-08-03 05:01:51 +0000
commit	02e708dc257687b6fe5eb624af9020e688094085 (patch)
tree	bf62686a2df10a6069e834c0d10e62c4a0159658 /c/src
parent	2004-08-02 Jay Monkman <jtm@lopingdog.com> (diff)
download	rtems-02e708dc257687b6fe5eb624af9020e688094085.tar.bz2