* So many patches have been posted recently on the mailing list and

	because we were unable to find correct solution to compile on various
	linux distros (due to rpcgen incompatibilities), and because the coding
	style of rdbg was rather inconsistant among various pieces of code, I
	decided to:
	    1) make some cleaning regarding global coding style (using
	       indent + manual edits),
	    2) incorporate/review the paches send by various people
	       (S. Holford, T. Strauman),
	    3) Fix the bug due to varying rpcgen code generation
	       in remdeb_svc.c,
	    4) Remove some dead code,
	    5) Apply a patches enabling to call enterRdbg imediately
	       after rdbg initialization is done,

	NB : the paches is huge but it is mainly due to coding styke chnages.
	Only few lines of codes have been really changed and they do not impact
	rdbg functionnality (AFAIKT).

	* include/rdbg/servrpc.h, include/rdbg/i386/rdbg_f.h,
	include/rdbg/m68k/rdbg_f.h, include/rdbg/powerpc/rdbg_f.h,
	src/_servtgt.c, src/awk.svc, src/excep.c, src/ptrace.c, src/rdbg.c,
	src/remdeb.x, src/servbkpt.c, src/servcon.c, src/servrpc.c,
	src/servtgt.c, src/servtsp.c, src/servutil.c, src/i386/excep_f.c,
	src/i386/rdbg_f.c, src/i386/any/Makefile.am, src/i386/any/remdeb.h,
	src/i386/any/remdeb_svc.c, src/i386/any/remdeb_xdr.c,
	src/m68k/excep_f.c, src/m68k/rdbg_f.c, src/m68k/any/Makefile.am,
	src/m68k/any/remdeb.h, src/m68k/any/remdeb_svc.c,
	src/m68k/any/remdeb_xdr.c, src/powerpc/excep_f.c, src/powerpc/rdbg_f.c,
	src/powerpc/new_exception_processing/Makefile.am,
	src/powerpc/new_exception_processing/remdeb.h,
	src/powerpc/new_exception_processing/remdeb_svc.c,
	src/powerpc/new_exception_processing/remdeb_xdr.c: Modified.

1 files changed, 80 insertions, 70 deletions

diff --git a/c/src/librdbg/src/m68k/rdbg_f.c b/c/src/librdbg/src/m68k/rdbg_f.c
index 35535cd59b..7f7e92b437 100644
--- a/c/src/librdbg/src/m68k/rdbg_f.c
+++ b/c/src/librdbg/src/m68k/rdbg_f.c
@@ -12,14 +12,14 @@
 
 #include <assert.h>
 #include <errno.h>
-#include <rdbg/reg.h>               
+#include <rdbg/reg.h>
 #include <rdbg/remdeb.h>
 #include <rdbg/rdbg.h>
-#include <rtems/score/cpu.h>    
-#include <rtems/score/thread.h> 
+#include <rtems/score/cpu.h>
+#include <rtems/score/thread.h>
 
-void
-CtxToRegs (const CPU_Exception_frame* ctx, xdr_regs* regs)
+  void
+CtxToRegs (const CPU_Exception_frame * ctx, xdr_regs * regs)
 {
   regs->r_dreg[0] = ctx->d0;
   regs->r_dreg[1] = ctx->d1;
@@ -44,8 +44,8 @@ CtxToRegs (const CPU_Exception_frame* ctx, xdr_regs* regs)
   regs->r_vec = ctx->vecnum;
 }
 
-void
-RegsToCtx (const xdr_regs* regs, CPU_Exception_frame* ctx)
+  void
+RegsToCtx (const xdr_regs * regs, CPU_Exception_frame * ctx)
 {
   ctx->d0 = regs->r_dreg[0];
   ctx->d1 = regs->r_dreg[1];
@@ -70,97 +70,107 @@ RegsToCtx (const xdr_regs* regs, CPU_Exception_frame* ctx)
   ctx->vecnum = regs->r_vec;
 }
 
-void
-get_ctx_thread( Thread_Control *thread, CPU_Exception_frame* ctx)
+  void
+get_ctx_thread (Thread_Control * thread, CPU_Exception_frame * ctx)
 {
   unsigned int *ptr;
   unsigned int i;
-  
-  /* 
+
+  /*
    * ISR stores d0-d1/a0-a1, calls _Thread_Dispatch
    * _Thread_Dispatch calls _Context_Switch == _CPU_Context_switch
    * _CPU_Context_switch stores/restores sr,d2-d7,a2-a7
    * so if my reasoning is correct, *sp points to a location in
    * _Thread_Dispatch
    */
-  ctx->vecnum	= 0xdeadbeef;
-  ctx->sr	= thread->Registers.sr;
-  ctx->pc	= *(unsigned32 *)thread->Registers.a7_msp;
-  ctx->d0	= 0xdeadbeef;
-  ctx->d1	= 0xdeadbeef;
-  ctx->a0	= 0xdeadbeef;
-  ctx->a1	= 0xdeadbeef;
-  
-  ctx->a2	= (unsigned32)thread->Registers.a2;
-  ctx->a3	= (unsigned32)thread->Registers.a3;
-  ctx->a4	= (unsigned32)thread->Registers.a4;
-  ctx->a5	= (unsigned32)thread->Registers.a5;
-  ctx->a6	= (unsigned32)thread->Registers.a6;
-  ctx->a7	= (unsigned32)thread->Registers.a7_msp;
-  ctx->d2	= thread->Registers.d2;
-  ctx->d3	= thread->Registers.d3;
-  ctx->d4	= thread->Registers.d4;
-  ctx->d5	= thread->Registers.d5;
-  ctx->d6	= thread->Registers.d6;
-  ctx->d7	= thread->Registers.d7;
+  ctx->vecnum = 0xdeadbeef;
+  ctx->sr = thread->Registers.sr;
+  ctx->pc = *(unsigned32 *) thread->Registers.a7_msp;
+  ctx->d0 = 0xdeadbeef;
+  ctx->d1 = 0xdeadbeef;
+  ctx->a0 = 0xdeadbeef;
+  ctx->a1 = 0xdeadbeef;
+
+  ctx->a2 = (unsigned32) thread->Registers.a2;
+  ctx->a3 = (unsigned32) thread->Registers.a3;
+  ctx->a4 = (unsigned32) thread->Registers.a4;
+  ctx->a5 = (unsigned32) thread->Registers.a5;
+  ctx->a6 = (unsigned32) thread->Registers.a6;
+  ctx->a7 = (unsigned32) thread->Registers.a7_msp;
+  ctx->d2 = thread->Registers.d2;
+  ctx->d3 = thread->Registers.d3;
+  ctx->d4 = thread->Registers.d4;
+  ctx->d5 = thread->Registers.d5;
+  ctx->d6 = thread->Registers.d6;
+  ctx->d7 = thread->Registers.d7;
 }
 
-void
-set_ctx_thread( Thread_Control *thread, CPU_Exception_frame* ctx)
+  void
+set_ctx_thread (Thread_Control * thread, CPU_Exception_frame * ctx)
 {
-  thread->Registers.sr	= ctx->sr;
-  thread->Registers.d2	= ctx->d2;
-  thread->Registers.d3	= ctx->d3;
-  thread->Registers.d4	= ctx->d4;
-  thread->Registers.d5	= ctx->d5;
-  thread->Registers.d6	= ctx->d6;
-  thread->Registers.d7	= ctx->d7;
-  thread->Registers.a2  = (void *)ctx->a2;
-  thread->Registers.a3	= (void *)ctx->a3;
-  thread->Registers.a4	= (void *)ctx->a4;
-  thread->Registers.a5	= (void *)ctx->a5;
-  thread->Registers.a6	= (void *)ctx->a6;
-  thread->Registers.a7_msp	= (void *)ctx->a7;
+  thread->Registers.sr = ctx->sr;
+  thread->Registers.d2 = ctx->d2;
+  thread->Registers.d3 = ctx->d3;
+  thread->Registers.d4 = ctx->d4;
+  thread->Registers.d5 = ctx->d5;
+  thread->Registers.d6 = ctx->d6;
+  thread->Registers.d7 = ctx->d7;
+  thread->Registers.a2 = (void *) ctx->a2;
+  thread->Registers.a3 = (void *) ctx->a3;
+  thread->Registers.a4 = (void *) ctx->a4;
+  thread->Registers.a5 = (void *) ctx->a5;
+  thread->Registers.a6 = (void *) ctx->a6;
+  thread->Registers.a7_msp = (void *) ctx->a7;
 }
 
-int
-Single_Step(CPU_Exception_frame* ctx)
+  int
+Single_Step (CPU_Exception_frame * ctx)
 {
-  if ((ctx->sr & (1<<15)) != 0  ||  ExitForSingleStep != 0) {
-    /* Check coherency */
-    assert ((ctx->sr & (1<<15)) != 0);
+  if ((ctx->sr & (1 << 15)) != 0 || ExitForSingleStep != 0) {
+    /*
+     * Check coherency 
+     */
+    assert ((ctx->sr & (1 << 15)) != 0);
     assert (ExitForSingleStep != 0);
     return 0;
   }
-  ctx->sr |= 1<<15;
+  ctx->sr |= 1 << 15;
   ++ExitForSingleStep;
   return 0;
 }
 
-int
-CheckForSingleStep (CPU_Exception_frame* ctx)
+  int
+CheckForSingleStep (CPU_Exception_frame * ctx)
 {
-    if (ExitForSingleStep) {
-	ctx->sr &= ~(1<<15);
-	ExitForSingleStep = 0;
-	return 1;
-    }
-    return 0;
+  if (ExitForSingleStep) {
+    ctx->sr &= ~(1 << 15);
+    ExitForSingleStep = 0;
+    return 1;
+  }
+  return 0;
 }
 
-void
-CancelSingleStep (CPU_Exception_frame* ctx)
+  void
+CancelSingleStep (CPU_Exception_frame * ctx)
 {
-	/* Cancel scheduled SS */
-  ctx->sr &= ~(1<<15);
-  ExitForSingleStep-- ;
+  /*
+   * Cancel scheduled SS 
+   */
+  ctx->sr &= ~(1 << 15);
+  ExitForSingleStep--;
 }
 
-rtems_isr excHandler();
+extern rtems_isr excHandler ();
 
-void connect_rdbg_exception(void)
+  void
+connect_rdbg_exception (void)
+{
+  set_vector (excHandler, 9, 0);
+  set_vector (excHandler, 47, 0);
+  set_vector (excHandler, 36, 0);
+}
+
+void
+disconnect_rdbg_exception (void)
 {
-  set_vector(excHandler, 9, 0);
-  set_vector(excHandler, 47, 0);
-  set_vector(excHandler, 36, 0);
 }