2008-08-18 Joel Sherrill <joel.sherrill@oarcorp.com>

	* mpc6xx/mmu/pte121.c, mpc6xx/mmu/pte121.h, mpc6xx/timer/timer.c,
	new-exceptions/e500_raw_exc_init.c,
	new-exceptions/bspsupport/ppc_exc_bspsupp.h,
	new-exceptions/bspsupport/vectors_init.c: Fix warnings.

7 files changed, 37 insertions, 38 deletions

diff --git a/c/src/lib/libcpu/powerpc/ChangeLog b/c/src/lib/libcpu/powerpc/ChangeLog
index f5f48cb1c9..bfccba43a8 100644
--- a/c/src/lib/libcpu/powerpc/ChangeLog
+++ b/c/src/lib/libcpu/powerpc/ChangeLog
@@ -1,3 +1,10 @@
+2008-08-18	Joel Sherrill <joel.sherrill@oarcorp.com>
+
+	* mpc6xx/mmu/pte121.c, mpc6xx/mmu/pte121.h, mpc6xx/timer/timer.c,
+	new-exceptions/e500_raw_exc_init.c,
+	new-exceptions/bspsupport/ppc_exc_bspsupp.h,
+	new-exceptions/bspsupport/vectors_init.c: Fix warnings.
+
 2008-07-27	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* Makefile.am: Remove doxygen comments.
diff --git a/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c b/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c
index 3436256594..4f430cefc1 100644
--- a/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c
+++ b/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c
@@ -231,7 +231,7 @@ dumpPteg (unsigned long vsid, unsigned long pi, unsigned long hash);
 unsigned long
 triv121IsRangeMapped (long vsid, unsigned long start, unsigned long end);
 
-static void do_dssall ();
+static void do_dssall (void);
 
 /**************************** STATIC VARIABLES ****************************/
 
@@ -899,7 +899,7 @@ triv121UnmapEa (unsigned long ea)
  * Just do it to be on the safe side...
  */
 static void
-do_dssall ()
+do_dssall (void)
 {
   /* Before changing BATs, 'dssall' must be issued.
    * We check MSR for MSR_VE and issue a 'dssall' if
diff --git a/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.h b/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.h
index 54465e06bf..6b9497106d 100644
--- a/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.h
+++ b/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.h
@@ -219,20 +219,17 @@ triv121PgTblSDR1(Triv121PgTbl pgTbl);
  *       may have to switch overlapping BATs OFF in order
  *       for the page table mappings to take effect.
  */
-void
-triv121PgTblActivate(Triv121PgTbl pgTbl);
+void triv121PgTblActivate(Triv121PgTbl pgTbl);
 
 /* Find the PTE for a EA and print its contents to stdout
  * RETURNS: pte for EA or NULL if no entry was found.
  */
-APte
-triv121DumpEa(unsigned long ea);
+APte triv121DumpEa(unsigned long ea);
 
 /* Find and return a PTE for a vsid/pi combination
  * RETURNS: pte or NULL if no entry was found
  */
-APte
-triv121FindPte(unsigned long vsid, unsigned long pi);
+APte triv121FindPte(unsigned long vsid, unsigned long pi);
 
 /* 
  * Unmap an effective address
@@ -240,8 +237,7 @@ triv121FindPte(unsigned long vsid, unsigned long pi);
  * RETURNS: pte that mapped the ea or NULL if no
  *          mapping existed.
  */
-APte
-triv121UnmapEa(unsigned long ea);
+APte triv121UnmapEa(unsigned long ea);
 
 /* 
  * Change the WIMG and PP attributes of the page containing 'ea'
@@ -251,24 +247,20 @@ triv121UnmapEa(unsigned long ea);
  *
  * RETURNS: Pointer to modified PTE or NULL if 'ea' is not mapped.
  */
-APte
-triv121ChangeEaAttributes(unsigned long ea, int wimg, int pp);
+APte triv121ChangeEaAttributes(unsigned long ea, int wimg, int pp);
 
 /* Make the whole page table writable
  * NOTES:   If the page table has not been initialized yet,
  *          this routine has no effect (i.e., after
  *          initialization the page table will still be read-only).
  */
-void
-triv121MakePgTblRW();
+void triv121MakePgTblRW(void);
 
 /* Make the whole page table read-only
  */
-void
-triv121MakePgTblRO();
+void triv121MakePgTblRO(void);
 
 /* Dump a pte to stdout */
-long
-triv121DumpPte(APte pte);
+long triv121DumpPte(APte pte);
 
 #endif
diff --git a/c/src/lib/libcpu/powerpc/mpc6xx/timer/timer.c b/c/src/lib/libcpu/powerpc/mpc6xx/timer/timer.c
index f32ebca34b..032482aef2 100644
--- a/c/src/lib/libcpu/powerpc/mpc6xx/timer/timer.c
+++ b/c/src/lib/libcpu/powerpc/mpc6xx/timer/timer.c
@@ -28,7 +28,7 @@ unsigned clicks_overhead = 0;
  * Timer Get overhead
  */
 
-int Timer_get_clicks_overhead()
+int Timer_get_clicks_overhead(void)
 {
   uint64_t    clicks;
 
@@ -42,7 +42,7 @@ int Timer_get_clicks_overhead()
 /*
  * Timer_initialize 
  */
-void Timer_initialize()
+void Timer_initialize(void)
 {
 
   /*
@@ -58,7 +58,7 @@ void Timer_initialize()
  *  Read_timer
  */
 
-int Read_timer()
+int Read_timer(void)
 {
   uint64_t    total64;
   uint32_t    total;
@@ -77,7 +77,7 @@ int Read_timer()
   return (int) BSP_Convert_decrementer(total - clicks_overhead);
 }
 
-unsigned long long Read_long_timer()
+unsigned long long Read_long_timer(void)
 {
   uint64_t    total64;
 
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_bspsupp.h b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_bspsupp.h
index 6121895291..5c1cb34c73 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_bspsupp.h
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_bspsupp.h
@@ -109,24 +109,24 @@ extern unsigned ppc_exc_min_prolog_size[];
 extern unsigned ppc_exc_tgpr_clr_prolog_size[];
 
 /* Templates for ppc_exc_min_prolog_expand() which fills-in the vector information */
-extern void ppc_exc_min_prolog_async_tmpl_std();
-extern void ppc_exc_min_prolog_sync_tmpl_std();
-extern void ppc_exc_min_prolog_async_tmpl_p405_crit();
-extern void ppc_exc_min_prolog_sync_tmpl_p405_crit();
-extern void ppc_exc_min_prolog_async_tmpl_bookE_crit();
-extern void ppc_exc_min_prolog_sync_tmpl_bookE_crit();
-extern void ppc_exc_min_prolog_sync_tmpl_e500_mchk();
-extern void ppc_exc_min_prolog_async_tmpl_e500_mchk();
+extern void ppc_exc_min_prolog_async_tmpl_std(void);
+extern void ppc_exc_min_prolog_sync_tmpl_std(void);
+extern void ppc_exc_min_prolog_async_tmpl_p405_crit(void);
+extern void ppc_exc_min_prolog_sync_tmpl_p405_crit(void);
+extern void ppc_exc_min_prolog_async_tmpl_bookE_crit(void);
+extern void ppc_exc_min_prolog_sync_tmpl_bookE_crit(void);
+extern void ppc_exc_min_prolog_sync_tmpl_e500_mchk(void);
+extern void ppc_exc_min_prolog_async_tmpl_e500_mchk(void);
 
 /* Special prologue for handling register shadowing on 603-style CPUs */
-extern void ppc_exc_tgpr_clr_prolog();
+extern void ppc_exc_tgpr_clr_prolog(void);
 /* Classic prologue which determines the vector dynamically from
  * the offset address. This must only be used for classic, synchronous
  * exceptions with a vector offset aligned on a 256-byte boundary.
  */
-extern void ppc_exc_min_prolog_auto();
+extern void ppc_exc_min_prolog_auto(void);
 
-extern void ppc_exc_min_prolog_auto_packed();
+extern void ppc_exc_min_prolog_auto_packed(void);
 
 
 /* CPU support may store the address of a function here
@@ -136,7 +136,7 @@ extern void ppc_exc_min_prolog_auto_packed();
  * across PPC families so we need assistance from
  * CPU support
  */
-extern uint32_t (*ppc_exc_get_DAR)();
+extern uint32_t (*ppc_exc_get_DAR)(void);
 
 #ifdef __cplusplus
 };
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors_init.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors_init.c
index 7fab5e0591..79465f0ff6 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors_init.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors_init.c
@@ -4,7 +4,7 @@
  *  This include file describe the data structure and the functions implemented
  *  by rtems to handle exceptions.
  *
- *  CopyRight (C) 1999 valette@crf.canon.fr
+ *  Copyright (C) 1999 valette@crf.canon.fr
  *
  *  The license and distribution terms for this file may be
  *  found in found in the file LICENSE in this distribution or at
@@ -56,7 +56,7 @@ SPR_RO(DAR)
 SPR_RO(DEAR_BOOKE)
 SPR_RO(DEAR_405)
 
-uint32_t ppc_exc_get_DAR_dflt()
+uint32_t ppc_exc_get_DAR_dflt(void)
 {
 	if ( ppc_cpu_is_60x() )
 		return _read_DAR();
@@ -71,7 +71,7 @@ uint32_t ppc_exc_get_DAR_dflt()
 	return 0xdeadbeef;
 }
 
-uint32_t (*ppc_exc_get_DAR)() = ppc_exc_get_DAR_dflt;
+uint32_t (*ppc_exc_get_DAR)(void) = ppc_exc_get_DAR_dflt;
 
 void
 BSP_printStackTrace(BSP_Exception_frame* excPtr)
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/e500_raw_exc_init.c b/c/src/lib/libcpu/powerpc/new-exceptions/e500_raw_exc_init.c
index 4cafa2e5ed..f09a9ab757 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/e500_raw_exc_init.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/e500_raw_exc_init.c
@@ -6,7 +6,7 @@
 
 /* Use during early init for initializing the e500 IVOR/IVPR registers */
 void
-e500_setup_raw_exceptions()
+e500_setup_raw_exceptions(void)
 {
 	unsigned c;
 	if ( ! (c = ppc_cpu_is_bookE()) || PPC_BOOKE_405 == c )