diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-04-15 13:34:24 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-04-16 09:07:33 +0200 |
| commit | 487b94e7ad04ad2c00ff863d364d468b8fba52df (patch) | |
| tree | 32872b73374e38147923015817433b629ca8dcc5 /c/src/lib/libcpu | |
| parent | libchip: SMP support for NS16550 (diff) | |
| download | rtems-487b94e7ad04ad2c00ff863d364d468b8fba52df.tar.bz2 | |
bsps/powerpc: SMP support for SPR functions
These registers are local to a processor, there is no need to use SMP
locks here.
Diffstat (limited to 'c/src/lib/libcpu')
| -rw-r--r-- | c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h b/c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h index 25d3e96d14..ad3c8a7b95 100644 --- a/c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h +++ b/c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h @@ -8,7 +8,7 @@ */ /* - * Copyright (c) 2008-2013 embedded brains GmbH. + * Copyright (c) 2008-2014 embedded brains GmbH. * * embedded brains GmbH * Dornierstr. 4 @@ -578,14 +578,14 @@ static inline void ppc_set_decrementer_register(uint32_t dec) */ #define PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS(spr, bits) \ do { \ - rtems_interrupt_level level; \ + ISR_Level level; \ uint32_t val; \ uint32_t mybits = bits; \ - rtems_interrupt_disable(level); \ + _ISR_Disable_without_giant(level); \ val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \ val |= mybits; \ PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \ - rtems_interrupt_enable(level); \ + _ISR_Enable_without_giant(level); \ } while (0) /** @@ -597,16 +597,16 @@ static inline void ppc_set_decrementer_register(uint32_t dec) */ #define PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS_MASKED(spr, bits, mask) \ do { \ - rtems_interrupt_level level; \ + ISR_Level level; \ uint32_t val; \ uint32_t mybits = bits; \ uint32_t mymask = mask; \ - rtems_interrupt_disable(level); \ + _ISR_Disable_without_giant(level); \ val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \ val &= ~mymask; \ val |= mybits; \ PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \ - rtems_interrupt_enable(level); \ + _ISR_Enable_without_giant(level); \ } while (0) /** @@ -617,14 +617,14 @@ static inline void ppc_set_decrementer_register(uint32_t dec) */ #define PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS(spr, bits) \ do { \ - rtems_interrupt_level level; \ + ISR_Level level; \ uint32_t val; \ uint32_t mybits = bits; \ - rtems_interrupt_disable(level); \ + _ISR_Disable_without_giant(level); \ val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \ val &= ~mybits; \ PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \ - rtems_interrupt_enable(level); \ + _ISR_Enable_without_giant(level); \ } while (0) /** @@ -667,14 +667,14 @@ static inline void ppc_set_decrementer_register(uint32_t dec) */ #define PPC_SET_DEVICE_CONTROL_REGISTER_BITS(dcr, bits) \ do { \ - rtems_interrupt_level level; \ + ISR_Level level; \ uint32_t val; \ uint32_t mybits = bits; \ - rtems_interrupt_disable(level); \ + _ISR_Disable_without_giant(level); \ val = PPC_DEVICE_CONTROL_REGISTER(dcr); \ val |= mybits; \ PPC_SET_DEVICE_CONTROL_REGISTER(dcr, val); \ - rtems_interrupt_enable(level); \ + _ISR_Enable_without_giant(level); \ } while (0) /** @@ -686,16 +686,16 @@ static inline void ppc_set_decrementer_register(uint32_t dec) */ #define PPC_SET_DEVICE_CONTROL_REGISTER_BITS_MASKED(dcr, bits, mask) \ do { \ - rtems_interrupt_level level; \ + ISR_Level level; \ uint32_t val; \ uint32_t mybits = bits; \ uint32_t mymask = mask; \ - rtems_interrupt_disable(level); \ + _ISR_Disable_without_giant(level); \ val = PPC_DEVICE_CONTROL_REGISTER(dcr); \ val &= ~mymask; \ val |= mybits; \ PPC_SET_DEVICE_CONTROL_REGISTER(dcr, val); \ - rtems_interrupt_enable(level); \ + _ISR_Enable_without_giant(level); \ } while (0) /** @@ -706,14 +706,14 @@ static inline void ppc_set_decrementer_register(uint32_t dec) */ #define PPC_CLEAR_DEVICE_CONTROL_REGISTER_BITS(dcr, bits) \ do { \ - rtems_interrupt_level level; \ + ISR_Level level; \ uint32_t val; \ uint32_t mybits = bits; \ - rtems_interrupt_disable(level); \ + _ISR_Disable_without_giant(level); \ val = PPC_DEVICE_CONTROL_REGISTER(dcr); \ val &= ~mybits; \ PPC_SET_DEVICE_CONTROL_REGISTER(dcr, val); \ - rtems_interrupt_enable(level); \ + _ISR_Enable_without_giant(level); \ } while (0) static inline uint32_t ppc_time_base(void) |