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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2010-08-25 20:33:25 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2010-08-25 20:33:25 +0000 |
| commit | ce3bfb7e477cfdb6ca332f6477f4d97e394f9f87 (patch) | |
| tree | cd460ee572e47056259be6081a726a44ca79784c /c/src/lib/libcpu/sparc64/shared/score/interrupt.S | |
| parent | 2010-08-25 Joel Sherrill <joel.sherrill@oarcorp.com> (diff) | |
| download | rtems-ce3bfb7e477cfdb6ca332f6477f4d97e394f9f87.tar.bz2 | |
2010-08-25 Gedare Bloom <giddyup44@yahoo.com>
PR 1688/libcpu
* shared/score/interrupt.S: Fix bug in the sun4u _ISR_Dispatch code
that ends up cloberring the global registers. It manifests primarily
as a memory alignment error when the globals are used to read to/from
memory.
Diffstat (limited to 'c/src/lib/libcpu/sparc64/shared/score/interrupt.S')
| -rw-r--r-- | c/src/lib/libcpu/sparc64/shared/score/interrupt.S | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/c/src/lib/libcpu/sparc64/shared/score/interrupt.S b/c/src/lib/libcpu/sparc64/shared/score/interrupt.S index 4532cc563b..a8169025ea 100644 --- a/c/src/lib/libcpu/sparc64/shared/score/interrupt.S +++ b/c/src/lib/libcpu/sparc64/shared/score/interrupt.S @@ -357,7 +357,7 @@ PUBLIC(_ISR_Handler) ldub [%g7], %o5 orcc %o5, %g0, %g0 ! Is thread switch necessary? - bnz SYM(_ISR_Dispatch) ! yes, then invoke the dispatcher + bz simple_return ! no, then do a simple return. otherwise fallthru nop /* @@ -502,16 +502,16 @@ dispatchAgain: ldx [%sp + STACK_BIAS + ISF_G6_OFFSET], %g6 ! restore g6 ldx [%sp + STACK_BIAS + ISF_G7_OFFSET], %g7 ! restore g7 - - + ! Assume the interrupted context is in TL 0 with GL 0 / normal globals. + ! When tstate is restored at done/retry, the interrupted context is restored. ! return to TL[1], GL[1], and restore TSTATE, TPC, and TNPC wrpr %g0, 1, %tl ! return to GL=1 or AG #if defined(SUN4U) - rdpr %pstate, %g1 - andn %g1, SPARC_PSTATE_AG_MASK, %g1 - wrpr %g1, %g0, %pstate ! go to regular global + rdpr %pstate, %o1 + or %o1, SPARC_PSTATE_AG_MASK, %o1 + wrpr %o1, %g0, %pstate ! go to AG. #elif defined(SUN4V) wrpr %g0, 1, %gl #endif |