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authorJoel Sherrill <joel.sherrill@OARcorp.com>2010-06-17 16:16:25 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2010-06-17 16:16:25 +0000
commitc56982c86e6bd8d84fb98987998f108cb753379c (patch)
tree453e721631ea8992803aeb92d8ef9a5c0e2da5af /c/src/lib/libcpu/sparc64/ChangeLog
parentRemove (Abandoned) (diff)
downloadrtems-c56982c86e6bd8d84fb98987998f108cb753379c.tar.bz2
2010-06-17 Joel Sherrill <joel.sherrill@oarcorp.com>
* .cvsignore, ChangeLog, Makefile.am, configure.ac, preinstall.am, shared/cache/cache.c, shared/cache/cache_.h, shared/interrupts/installisrentries.c, shared/score/cpu.c, shared/score/interrupt.S, shared/syscall/sparc64-syscall.S, shared/syscall/sparc64-syscall.h: New files.
Diffstat (limited to 'c/src/lib/libcpu/sparc64/ChangeLog')
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diff --git a/c/src/lib/libcpu/sparc64/ChangeLog b/c/src/lib/libcpu/sparc64/ChangeLog
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+++ b/c/src/lib/libcpu/sparc64/ChangeLog
@@ -0,0 +1,55 @@
+2010-06-17 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ * .cvsignore, ChangeLog, Makefile.am, configure.ac, preinstall.am,
+ shared/cache/cache.c, shared/cache/cache_.h,
+ shared/interrupts/installisrentries.c, shared/score/cpu.c,
+ shared/score/interrupt.S, shared/syscall/sparc64-syscall.S,
+ shared/syscall/sparc64-syscall.h: New files.
+
+2010-05-13 Gedare Bloom <gedare@gwmail.gwu.edu>
+
+ * sun4u/syscall/sparc-syscall.S: disable/enable interrupts directly.
+
+2010-05-10 Gedare Bloom <gedare@gwmail.gwu.edu>
+
+ * shared/score/cpu.c, Makefile.am: Moved cpu.c from sun4v/score
+ * configure.ac: m5sim is no longer part of shared. sun4u option added.
+
+2010-05-10 Gedare Bloom <gedare@gwmail.gwu.edu>
+
+ * sun4u/: New model specific subdir.
+ * sun4u/score/, sun4u/syscall/: Copied from sun4v.
+
+2010-05-03 Gedare Bloom <gedare@gwmail.gwu.edu>
+
+ * m5sim/syscall/sparc-syscall.h, m5sim/syscall/sparc-syscall.S:
+ Renamed files from syscall.h and syscall.S
+
+2010-05-03 Gedare Bloom <gedare@gwmail.gwu.edu>
+
+ * sun4v/syscall/syscall.S: Explicitly enable IE bit when using
+ SYS_irqset.
+ * m5sim/score/cpu.c: install raw handler and isr get level are nops
+
+2010-05-02 Gedare Bloom <gedare@gwmail.gwu.edu>
+
+ * m5sim/score m5sim/syscall: new subdirs
+ * m5sim/syscall/syscall.h m5sim/syscall/syscall.S: New files.
+
+2010-05-02 Gedare Bloom <gedare@gwmail.gwu.edu>
+
+ * sun4v/score/cpu_asm.S: Remove context switch code.
+
+2010-05-02 Gedare Bloom <gedare@gwmail.gwu.edu>
+
+ * shared/, shared/cache, shared/interrupts: Moved cache and
+ interrupts into shared folder.
+
+2010-05-02 Gedare Bloom <gedare@gwmail.gwu.edu>
+
+ * sun4v, sun4v/score/cpu_asm.S, sun4v/score/cpu.c: Copied from
+ score/cpu/sparc64
+
+2010-05-02 Gedare Bloom <gedare@gwmail.gwu.edu>
+
+ * ChangeLog: New file.