diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-11-15 21:40:05 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-11-15 21:40:05 +0000 |
| commit | ca4060826dead6c97983821a3222238d86136a0c (patch) | |
| tree | ea20f412ee8d78b1033f191a0e047167499757a3 /c/src/lib/libcpu/sparc/cache/cache.c | |
| parent | 2000-11-14 Jiri Gaisler <jgais@ws.estec.esa.nl> (diff) | |
| download | rtems-ca4060826dead6c97983821a3222238d86136a0c.tar.bz2 | |
2000-11-14 Jiri Gaisler <jgais@ws.estec.esa.nl>
* Makefile.am, configure.in: Added support for instruction
cache enabling based on CPU model.
* cache/.cvsignore, cache/Makefile.am, cache/cache.c,
cache/cache_.h: New files.
Diffstat (limited to 'c/src/lib/libcpu/sparc/cache/cache.c')
| -rw-r--r-- | c/src/lib/libcpu/sparc/cache/cache.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/sparc/cache/cache.c b/c/src/lib/libcpu/sparc/cache/cache.c new file mode 100644 index 0000000000..d0b2fc5096 --- /dev/null +++ b/c/src/lib/libcpu/sparc/cache/cache.c @@ -0,0 +1,19 @@ +/* + * Cache Management Support Routines for the MC68040 + * + * $Id$ + */ + +#include <rtems.h> +#include "cache_.h" + + +#if defined(HAS_INSTRUCTION_CACHE) + +void _CPU_cache_invalidate_entire_instruction ( void ) +{ + asm volatile ("flush"); +} +#endif + +/* end of file */ |