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| author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-03-31 02:04:00 +0000 |
|---|---|---|
| committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-03-31 02:04:00 +0000 |
| commit | 66c373bf01bd055ad89eca5d4b403513fbcf65cf (patch) | |
| tree | e2d0a4f7068567e184a9caf32e8b45281937c0b3 /c/src/lib/libcpu/powerpc/shared | |
| parent | 2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org> (diff) | |
| download | rtems-66c373bf01bd055ad89eca5d4b403513fbcf65cf.tar.bz2 | |
2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org>
* mpc505/timer/timer.c, mpc5xx/timer/timer.c,
mpc6xx/clock/c_clock.c, mpc6xx/timer/timer.c, mpc8260/clock/clock.c,
mpc8260/console-generic/console-generic.c, mpc8260/cpm/cp.c,
mpc8260/cpm/dpram.c, mpc8260/include/cpm.h, mpc8260/include/mmu.h,
mpc8260/include/mpc8260.h, mpc8260/mmu/mmu.c, mpc8260/timer/timer.c,
mpc8xx/clock/clock.c, mpc8xx/console-generic/console-generic.c,
mpc8xx/cpm/cp.c, mpc8xx/cpm/dpram.c, mpc8xx/include/cpm.h,
mpc8xx/include/mmu.h, mpc8xx/include/mpc8xx.h, mpc8xx/mmu/mmu.c,
mpc8xx/timer/timer.c, ppc403/clock/clock.c,
ppc403/console/console.c, ppc403/console/console405.c,
ppc403/ictrl/ictrl.c, ppc403/ictrl/ictrl.h, ppc403/timer/timer.c,
ppc403/tty_drv/tty_drv.c, rtems/powerpc/cache.h, shared/src/cache.c:
Convert to using c99 fixed size types.
Diffstat (limited to 'c/src/lib/libcpu/powerpc/shared')
| -rw-r--r-- | c/src/lib/libcpu/powerpc/shared/src/cache.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/c/src/lib/libcpu/powerpc/shared/src/cache.c b/c/src/lib/libcpu/powerpc/shared/src/cache.c index a83e28891b..285fe21b8b 100644 --- a/c/src/lib/libcpu/powerpc/shared/src/cache.c +++ b/c/src/lib/libcpu/powerpc/shared/src/cache.c @@ -47,7 +47,7 @@ void _CPU_cache_enable_data ( void ) { - unsigned32 value; + uint32_t value; PPC_Get_HID0( value ); value |= 0x00004000; /* set DCE bit */ PPC_Set_HID0( value ); @@ -56,7 +56,7 @@ void _CPU_cache_enable_data ( void _CPU_cache_disable_data ( void ) { - unsigned32 value; + uint32_t value; PPC_Get_HID0( value ); value &= 0xFFFFBFFF; /* clear DCE bit */ PPC_Set_HID0( value ); @@ -65,7 +65,7 @@ void _CPU_cache_disable_data ( void _CPU_cache_enable_instruction ( void ) { - unsigned32 value; + uint32_t value; PPC_Get_HID0( value ); value |= 0x00008000; /* Set ICE bit */ PPC_Set_HID0( value ); @@ -74,7 +74,7 @@ void _CPU_cache_enable_instruction ( void _CPU_cache_disable_instruction ( void ) { - unsigned32 value; + uint32_t value; PPC_Get_HID0( value ); value &= 0xFFFF7FFF; /* Clear ICE bit */ PPC_Set_HID0( value ); @@ -108,7 +108,7 @@ void _CPU_cache_unfreeze_data ( void ) {} void _CPU_cache_enable_data ( void ) { - unsigned32 r1; + uint32_t r1; r1 = (0x2<<24); mtspr( 568, r1 ); isync; @@ -116,7 +116,7 @@ void _CPU_cache_enable_data ( void ) void _CPU_cache_disable_data ( void ) { - unsigned32 r1; + uint32_t r1; r1 = (0x4<<24); mtspr( 568, r1 ); isync; @@ -135,7 +135,7 @@ void _CPU_cache_unfreeze_instruction ( void ) {} void _CPU_cache_enable_instruction ( void ) { - unsigned32 r1; + uint32_t r1; r1 = (0x2<<24); mtspr( 560, r1 ); isync; @@ -143,7 +143,7 @@ void _CPU_cache_enable_instruction ( void ) void _CPU_cache_disable_instruction ( void ) { - unsigned32 r1; + uint32_t r1; r1 = (0x4<<24); mtspr( 560, r1 ); isync; |