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authorRalf Corsepius <ralf.corsepius@rtems.org>2004-03-31 02:04:00 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2004-03-31 02:04:00 +0000
commit66c373bf01bd055ad89eca5d4b403513fbcf65cf (patch)
treee2d0a4f7068567e184a9caf32e8b45281937c0b3 /c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.c
parent2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org> (diff)
downloadrtems-66c373bf01bd055ad89eca5d4b403513fbcf65cf.tar.bz2
2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org>
* mpc505/timer/timer.c, mpc5xx/timer/timer.c, mpc6xx/clock/c_clock.c, mpc6xx/timer/timer.c, mpc8260/clock/clock.c, mpc8260/console-generic/console-generic.c, mpc8260/cpm/cp.c, mpc8260/cpm/dpram.c, mpc8260/include/cpm.h, mpc8260/include/mmu.h, mpc8260/include/mpc8260.h, mpc8260/mmu/mmu.c, mpc8260/timer/timer.c, mpc8xx/clock/clock.c, mpc8xx/console-generic/console-generic.c, mpc8xx/cpm/cp.c, mpc8xx/cpm/dpram.c, mpc8xx/include/cpm.h, mpc8xx/include/mmu.h, mpc8xx/include/mpc8xx.h, mpc8xx/mmu/mmu.c, mpc8xx/timer/timer.c, ppc403/clock/clock.c, ppc403/console/console.c, ppc403/console/console405.c, ppc403/ictrl/ictrl.c, ppc403/ictrl/ictrl.h, ppc403/timer/timer.c, ppc403/tty_drv/tty_drv.c, rtems/powerpc/cache.h, shared/src/cache.c: Convert to using c99 fixed size types.
Diffstat (limited to 'c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.c')
-rw-r--r--c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.c38
1 files changed, 19 insertions, 19 deletions
diff --git a/c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.c b/c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.c
index 769f200822..d459a31306 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.c
@@ -45,7 +45,7 @@ rtems_isr_entry ictrl_vector_table[PPC_IRQ_EXT_MAX];
*/
#if defined(ppc405)
RTEMS_INLINE_ROUTINE void
-clr_exisr(unsigned32 mask)
+clr_exisr(uint32_t mask)
{
asm volatile ("mtdcr 0xC0,%0"::"r" (mask));/*EXISR*/
}
@@ -53,10 +53,10 @@ clr_exisr(unsigned32 mask)
/*
* get value of EXISR
*/
-RTEMS_INLINE_ROUTINE unsigned32
+RTEMS_INLINE_ROUTINE uint32_t
get_exisr(void)
{
- unsigned32 val;
+ uint32_t val;
asm volatile ("mfdcr %0,0xC0":"=r" (val));/*EXISR*/
return val;
@@ -65,10 +65,10 @@ get_exisr(void)
/*
* get value of EXIER
*/
-RTEMS_INLINE_ROUTINE unsigned32
+RTEMS_INLINE_ROUTINE uint32_t
get_exier(void)
{
- unsigned32 val;
+ uint32_t val;
asm volatile ("mfdcr %0,0xC2":"=r" (val));/*EXIER*/
return val;
}
@@ -77,7 +77,7 @@ get_exier(void)
* set value of EXIER
*/
RTEMS_INLINE_ROUTINE void
-set_exier(unsigned32 val)
+set_exier(uint32_t val)
{
asm volatile ("mtdcr 0xC2,%0"::"r" (val));/*EXIER*/
}
@@ -85,7 +85,7 @@ set_exier(unsigned32 val)
#else /* not ppc405 */
RTEMS_INLINE_ROUTINE void
-clr_exisr(unsigned32 mask)
+clr_exisr(uint32_t mask)
{
asm volatile ("mtdcr 0x40,%0"::"r" (mask));/*EXISR*/
}
@@ -93,10 +93,10 @@ clr_exisr(unsigned32 mask)
/*
* get value of EXISR
*/
-RTEMS_INLINE_ROUTINE unsigned32
+RTEMS_INLINE_ROUTINE uint32_t
get_exisr(void)
{
- unsigned32 val;
+ uint32_t val;
asm volatile ("mfdcr %0,0x40":"=r" (val));/*EXISR*/
return val;
@@ -105,10 +105,10 @@ get_exisr(void)
/*
* get value of EXIER
*/
-RTEMS_INLINE_ROUTINE unsigned32
+RTEMS_INLINE_ROUTINE uint32_t
get_exier(void)
{
- unsigned32 val;
+ uint32_t val;
asm volatile ("mfdcr %0,0x42":"=r" (val));/*EXIER*/
return val;
}
@@ -117,7 +117,7 @@ get_exier(void)
* set value of EXIER
*/
RTEMS_INLINE_ROUTINE void
-set_exier(unsigned32 val)
+set_exier(uint32_t val)
{
asm volatile ("mtdcr 0x42,%0"::"r" (val));/*EXIER*/
}
@@ -126,9 +126,9 @@ set_exier(unsigned32 val)
* enable an external interrupt, make this interrupt consistent
*/
RTEMS_INLINE_ROUTINE void
-enable_ext_irq( unsigned32 mask)
+enable_ext_irq( uint32_t mask)
{
- unsigned32 isrlvl;
+ uint32_t isrlvl;
_CPU_ISR_Disable(isrlvl);
set_exier(get_exier() | ((mask)&PPC_EXI_MASK));
_CPU_ISR_Enable(isrlvl);
@@ -138,9 +138,9 @@ enable_ext_irq( unsigned32 mask)
* disable an external interrupt, make this interrupt consistent
*/
RTEMS_INLINE_ROUTINE void
-disable_ext_irq( unsigned32 mask)
+disable_ext_irq( uint32_t mask)
{
- unsigned32 isrlvl;
+ uint32_t isrlvl;
_CPU_ISR_Disable(isrlvl);
set_exier(get_exier() & ~(mask) & PPC_EXI_MASK);
_CPU_ISR_Enable(isrlvl);
@@ -155,7 +155,7 @@ disable_ext_irq( unsigned32 mask)
*
*/
void
-ictrl_spurious_handler(unsigned32 spurious_mask,
+ictrl_spurious_handler(uint32_t spurious_mask,
CPU_Interrupt_frame *cpu_frame)
{
int v;
@@ -183,7 +183,7 @@ ictrl_spurious_handler(unsigned32 spurious_mask,
void
ictrl_isr(rtems_vector_number vector,CPU_Interrupt_frame *cpu_frame)
{
- unsigned32 istat,
+ uint32_t istat,
mask,
global_vec;
int exvec;
@@ -223,7 +223,7 @@ ictrl_isr(rtems_vector_number vector,CPU_Interrupt_frame *cpu_frame)
*/
rtems_status_code
ictrl_set_vector(rtems_isr_entry new_handler,
- unsigned32 vector,
+ uint32_t vector,
rtems_isr_entry *old_handler
)
{