diff options
author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2009-11-30 05:09:41 +0000 |
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committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2009-11-30 05:09:41 +0000 |
commit | 359e5374164ccb2a66833354b412a859c144ea2f (patch) | |
tree | 6f065d7d6247bc255f43ddb0152fc26c50bd4f87 /c/src/lib/libcpu/powerpc/ppc403/clock/clock.c | |
parent | Whitespace removal. (diff) | |
download | rtems-359e5374164ccb2a66833354b412a859c144ea2f.tar.bz2 |
Whitespace removal.
Diffstat (limited to 'c/src/lib/libcpu/powerpc/ppc403/clock/clock.c')
-rw-r--r-- | c/src/lib/libcpu/powerpc/ppc403/clock/clock.c | 90 |
1 files changed, 45 insertions, 45 deletions
diff --git a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c index afd282acdb..c9d9243b52 100644 --- a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c +++ b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c @@ -67,7 +67,7 @@ static uint32_t pit_value, tick_time; static bool auto_restart; void Clock_exit( void ); - + rtems_isr_entry set_vector( /* returns old vector */ rtems_isr_entry handler, /* isr routine */ rtems_vector_number vector, /* vector number */ @@ -77,10 +77,10 @@ rtems_isr_entry set_vector( /* returns old vector */ /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; - + static inline uint32_t get_itimer(void) { register uint32_t rc; @@ -117,10 +117,10 @@ void Clock_isr(void* handle) * setup for next interrupt; making sure the new value is reasonably * in the future.... in case we lost out on an interrupt somehow */ - + itimer_value = get_itimer(); tick_time += pit_value; - + /* * how far away is next interrupt *really* * It may be a long time; this subtraction works even if @@ -128,42 +128,42 @@ void Clock_isr(void* handle) * the miracle of unsigned math. */ clicks_til_next_interrupt = tick_time - itimer_value; - + /* * If it is too soon then bump it up. * This should only happen if CPU_HPPA_CLICKS_PER_TICK is too small. * But setting it low is useful for debug, so... */ - + if (clicks_til_next_interrupt < 400) { tick_time = itimer_value + 1000; clicks_til_next_interrupt = 1000; /* XXX: count these! this should be rare */ } - + /* * If it is too late, that means we missed the interrupt somehow. * Rather than wait 35-50s for a wrap, we just fudge it here. */ - + if (clicks_til_next_interrupt > pit_value) { tick_time = itimer_value + 1000; clicks_til_next_interrupt = 1000; /* XXX: count these! this should never happen :-) */ } - - asm volatile ("mtspr 0x3db, %0" :: "r" + + asm volatile ("mtspr 0x3db, %0" :: "r" (clicks_til_next_interrupt)); /* PIT */ } - + asm volatile ( "mtspr 0x3d8, %0" :: "r" (0x08000000)); /* TSR */ - + Clock_driver_ticks++; /* Give BSP a chance to say if they want to re-enable interrupts */ - + #if defined(BSP_PPC403_CLOCK_ISR_IRQ_LEVEL) _ISR_Set_level(BSP_PPC403_CLOCK_ISR_IRQ_LEVEL); #endif @@ -183,9 +183,9 @@ void Clock_isr(void* handle) int ClockIsOn(const rtems_irq_connect_data* unused) { register uint32_t tcr; - + asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ - + return (tcr & 0x04000000) != 0; } #endif @@ -199,12 +199,12 @@ void ClockOff( ) { register uint32_t tcr; - + asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ - + tcr &= ~ 0x04400000; - - asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */ + + asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */ } void ClockOn( @@ -222,9 +222,9 @@ void ClockOn( #ifdef ppc403 uint32_t pvr; #endif /* ppc403 */ - + Clock_driver_ticks = 0; - + #ifndef ppc405 /* this is a ppc403 */ asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */ if (bsp_timer_internal_clock) { @@ -234,21 +234,21 @@ void ClockOn( iocr |= 4; /* select external timer clock */ } asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */ - + asm volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */ if (((pvr & 0xffff0000) >> 16) != 0x0020) return; /* Not a ppc403 */ - + if ((pvr & 0xff00) == 0x0000) /* 403GA */ #if 0 /* FIXME: in which processor versions will "autoload" work properly? */ auto_restart = (pvr & 0x00f0) > 0x0000 ? true : false; -#else +#else /* no known chip version supports auto restart of timer... */ auto_restart = false; #endif else if ((pvr & 0xff00) == 0x0100) /* 403GB */ auto_restart = true; - + #else /* ppc405 */ asm volatile ("mfdcr %0, 0x0b2" : "=r" (iocr)); /*405GP CPC0_CR1 */ if (bsp_timer_internal_clock) { @@ -268,20 +268,20 @@ void ClockOn( #endif /* ppc405 */ pit_value = rtems_configuration_get_microseconds_per_tick() * bsp_clicks_per_usec; - + /* * Set PIT value */ asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */ - - /* + + /* * Set timer to autoreload, bit TCR->ARE = 1 0x0400000 * Enable PIT interrupt, bit TCR->PIE = 1 0x4000000 */ tick_time = get_itimer() + pit_value; - asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ + asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ tcr = (tcr & ~0x04400000) | (auto_restart ? 0x04400000 : 0x04000000); #if 1 asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */ @@ -304,9 +304,9 @@ void Install_clock( #ifdef ppc403 uint32_t pvr; #endif /* ppc403 */ - + Clock_driver_ticks = 0; - + /* * initialize the interval here * First tick is set to right amount of time in the future @@ -355,9 +355,9 @@ ReInstall_clock( ) { uint32_t isrlevel = 0; - + rtems_interrupt_disable(isrlevel); - + #if PPC_HAS_CLASSIC_EXCEPTIONS { rtems_isr_entry previous_isr; @@ -372,15 +372,15 @@ ReInstall_clock( #else { rtems_irq_connect_data clockIrqConnData; - + clockIrqConnData.name = BSP_PIT; if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) { printk("Unable to stop system clock\n"); rtems_fatal_error_occurred(1); } - + BSP_remove_rtems_irq_handler (&clockIrqConnData); - + clockIrqConnData.on = ClockOn; clockIrqConnData.off = ClockOff; clockIrqConnData.isOn = ClockIsOn; @@ -402,15 +402,15 @@ ReInstall_clock( * Called via atexit() * Remove the clock interrupt handler by setting handler to NULL * - * This will not work on the 405GP because - * when bit's are set in TCR they can only be unset by a reset + * This will not work on the 405GP because + * when bit's are set in TCR they can only be unset by a reset */ void Clock_exit(void) { #if PPC_HAS_CLASSIC_EXCEPTIONS ClockOff(); - + (void) set_vector(0, PPC_IRQ_PIT, 1); #elif defined(BSP_PPC403_CLOCK_HOOK_EXCEPTION) ClockOff(); @@ -418,13 +418,13 @@ void Clock_exit(void) #else { rtems_irq_connect_data clockIrqConnData; - + clockIrqConnData.name = BSP_PIT; if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) { printk("Unable to stop system clock\n"); rtems_fatal_error_occurred(1); } - + BSP_remove_rtems_irq_handler (&clockIrqConnData); } #endif @@ -437,13 +437,13 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } |