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authorTill Straumann <strauman@slac.stanford.edu>2008-07-16 21:57:55 +0000
committerTill Straumann <strauman@slac.stanford.edu>2008-07-16 21:57:55 +0000
commitd60239f6c85fd7b0c1eb6ff54fcfb0b3b87040c6 (patch)
tree04aa5a68143ec752a9ff01a787f61d0a9cd607e8 /c/src/lib/libcpu/powerpc/new-exceptions/cpu.c
parent2008-07-16 Till Straumann <strauman@slac.stanford.edu> (diff)
downloadrtems-d60239f6c85fd7b0c1eb6ff54fcfb0b3b87040c6.tar.bz2
2008-07-16 Till Straumann <strauman@slac.stanford.edu>
* new-exceptions/cpu.c: use ppc_interrupt_get_disable_mask() to determine which bits to set/clear from _CPU_Context_Initialize().
Diffstat (limited to 'c/src/lib/libcpu/powerpc/new-exceptions/cpu.c')
-rw-r--r--c/src/lib/libcpu/powerpc/new-exceptions/cpu.c18
1 files changed, 16 insertions, 2 deletions
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c b/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c
index 405aa812d3..c80e1fe1d0 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c
@@ -55,6 +55,7 @@ void _CPU_Initialize(
* _CPU_Context_Initialize
*/
+
void _CPU_Context_Initialize(
Context_Control *the_context,
uint32_t *stack_base,
@@ -76,11 +77,24 @@ void _CPU_Context_Initialize(
_CPU_MSR_GET( msr_value );
+ /*
+ * Setting the interrupt mask here is not strictly necessary
+ * since the IRQ level will be established from _Thread_Handler()
+ * again, as soon as the task starts execution.
+ * Because we have to establish a defined state anyways we
+ * can as well leave this code here.
+ * I.e., simply (and unconditionally) saying
+ *
+ * msr_value &= ~ppc_interrupt_get_disable_mask();
+ *
+ * would be an alternative.
+ */
+
if (!(new_level & CPU_MODES_INTERRUPT_MASK)) {
- msr_value |= MSR_EE;
+ msr_value |= ppc_interrupt_get_disable_mask();
}
else {
- msr_value &= ~MSR_EE;
+ msr_value &= ~ppc_interrupt_get_disable_mask();
}
the_context->msr = msr_value;