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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2012-11-19 08:37:04 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2012-12-03 13:17:08 +0100 |
commit | f665f13ddd79ed78ca65c27a21fd87de6f7d1474 (patch) | |
tree | 7d6af8a9a618da5b7f7c71daa4329e9fb00cf5ab /c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c | |
parent | bsps/powerpc: Add PPC_EXC_CONFIG_USE_FIXED_HANDLER (diff) | |
download | rtems-f665f13ddd79ed78ca65c27a21fd87de6f7d1474.tar.bz2 |
bsps/powerpc: Add PPC_EXC_CONFIG_BOOKE_ONLY
In combination with the PPC_EXC_CONFIG_USE_FIXED_HANDLER option this
removes all dependencies on valid read-write data. The exception
handling must be statically configured and all components reside in
read-only sections.
Diffstat (limited to 'c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c')
-rw-r--r-- | c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c index b239cdd60b..872eed49a9 100644 --- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c +++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c @@ -192,6 +192,8 @@ void ppc_exc_initialize( ppc_interrupt_set_disable_mask(interrupt_disable_mask); +#ifndef PPC_EXC_CONFIG_BOOKE_ONLY + /* Use current MMU / RI settings when running C exception handlers */ ppc_exc_msr_bits = ppc_machine_state_register() & (MSR_DR | MSR_IR | MSR_RI); @@ -199,7 +201,9 @@ void ppc_exc_initialize( /* Need vector unit enabled to save/restore altivec context */ ppc_exc_msr_bits |= MSR_VE; #endif - + +#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */ + if (ppc_cpu_is_bookE() == PPC_BOOKE_STD || ppc_cpu_is_bookE() == PPC_BOOKE_E500) { ppc_exc_initialize_booke(); } @@ -221,6 +225,7 @@ void ppc_exc_initialize( } } +#ifndef PPC_EXC_CONFIG_BOOKE_ONLY /* If we are on a classic PPC with MSR_DR enabled then * assert that the mapping for at least this task's * stack is write-back-caching enabled (see README/CAVEATS) @@ -252,4 +257,5 @@ void ppc_exc_initialize( __asm__ volatile ("dcbz 0, %0"::"b" (p)); /* If we make it thru here then things seem to be OK */ } +#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */ } |