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authorJoel Sherrill <joel.sherrill@OARcorp.com>2003-02-20 22:07:22 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2003-02-20 22:07:22 +0000
commitd49389adb995168842d8f5b967945f6bbb281244 (patch)
tree7035607055dbc6c107416c594e7baefb89e69332 /c/src/lib/libcpu/powerpc/mpc6xx
parent2003-02-20 Till Straumann <strauman@slac.stanford.edu> (diff)
downloadrtems-d49389adb995168842d8f5b967945f6bbb281244.tar.bz2
2003-02-20 Till Straumann <strauman@slac.stanford.edu>
PR 349/bsps * mpc6xx/exceptions/raw_exception.c, mpc6xx/mmu/bat.c, mpc6xx/mmu/pte121.c, shared/include/cpuIdent.c, shared/include/cpuIdent.h, shared/src/Makefile.am, shared/src/stack.c, shared/src/stackTrace.h, powerpc/registers.h: - undo improper 'fix' who broke mpc604r identification - fix: 7400 identification PVR value was wrong - enhance 'setdbat()' to switch OFF a given BAT if called with 0 size - fix: page table support bugfix - enhancement: provide routines to take and print stack trace snapshots - add definitions for HID1 and DABR SPRs
Diffstat (limited to 'c/src/lib/libcpu/powerpc/mpc6xx')
-rw-r--r--c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.c4
-rw-r--r--c/src/lib/libcpu/powerpc/mpc6xx/mmu/bat.c9
-rw-r--r--c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c34
3 files changed, 38 insertions, 9 deletions
diff --git a/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.c b/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.c
index 7b6c6a573c..e2fca933a2 100644
--- a/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.c
+++ b/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.c
@@ -125,7 +125,7 @@ int mpc60x_vector_is_valid(rtems_vector vector)
break;
case PPC_604:
case PPC_604e:
- /* case PPC_604r: -- same value as PPC_750 */
+ case PPC_604r:
if (!mpc604_vector_is_valid(vector)) {
return 0;
}
@@ -138,7 +138,7 @@ int mpc60x_vector_is_valid(rtems_vector vector)
}
break;
default:
- printk("Please complete libcpu/powerpc/mpc6xx/raw_exception.c\n");
+ printk("Please complete libcpu/powerpc/mpc6xx/exceptions/raw_exception.c\n");
printk("current_ppc_cpu = %x\n", current_ppc_cpu);
return 0;
}
diff --git a/c/src/lib/libcpu/powerpc/mpc6xx/mmu/bat.c b/c/src/lib/libcpu/powerpc/mpc6xx/mmu/bat.c
index 4e49bcc07e..9c2df3f03f 100644
--- a/c/src/lib/libcpu/powerpc/mpc6xx/mmu/bat.c
+++ b/c/src/lib/libcpu/powerpc/mpc6xx/mmu/bat.c
@@ -43,7 +43,7 @@ void setdbat(int bat_index, unsigned long virt, unsigned long phys,
int wimgxpp;
ubat bat;
- bl = (size >> 17) - 1;
+ bl = (size >= (1<<17)) ? (size >> 17) - 1 : 0;
/* 603, 604, etc. */
wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE
| _PAGE_COHERENT | _PAGE_GUARDED);
@@ -53,8 +53,13 @@ void setdbat(int bat_index, unsigned long virt, unsigned long phys,
if (flags & _PAGE_USER)
bat.bat.batu.vp = 1;
bat_addrs[bat_index].start = virt;
- bat_addrs[bat_index].limit = virt + ((bl + 1) << 17) - 1;
+ bat_addrs[bat_index].limit = virt + (bl ? ((bl + 1) << 17) - 1 : 0);
bat_addrs[bat_index].phys = phys;
+ if ( 0 == bl ) {
+ /* size of 0 tells us to switch it off */
+ bat.bat.batu.vp = 0;
+ bat.bat.batu.vs = 0;
+ }
switch (bat_index) {
case 0 : asm_setdbat0(bat.word[0], bat.word[1]); break;
case 1 : asm_setdbat1(bat.word[0], bat.word[1]); break;
diff --git a/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c b/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c
index d0676833f7..5d25a1ac17 100644
--- a/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c
+++ b/c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c
@@ -22,8 +22,8 @@
#include <rtems.h>
#include <rtems/bspIo.h>
#include <libcpu/cpuIdent.h>
-#include <bsp.h>
#ifdef DEBUG_EXC
+#include <bsp.h>
#include <bsp/vectors.h>
#include <libcpu/raw_exception.h>
#endif
@@ -125,7 +125,7 @@
/* Horrible Macros */
-#ifdef __rtems
+#ifdef __rtems__
/* must not use printf until multitasking is up */
typedef void (*PrintF)(char *,...);
static PrintF whatPrintf(void)
@@ -363,8 +363,8 @@ triv121PgTblInit(unsigned long base, unsigned ldSize)
if (base & ((1<<ldSize)-1))
return 0; /* misaligned */
- /* This should work on a 604, but I couldn't test (I did
- * on 750 and 7400). Verify that the TLB invalidation works
+ /* This was tested on 604r, 750 and 7400.
+ * On other CPUs, verify that the TLB invalidation works
* for a new CPU variant and that it has hardware PTE lookup/
* TLB replacement before adding it to this list.
*
@@ -678,10 +678,34 @@ static int maxw=20; /* mute after detecting this many errors */
}
v=m=0;
- for (i=0, pte=pt->base; i<pt->size/sizeof(PTERec); i++,pte++) {
+#if 1
+ /* 10/9/2002: I had machine checks crashing after this loop
+ * terminated. Maybe caused by speculative loads
+ * from beyond the valid memory area (since the
+ * page hash table sits at the top of physical
+ * memory).
+ * Very bizarre - the other loops in this file
+ * seem to be fine. Maybe there is a compiler bug??
+ * For the moment, I let the loop run backwards...
+ *
+ * Also see the comment a couple of lines down.
+ */
+ for (i=pt->size/sizeof(PTERec)-1, pte=pt->base + i; i>=0; i--,pte--)
+#else
+ for (i=0, pte=pt->base; i<pt->size/sizeof(PTERec); i++,pte++)
+#endif
+ {
int err=0;
char buf[500];
unsigned long *lp=(unsigned long*)pte;
+#if 0
+ /* If I put this bogus while statement here (the body is
+ * never reached), the original loop works OK
+ */
+ while (pte >= pt->base + pt->size/sizeof(PTERec))
+ /* never reached */;
+#endif
+
if ( (*lp & (0xfffff0<<7)) || *(lp+1) & 0xe00 || (pte->v && pte->marked)) {
/* check for vsid (without segment bits) == 0, unused bits == 0, valid && marked */
sprintf(buf,"invalid VSID , unused bits or v && m");