2005-11-02 straumanatslacdotstanford.edu

	* mpc6xx/mmu/bat.c, mpc6xx/mmu/bat.h, mpc6xx/mmu/mmuAsm.S: moved
	assembly code to C; setdbat now supports high bats on 7450 CPUs;
	added argument checking to setdbat; added getdbat; moved early
	initialization code (clear_bats) from BSP to libcpu
	(CPU_clear_bats_early)

1 files changed, 39 insertions, 2 deletions

diff --git a/c/src/lib/libcpu/powerpc/mpc6xx/mmu/bat.h b/c/src/lib/libcpu/powerpc/mpc6xx/mmu/bat.h
index acd7509d8a..4748f5e6ee 100644
--- a/c/src/lib/libcpu/powerpc/mpc6xx/mmu/bat.h
+++ b/c/src/lib/libcpu/powerpc/mpc6xx/mmu/bat.h
@@ -25,16 +25,53 @@
 
 #include <libcpu/mmu.h>
 #include <libcpu/pgtable.h>
-#include <rtems/bspIo.h>
 
 #define IO_PAGE	(_PAGE_NO_CACHE | _PAGE_GUARDED | _PAGE_RW)
 
+#ifndef ASM
+/* Take no risks -- the essential parts of this routine run with
+ * interrupts disabled!
+ *
+ * The routine does basic parameter checks:
+ *   - Index must be 0..3 (0..7 on 7455, 7457).
+ *     If an index > 3 is requested the 745x is
+ *     programmed to enable the higher BATs.
+ *   - Size must be a power of two and <= 1<<28
+ *     (<=1<<31 on 7455, 7457. Also, on these processors
+ *     the special value 0xffffffff is allowed which stands
+ *     for 1<<32).
+ *     If a size > 1<<28 is requested, the 745x is
+ *     programmed to enable the larger block sizes.
+ *   - Bat ranges must not overlap.
+ *   - Physical & virtual addresses must be aligned
+ *     to the size.
+ */
 extern void setdbat(int bat_index, unsigned long virt, unsigned long phys,
 		    unsigned int size, int flags);
 
+/* read DBAT # 'idx' into *pu/*pl. NULL pointers may be passed.
+ * If pu and pl are NULL, the bat contents are dumped to the console (printk).
+ * 
+ * RETURNS: upper BAT contents or (-1) if index is invalid
+ */
+extern int getdbat(int bat_index, unsigned long *pu, unsigned long *pl);
+
+extern void asm_setdbat0(unsigned int uperPart, unsigned int lowerPart);
 extern void asm_setdbat1(unsigned int uperPart, unsigned int lowerPart);
 extern void asm_setdbat2(unsigned int uperPart, unsigned int lowerPart);
 extern void asm_setdbat3(unsigned int uperPart, unsigned int lowerPart);
-extern void asm_setdbat4(unsigned int uperPart, unsigned int lowerPart);
+#else
+
+/* Initialize all bats (upper and lower) to zero. This routine should *only*
+ * be called during early BSP initialization when no C-ABI is available
+ * yet.
+ * This routine clobbers r3 and r4.
+ * NOTE: on 7450 CPUs all 8 dbat/ibat units are cleared. On 601 CPUs only
+ *       4 ibats.
+ */
+	.globl CPU_clear_bats_early
+	.type  CPU_clear_bats_early,@function
+
+#endif
 
 #endif /* _LIBCPU_BAT_H */