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author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2011-02-11 09:46:53 +0000 |
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committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2011-02-11 09:46:53 +0000 |
commit | f9acc339fe66dce682d124d98956dd65af467676 (patch) | |
tree | 8af3a889cbb103d58797db6eff866511e4d36d4d /c/src/lib/libcpu/powerpc/e500/mmu/mmu.c | |
parent | 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org> (diff) | |
download | rtems-f9acc339fe66dce682d124d98956dd65af467676.tar.bz2 |
2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
* e500/mmu/mmu.c, mpc505/ictrl/ictrl.c, mpc505/timer/timer.c,
mpc5xx/ictrl/ictrl.c, mpc5xx/timer/timer.c,
mpc6xx/altivec/vec_sup.c, mpc6xx/clock/c_clock.c,
mpc6xx/mmu/bat.c, mpc6xx/mmu/bat.h, mpc6xx/mmu/pte121.c,
mpc8260/timer/timer.c, mpc8xx/timer/timer.c, new-exceptions/cpu.c,
new-exceptions/bspsupport/ppc_exc_initialize.c,
ppc403/clock/clock.c, ppc403/console/console.c,
ppc403/console/console.c.polled, ppc403/console/console405.c,
ppc403/irq/ictrl.c, ppc403/tty_drv/tty_drv.c,
rtems/powerpc/cache.h, shared/include/powerpc-utility.h, shared/src/cache.c:
Use "__asm__" instead of "asm" for improved c99-compliance.
Diffstat (limited to 'c/src/lib/libcpu/powerpc/e500/mmu/mmu.c')
-rw-r--r-- | c/src/lib/libcpu/powerpc/e500/mmu/mmu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/c/src/lib/libcpu/powerpc/e500/mmu/mmu.c b/c/src/lib/libcpu/powerpc/e500/mmu/mmu.c index 0c39800206..7fbfa6e5f5 100644 --- a/c/src/lib/libcpu/powerpc/e500/mmu/mmu.c +++ b/c/src/lib/libcpu/powerpc/e500/mmu/mmu.c @@ -99,9 +99,9 @@ /* Factory to generate inline macros for accessing the MAS registers */ #define __RDWRMAS(mas,rmas) \ static inline uint32_t _read_MAS##mas(void) \ - { uint32_t x; asm volatile("mfspr %0, %1": "=r"(x):"i"(rmas)); return x; } \ + { uint32_t x; __asm__ volatile("mfspr %0, %1": "=r"(x):"i"(rmas)); return x; } \ static inline void _write_MAS##mas(uint32_t x) \ - { asm volatile("mtspr %1, %0":: "r"(x),"i"(rmas)); } + { __asm__ volatile("mtspr %1, %0":: "r"(x),"i"(rmas)); } __RDWRMAS(0,FSL_EIS_MAS0) __RDWRMAS(1,FSL_EIS_MAS1) |