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authorJoel Sherrill <joel.sherrill@OARcorp.com>1999-07-26 22:11:02 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1999-07-26 22:11:02 +0000
commit54f440d311c48e0aae2635ba8610d5b0b8eca157 (patch)
treec6f34f93a051d2e0c7179ac2bc999a4beffff39a /c/src/lib/libcpu/m68k/m68040/fpsp/decbin.S
parentPatch fixing typo from Eric Valette <valette@crf.canon.fr> on bug report (diff)
downloadrtems-54f440d311c48e0aae2635ba8610d5b0b8eca157.tar.bz2
Patch from Charles-Antoine Gauthier <charles.gauthier@iit.nrc.ca>.
to address m68k-rtemself for the MVME167. Here is the rtems patch I promissed you a long time ago to enable ELF with m68k. The target name I selected is m68k-rtemself. It preserves the m68k-rtems COFF target, and is parterned after the other ELF/COFF dual targets. The mvme167.cfg file causes the -qelf flag to be used during compilation if the name of the compiler contains rtemself. This flag is used in the bsp_specs file to select the elflinkcmds file rather than the linkcmds file. The former is for ELF, the latter for COFF. Some patches are required to the mc68040 FPSP code. Some of the assembler files contain instructions that were rejected by the m68k-rtemself-as assembler. This is a minor bug in the m68k ELF assembler, I think.
Diffstat (limited to 'c/src/lib/libcpu/m68k/m68040/fpsp/decbin.S')
-rw-r--r--c/src/lib/libcpu/m68k/m68040/fpsp/decbin.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/c/src/lib/libcpu/m68k/m68040/fpsp/decbin.S b/c/src/lib/libcpu/m68k/m68040/fpsp/decbin.S
index 734c1b6961..03f0b084a0 100644
--- a/c/src/lib/libcpu/m68k/m68040/fpsp/decbin.S
+++ b/c/src/lib/libcpu/m68k/m68040/fpsp/decbin.S
@@ -232,7 +232,7 @@ nextlw:
//
m_sign:
btst #31,(%a0) //test sign of the mantissa
- beqs ap_st_z //if clear, go to append/strip zeros
+ beq ap_st_z //if clear, go to append/strip zeros
fnegx %fp0 //if set, negate fp0
//
@@ -290,7 +290,7 @@ ap_st_z:
cmpl #27,%d1 //test is with 27
ble pwrten //if abs(expA) <28, skip ap/st zeros
btst #30,(%a0) //check sign of exp
- bnes ap_st_n //if neg, go to neg side
+ bne ap_st_n //if neg, go to neg side
clrl %d1 //zero count reg
movel (%a0),%d4 //load lword 1 to d4
bfextu %d4{#28:#4},%d0 //get M16 in d0
@@ -338,7 +338,7 @@ ap_p_en:
tstl %d0 //check if d0 is zero
bnes ap_p_el //if not, get next bit
fmulx %fp1,%fp0 //mul mantissa by 10**(no_bits_shifted)
- bras pwrten //go calc pwrten
+ bra pwrten //go calc pwrten
//
// This section handles a negative adjusted exponent.
//