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authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-07-11 19:31:04 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-07-11 19:31:04 +0000
commitbc85fd5a6df8753543ba55c98a588e255471752b (patch)
treeb51e3eb5c77cca042081bb7ba88e5515560451d2 /c/src/lib/libcpu/i960/shared/soft_reset_asm.S
parentPatch rtems-rc-20000711-2-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de> (diff)
downloadrtems-bc85fd5a6df8753543ba55c98a588e255471752b.tar.bz2
Reworked score/cpu/i960 so it can be safely compiled multilib. All
routines and structures that require CPU model specific information are now in libcpu. This required significant rework of the score/cpu header files and the creation of multiple header files and subdirectories in libcpu/i960.
Diffstat (limited to 'c/src/lib/libcpu/i960/shared/soft_reset_asm.S')
-rw-r--r--c/src/lib/libcpu/i960/shared/soft_reset_asm.S37
1 files changed, 37 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/i960/shared/soft_reset_asm.S b/c/src/lib/libcpu/i960/shared/soft_reset_asm.S
new file mode 100644
index 0000000000..c178aa74bd
--- /dev/null
+++ b/c/src/lib/libcpu/i960/shared/soft_reset_asm.S
@@ -0,0 +1,37 @@
+/*
+ * void __i960_soft_reset_asm
+ *
+ * Flush the register cache and save the important (fp, pfp, sp) registers,
+ * which are clobbered by the reinit operation. (Not documented, but it
+ * happens).
+ *
+ * This may not be used any longer but it is not being purged completely
+ * in the move to multilib things.
+ *
+ * $Id$
+ */
+
+ .data
+ .align 4
+_soft_reset_reg_save:
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+
+ .globl __i960_soft_reset_asm
+__i960_soft_reset_asm:
+ flushreg # flush register cache mov fp, r4
+ mov pfp, r5
+ mov sp, r6
+ stt r4, _soft_reset_reg_save # save fp, pfp, sp
+ lda __i960_reset_done, r4
+ ldconst 0x300, r5
+ sysctl r5, r4, g0 # reinit: clobbers almost all registers
+__i960_reset_done:
+ ldt _soft_reset_reg_save, r4 # restore fp, pfp, sp
+ mov r4, fp
+ mov r5, pfp
+ mov r6, sp
+ ret
+