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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2010-04-15 14:09:57 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2010-04-15 14:09:57 +0000 |
| commit | 9e95e540b901aac63436f87513151e5ba3ea2eab (patch) | |
| tree | b53c484faeaf8422dffba13b109e33b0bd2657b4 /c/src/lib/libcpu/i386/cpuModel.S | |
| parent | i586-pc-freebsd8.0-gcc.spec (diff) | |
| download | rtems-9e95e540b901aac63436f87513151e5ba3ea2eab.tar.bz2 | |
2010-04-15 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpuModel.S, cpuModel.h, displayCpu.c: Update to include more reserved
bits and pick out a bit more information.
Diffstat (limited to 'c/src/lib/libcpu/i386/cpuModel.S')
| -rw-r--r-- | c/src/lib/libcpu/i386/cpuModel.S | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/i386/cpuModel.S b/c/src/lib/libcpu/i386/cpuModel.S index 263f824004..8245fd86a2 100644 --- a/c/src/lib/libcpu/i386/cpuModel.S +++ b/c/src/lib/libcpu/i386/cpuModel.S @@ -87,6 +87,16 @@ isnew: popfl incl SYM(have_cpuid) /* we have CPUID instruction */ + /* + * Addressable Processor Ids + * + * CPUID.(EAX=4, ECX=0):EAX[31:26] + 1 = Y) + */ + movl $4, eax + movl $0, ecx + cpuid + movl eax,SYM(x86_capability_cores) + /* use it to get : * processor type, * processor model, @@ -95,6 +105,7 @@ isnew: */ movl $1, eax cpuid + movl ebx,SYM(x86_capability_ebx) /* store ebx feature info */ movl ecx,SYM(x86_capability_x) /* store ecx feature flags */ movb al, cl /* save reg for future use */ @@ -235,7 +246,9 @@ BEGIN_DATA PUBLIC(x86_model) PUBLIC(x86_mask) PUBLIC(x86_capability) + PUBLIC(x86_capability_ebx) PUBLIC(x86_capability_x) + PUBLIC(x86_capability_cores) PUBLIC(x86_vendor_id) PUBLIC(hard_math) @@ -249,8 +262,12 @@ SYM(x86_mask): .byte 0 SYM(x86_capability): .long 0 +SYM(x86_capability_ebx): + .long 0 SYM(x86_capability_x): .long 0 +SYM(x86_capability_cores): + .long 0 SYM(x86_vendor_id): .zero 13 SYM(hard_math): |