diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2008-08-15 20:18:41 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2008-08-15 20:18:41 +0000 |
commit | 30abd24b7e7bc1f66b22527792931cf4468b06b8 (patch) | |
tree | fba359b7e4b04fdd1f008f54fcca7b69d810bab6 /c/src/lib/libcpu/bfin/include/mmuRegs.h | |
parent | 2008-08-15 Joel Sherrill <joel.sherrill@OARcorp.com> (diff) | |
download | rtems-30abd24b7e7bc1f66b22527792931cf4468b06b8.tar.bz2 |
2008-08-15 Allan Hessenflow <allanh@kallisti.com>
* ChangeLog, Makefile.am, README, configure.ac, preinstall.am,
cache/cache.c, cache/cache_.h, clock/clock.c, clock/rtc.c,
clock/tod.h, include/bf533.h, include/bf537.h, include/cecRegs.h,
include/coreTimerRegs.h, include/dmaRegs.h, include/ebiuRegs.h,
include/ethernetRegs.h, include/gpioRegs.h, include/memoryRegs.h,
include/mmuRegs.h, include/ppiRegs.h, include/rtcRegs.h,
include/sicRegs.h, include/spiRegs.h, include/sportRegs.h,
include/timerRegs.h, include/twiRegs.h, include/uartRegs.h,
include/wdogRegs.h, interrupt/interrupt.c, interrupt/interrupt.h,
mmu/mmu.c, mmu/mmu.h, network/ethernet.c, network/ethernet.h,
serial/spi.c, serial/spi.h, serial/sport.c, serial/sport.h,
serial/twi.c, serial/twi.h, serial/uart.c, serial/uart.h,
timer/timer.c: New files.
Diffstat (limited to 'c/src/lib/libcpu/bfin/include/mmuRegs.h')
-rw-r--r-- | c/src/lib/libcpu/bfin/include/mmuRegs.h | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/bfin/include/mmuRegs.h b/c/src/lib/libcpu/bfin/include/mmuRegs.h new file mode 100644 index 0000000000..bee11ce0e9 --- /dev/null +++ b/c/src/lib/libcpu/bfin/include/mmuRegs.h @@ -0,0 +1,57 @@ +/* Blackfin MMU Registers + * + * Copyright (c) 2008 Kallisti Labs, Los Gatos, CA, USA + * written by Allan Hessenflow <allanh@kallisti.com> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + * + * $Id$ + */ + +#ifndef _mmuRegs_h_ +#define _mmuRegs_h_ + +/* register addresses */ +#define DCPLB_ADDR0 0xffe00100 +#define DCPLB_DATA0 0xffe00200 +#define DCPLB_COUNT 16 +#define DCPLB_ADDR_PITCH 4 +#define DCPLB_DATA_PITCH 4 +#define ICPLB_ADDR0 0xffe01100 +#define ICPLB_DATA0 0xffe01200 +#define ICPLB_COUNT 16 +#define ICPLB_ADDR_PITCH 4 +#define ICPLB_DATA_PITCH 4 + + +/* register fields */ +#define DCPLB_DATA_PAGE_SIZE_MASK 0x00030000 +#define DCPLB_DATA_PAGE_SIZE_1KB 0x00000000 +#define DCPLB_DATA_PAGE_SIZE_4KB 0x00010000 +#define DCPLB_DATA_PAGE_SIZE_1MB 0x00020000 +#define DCPLB_DATA_PAGE_SIZE_4MB 0x00030000 +#define DCPLB_DATA_CPLB_L1_AOW 0x00008000 +#define DCPLB_DATA_CPLB_WT 0x00004000 +#define DCPLB_DATA_CPLB_L1_CHBL 0x00001000 +#define DCPLB_DATA_CPLB_DIRTY 0x00000080 +#define DCPLB_DATA_CPLB_SUPV_WR 0x00000010 +#define DCPLB_DATA_CPLB_USER_WR 0x00000008 +#define DCPLB_DATA_CPLB_USER_RD 0x00000004 +#define DCPLB_DATA_CPLB_LOCK 0x00000002 +#define DCPLB_DATA_CPLB_VALID 0x00000001 + +#define ICPLB_DATA_PAGE_SIZE_MASK 0x00030000 +#define ICPLB_DATA_PAGE_SIZE_1KB 0x00000000 +#define ICPLB_DATA_PAGE_SIZE_4KB 0x00010000 +#define ICPLB_DATA_PAGE_SIZE_1MB 0x00020000 +#define ICPLB_DATA_PAGE_SIZE_4MB 0x00030000 +#define ICPLB_DATA_CPLB_L1_CHBL 0x00001000 +#define ICPLB_DATA_CPLB_LRUPRIO 0x00000100 +#define ICPLB_DATA_CPLB_USER_RD 0x00000004 +#define ICPLB_DATA_CPLB_CPLB_LOCK 0x00000002 +#define ICPLB_DATA_CPLB_CPLB_VALID 0x00000001 + +#endif /* _mmuRegs_h_ */ + |