diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2007-11-06 22:54:21 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2007-11-06 22:54:21 +0000 |
commit | 5a364be362fc7151fa2a6fab0163eb98b12cd74d (patch) | |
tree | 81688c9fc121980660e3bc9f1e6c74a1e80f780d /c/src/lib/libcpu/arm | |
parent | 2007-11-06 Joel Sherrill <joel.sherrill@OARcorp.com> (diff) | |
download | rtems-5a364be362fc7151fa2a6fab0163eb98b12cd74d.tar.bz2 |
2007-11-03 Ray Xu <rayx.cn@gmail.com>
*lpc22xx/irq/bsp_irq_asm.S: Add veneer for ARM<->Thumb
lpc22xx/irq/bsp_irq_init.c: add VIC address init
Diffstat (limited to 'c/src/lib/libcpu/arm')
-rw-r--r-- | c/src/lib/libcpu/arm/ChangeLog | 4 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_asm.S | 35 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_init.c | 6 |
3 files changed, 32 insertions, 13 deletions
diff --git a/c/src/lib/libcpu/arm/ChangeLog b/c/src/lib/libcpu/arm/ChangeLog index 72a4aca200..79aa69ec8e 100644 --- a/c/src/lib/libcpu/arm/ChangeLog +++ b/c/src/lib/libcpu/arm/ChangeLog @@ -1,3 +1,7 @@ +2007-11-03 Ray Xu <rayx.cn@gmail.com> + *lpc22xx/irq/bsp_irq_asm.S: Add veneer for ARM<->Thumb + lpc22xx/irq/bsp_irq_init.c: add VIC address init + 2007-10-05 Ray Xu <xr@trasin.net> * lpc22xx/clock/clockdrv.c, lpc22xx/irq/irq.c, lpc22xx/irq/irq.h: Now diff --git a/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_asm.S b/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_asm.S index 43d32a6b0a..e99a346007 100644 --- a/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_asm.S +++ b/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_asm.S @@ -17,9 +17,13 @@ * BSP specific interrupt handler for INT or FIQ. In here * you do determine which interrupt happened and call its * handler. + * Called from ISR_Handler, It is better to write in C function */ .globl ExecuteITHandler ExecuteITHandler : +#ifdef __thumb__ + .code 16 +#endif /* * Look at interrupt status register to determine source. @@ -28,19 +32,30 @@ ExecuteITHandler : */ ldr r0, =0xFFFFF030 /* Read the vector number */ - ldr r1, [r0] - - /* find the ISR's address based on the vector VICVectAddr0 */ - /*ldr r0, =0xFFFFF100*/ - /*ldr r0, [r0, r1, LSL #2]*/ /* Read the address */ - - + ldr r0, [r0] +#ifdef __thumb__ + push {lr} + ldr r2, =IRQ_return /* prepare the return from handler */ + mov lr, r2 +#else stmdb sp!,{lr} ldr lr, =IRQ_return /* prepare the return from handler */ +#endif + - mov pc, r1 /* EXECUTE INT HANDLER */ + /*C code will be called*/ + mov pc, r0 /* EXECUTE INT HANDLER */ + /* + * C code may come back from Thumb if --thumb-interwork flag is False + * Add some veneer to make sure that code back to ARM + */ IRQ_return: - ldmia sp!,{lr} +#ifdef __thumb__ + pop {r1} + bx r1 +#else + ldmia sp!,{r1} + mov pc, r1 +#endif - mov pc, lr diff --git a/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_init.c b/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_init.c index 08a747168e..4c311ab8d4 100644 --- a/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_init.c +++ b/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_init.c @@ -1,6 +1,6 @@ /* - * Motorola LPC22XX/LPC21xx Interrupt handler - * Modified by Ray 2006 <rayx.cn@gmail.com> to support LPC ARM + * NXP/Philips LPC22XX/LPC21xx Interrupt handler + * Ray 2007 <rayx.cn@gmail.com> to support LPC ARM * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -66,6 +66,6 @@ void BSP_rtems_irq_mngt_init() */ VICProtection = 0; VICIntSelect = 0; - + VICVectAddr = 0; } |