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authorJoel Sherrill <joel.sherrill@OARcorp.com>2009-06-04 16:33:31 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2009-06-04 16:33:31 +0000
commitd7a915dadec627b1906fcc22f45f573cd73914a3 (patch)
tree44f7096debd2aeb14a339c1c6aad4f562303b4a5 /c/src/lib/libcpu/arm/pxa255/clock/clock.c
parent2009-06-04 Xi Yang <hiyangxi@gmail.com> (diff)
downloadrtems-d7a915dadec627b1906fcc22f45f573cd73914a3.tar.bz2
2009-06-04 Xi Yang <hiyangxi@gmail.com>
* Makefile.am, configure.ac, preinstall.am: New Gumstix BSP and PXA255 support. * pxa255/clock/clock.c, pxa255/ffuart/ffuart.c, pxa255/include/bits.h, pxa255/include/ffuart.h, pxa255/include/pxa255.h, pxa255/irq/bsp_irq_asm.S, pxa255/irq/bsp_irq_init.c, pxa255/irq/irq.c, pxa255/irq/irq.h, pxa255/pmc/pmc.c, pxa255/timer/timer.c: New files.
Diffstat (limited to 'c/src/lib/libcpu/arm/pxa255/clock/clock.c')
-rwxr-xr-xc/src/lib/libcpu/arm/pxa255/clock/clock.c117
1 files changed, 117 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/arm/pxa255/clock/clock.c b/c/src/lib/libcpu/arm/pxa255/clock/clock.c
new file mode 100755
index 0000000000..e4f6fc9cdf
--- /dev/null
+++ b/c/src/lib/libcpu/arm/pxa255/clock/clock.c
@@ -0,0 +1,117 @@
+/*
+ * By Yang Xi <hiyangxi@gmail.com>
+ * PXA255 clock specific using the System Timer
+ *
+ * RTEMS uses IRQ 26 as Clock Source
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ *
+ * $Id$
+ */
+#include <rtems.h>
+#include <rtems/clockdrv.h>
+#include <rtems/libio.h>
+
+#include <stdlib.h>
+#include <bsp.h>
+#include <irq.h>
+#include <pxa255.h>
+
+
+
+static unsigned long period_num;
+
+
+
+
+
+/**
+ * Enables clock interrupt.
+ *
+ * If the interrupt is always on, this can be a NOP.
+ */
+static void clock_isr_on(const rtems_irq_connect_data *unused)
+{
+
+ /*Clear the interrupt bit */
+ XSCALE_OS_TIMER_TSR = 0x1;
+
+
+ /* enable timer interrupt */
+ XSCALE_OS_TIMER_IER |= 0x1;
+
+ period_num = TIMER_RATE*(Configuration.microseconds_per_tick/10000);
+
+ XSCALE_OS_TIMER_MR0 = XSCALE_OS_TIMER_TCR + period_num;
+
+}
+
+/**
+ * Disables clock interrupts
+ *
+ * If the interrupt is always on, this can be a NOP.
+ */
+static void clock_isr_off(const rtems_irq_connect_data *unused)
+{
+ /*Clear the interrupt bit */
+ XSCALE_OS_TIMER_TSR = 0x1;
+ /* disable timer interrupt*/
+ XSCALE_OS_TIMER_IER &= ~0x1;
+ return;
+}
+
+/**
+ * Tests to see if clock interrupt is enabled, and returns 1 if so.
+ * If interrupt is not enabled, returns 0.
+ *
+ * If the interrupt is always on, this always returns 1.
+ */
+static int clock_isr_is_on(const rtems_irq_connect_data *irq)
+{
+ /* check timer interrupt */
+ return XSCALE_OS_TIMER_IER & 0x1;
+}
+
+rtems_isr Clock_isr(rtems_vector_number vector);
+
+/* Replace the first value with the clock's interrupt name. */
+rtems_irq_connect_data clock_isr_data = {XSCALE_IRQ_OS_TIMER,
+ (rtems_irq_hdl)Clock_isr,
+ clock_isr_on,
+ clock_isr_off,
+ clock_isr_is_on,
+ 3, /* unused for ARM cpus */
+ 0 }; /* unused for ARM cpus */
+
+
+#define Clock_driver_support_install_isr( _new, _old ) \
+ BSP_install_rtems_irq_handler(&clock_isr_data)
+
+void Clock_driver_support_initialize_hardware(void)
+{
+
+
+ period_num = TIMER_RATE*(Configuration.microseconds_per_tick/10000);
+
+}
+
+
+#define CLOCK_VECTOR 0
+
+#define Clock_driver_support_at_tick() \
+ do { \
+ ;\
+ XSCALE_OS_TIMER_TSR = 0x1;/* read the status to clear the int */ \
+ XSCALE_OS_TIMER_MR0 = XSCALE_OS_TIMER_TCR + period_num;/*Add the match register*/ \
+ ;\
+ } while (0)
+
+void Clock_driver_support_shutdown_hardware( void )
+{
+ BSP_remove_rtems_irq_handler(&clock_isr_data);
+}
+
+#include "../../../../libbsp/shared/clockdrv_shell.h"