Patch from "John M. Mills" <jmills@tga.com> with subsequent cleanup from

Ralf Corsepius <corsepiu@faw.uni-ulm.de> that adds initial Hitachi SH-2
support to RTEMS.  Ralf's comments are:

    Changes:
    ------
    1. SH-Port:
    * Many files renamed.
    * CONSOLE_DEVNAME  and MHZ defines removed from libcpu.
    * console.c moved to libbsp/sh/shared, build in libbsp/sh/<BSP>/console
      applying VPATH.
    * CONSOLE_DEVNAME made BSP-specific, replacement is defined in bsp.h
    * MHZ define replaced with HZ (extendent resolution) in custom/*.cfg
    * -DHZ=HZ  used in bspstart.c, only
    * Makefile variable HZ used in bsp-dependent directories only.

    2. SH1-Port
    * clock-driver rewritten to provide better resolution for odd CPU
      frequencies. This driver is only partially tested on hardware, ie.
      sightly experimental, but I don't expect severe problems with it.
    * Polling SCI-driver added. This driver is experimental and completly
      untested yet. Therefore it is not yet used for the console (/dev/console
      is still pointing to /dev/null, cf. gensh1/bsp.h).
    * minor changes to the timer driver
    * SH1 specific delay()/CPU_delay() now is implemented as a function

    3. SH2-Port
    * Merged
    * IMO, the code is still in its infancy. Therefore I have interspersed
      comments (FIXME) it for items which I think John should look after.
    * sci and console drivers partially rewritten and extended (John, I hope
      you don't mind).
    * Copyright notices are not yet adapted

26 files changed, 2265 insertions, 58 deletions

diff --git a/c/src/lib/libbsp/sh/gensh1/Makefile.in b/c/src/lib/libbsp/sh/gensh1/Makefile.in
index 69aaa0d548..c495ae5306 100644
--- a/c/src/lib/libbsp/sh/gensh1/Makefile.in
+++ b/c/src/lib/libbsp/sh/gensh1/Makefile.in
@@ -20,7 +20,7 @@ INSTALL_CHANGE = @INSTALL_CHANGE@
 
 # wrapup is the one that actually builds and installs the library
 #  from the individual .rel files built in other directories
-SUB_DIRS = include start startup scitab wrapup
+SUB_DIRS = include start startup scitab console wrapup
 
 Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
 	cd $(top_builddir) \
diff --git a/c/src/lib/libbsp/sh/gensh1/README b/c/src/lib/libbsp/sh/gensh1/README
index c75ad9927e..ce465b16a2 100644
--- a/c/src/lib/libbsp/sh/gensh1/README
+++ b/c/src/lib/libbsp/sh/gensh1/README
@@ -45,6 +45,10 @@ STOP BITS:          n/a
 NOTES
 =====
 
-(1) Only stub console driver available at the moment.
-    Driver for the on-chip serial devices (sci) will be available soon.
+(1) The stub console driver (null) is enabled by default.
 
+(2) The driver for the on-chip serial devices (sci) is still in its infancy
+    and not fully tested. It may even be non-functional and therefore is
+    disabled by default. Please let us know any problems you encounter with
+    it.
+    To activate it edit libbsp/sh/gensh1/include/bsp.h
diff --git a/c/src/lib/libbsp/sh/gensh1/include/bsp.h b/c/src/lib/libbsp/sh/gensh1/include/bsp.h
index 8ac21df14e..f02abe156d 100644
--- a/c/src/lib/libbsp/sh/gensh1/include/bsp.h
+++ b/c/src/lib/libbsp/sh/gensh1/include/bsp.h
@@ -30,14 +30,22 @@
 extern "C" {
 #endif
 
-#define CPU_CONSOLE_DEVNAME "/dev/null"
-
-
 #include <rtems.h>
 #include <clockdrv.h>
-#include <sh/null.h>
 #include <console.h>
 
+/* EDIT: To activate the sci driver, change the define below */
+#if 1
+#include <sh/null.h>
+#define BSP_CONSOLE_DEVNAME "/dev/null"
+#define BSP_CONSOLE_DRIVER_TABLE_ENTRY DEVNULL_DRIVER_TABLE_ENTRY
+#else
+#include <sh/sci.h>
+#define BSP_CONSOLE_DEVNAME "/dev/sci0"
+#define BSP_CONSOLE_DRIVER_TABLE_ENTRY DEVSCI_DRIVER_TABLE_ENTRY
+#endif
+
+
 /*
  *  Define the time limits for RTEMS Test Suite test durations.
  *  Long test and short test duration limits are provided.  These
@@ -68,39 +76,14 @@ extern "C" {
 #define Lower_tm27_intr()
 
 /* Constants */
-#ifndef MHZ
-#error Missing MHZ
-#endif
 
 /*
  *  Simple spin delay in microsecond units for device drivers.
  *  This is very dependent on the clock speed of the target.
- *
- *  Since we don't have a real time clock, this is a very rough
- *  approximation, assuming that each cycle of the delay loop takes
- *  approx. 4 machine cycles.
- *
- *  e.g.: MHZ = 20 =>     5e-8 secs per instruction
- *                 => 4 * 5e-8 secs per delay loop
  */
 
-#define delay( microseconds ) \
-{ register unsigned int _delay = (microseconds) * (MHZ / 4 ); \
-  asm volatile ( \
-"0:	add  #-1,%0\n \
-	nop\n \
-	cmp/pl %0\n \
-	bt 0b\
-	nop" \
-    :: "r" (_delay) );  \
-}
-
-/*
- * For backward compatibility only.
- * Do not rely on them being present in future
- */
-#define CPU_delay( microseconds ) delay( microseconds )
-#define sh_delay( microseconds ) delay( microseconds )
+#define delay( microseconds ) CPU_delay(microseconds)
+#define sh_delay( microseconds ) CPU_delay(microseconds)
 
 /*
  * Defined in the linker script 'linkcmds'
@@ -128,13 +111,9 @@ extern void bsp_cleanup( void );
 /*
  * We redefine CONSOLE_DRIVER_TABLE_ENTRY to redirect /dev/console
  */
-#if defined(CONSOLE_DRIVER_TABLE_ENTRY)
-#warning Overwriting CONSOLE_DRIVER_TABLE_ENTRY
 #undef CONSOLE_DRIVER_TABLE_ENTRY
-#endif
-
 #define CONSOLE_DRIVER_TABLE_ENTRY \
-  DEVNULL_DRIVER_TABLE_ENTRY, \
+  BSP_CONSOLE_DRIVER_TABLE_ENTRY, \
   { console_initialize, console_open, console_close, \
       console_read, console_write, console_control }
  
@@ -142,18 +121,6 @@ extern void bsp_cleanup( void );
  * NOTE: Use the standard Clock driver entry
  */
 
-/*
- * FIXME: Should this go to libcpu/sh/sh7032 ?
- */
-#if 0
-/* functions */
-sh_isr_entry set_vector(                    /* returns old vector */
-  rtems_isr_entry     handler,                  /* isr routine        */
-  rtems_vector_number vector,                   /* vector number      */
-  int                 type                      /* RTEMS or RAW intr  */
-);
-#endif
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/c/src/lib/libbsp/sh/gensh1/scitab/Makefile.in b/c/src/lib/libbsp/sh/gensh1/scitab/Makefile.in
index 1593251658..9919c0ec7e 100644
--- a/c/src/lib/libbsp/sh/gensh1/scitab/Makefile.in
+++ b/c/src/lib/libbsp/sh/gensh1/scitab/Makefile.in
@@ -64,7 +64,7 @@ $(PGM): $(SRCS) ${OBJS}
 all: ${ARCH} $(SRCS) $(PGM)
 
 scitab.c: $(SHGEN)
-	$(SHGEN) -M $(MHZ) sci > $@
+	$(SHGEN) -H $(HZ) sci > $@
 
 # the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
 install: all
diff --git a/c/src/lib/libbsp/sh/gensh1/startup/bspstart.c b/c/src/lib/libbsp/sh/gensh1/startup/bspstart.c
index 08aaf8d905..7f0d7f8436 100644
--- a/c/src/lib/libbsp/sh/gensh1/startup/bspstart.c
+++ b/c/src/lib/libbsp/sh/gensh1/startup/bspstart.c
@@ -126,9 +126,9 @@ void bsp_start(void)
 
   Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
   Cpu_table.postdriver_hook = bsp_postdriver_hook;
-
+  
 #if ( CPU_ALLOCATE_INTERRUPT_STACK == TRUE )
   Cpu_table.interrupt_stack_size = 4096;
 #endif
-
+  Cpu_table.clicks_per_second = HZ ;
 }
diff --git a/c/src/lib/libbsp/sh/gensh1/wrapup/Makefile.in b/c/src/lib/libbsp/sh/gensh1/wrapup/Makefile.in
index c879e6a870..231bef4fa5 100644
--- a/c/src/lib/libbsp/sh/gensh1/wrapup/Makefile.in
+++ b/c/src/lib/libbsp/sh/gensh1/wrapup/Makefile.in
@@ -15,11 +15,11 @@ PROJECT_ROOT = @PROJECT_ROOT@
 
 VPATH = @srcdir@
 
-BSP_PIECES = startup scitab
+BSP_PIECES = startup scitab console
 GENERIC_PIECES =
 
 # pieces to pick up out of libcpu/sh
-CPU_PIECES = sh7032/null sh7032/clock sh7032/console sh7032/timer
+CPU_PIECES = sh7032/null sh7032/clock sh7032/timer sh7032/sci sh7032/delay
 
 # bummer; have to use $foreach since % pattern subst rules only replace 1x
 OBJS = $(foreach piece, $(BSP_PIECES), $(wildcard ../$(piece)/$(ARCH)/*.o)) \
@@ -61,8 +61,10 @@ CLOBBER_ADDITIONS +=
 $(LIB): ${OBJS}
 	$(make-library)
 
-all: ${ARCH} $(SRCS) $(LIB)
-	$(INSTALL_VARIANT) -m 644 $(LIB) $(PROJECT_RELEASE)/lib
+$(PROJECT_RELEASE)/lib/libbsp$(LIBSUFFIX_VA): $(LIB)
+	$(INSTALL_DATA) $^ $@
+
+all: ${ARCH} $(SRCS) $(PROJECT_RELEASE)/lib/libbsp$(LIBSUFFIX_VA)
 
 install: all
 
diff --git a/c/src/lib/libbsp/sh/gensh2/Makefile.in b/c/src/lib/libbsp/sh/gensh2/Makefile.in
new file mode 100644
index 0000000000..6162ab1d6b
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/Makefile.in
@@ -0,0 +1,27 @@
+##
+## $Id$
+##
+
+@SET_MAKE@
+srcdir = @srcdir@
+top_srcdir = @top_srcdir@
+top_builddir = ../..
+subdir = sh/gensh2
+
+RTEMS_ROOT = @RTEMS_ROOT@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+VPATH = @srcdir@
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(RTEMS_ROOT)/make/directory.cfg
+
+INSTALL_CHANGE = @INSTALL_CHANGE@
+
+## wrapup is the one that actually builds and installs the library
+##  from the individual .rel files built in other directories
+SUB_DIRS = include start startup scitab console wrapup
+
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+	cd $(top_builddir) \
+	 && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status
diff --git a/c/src/lib/libbsp/sh/gensh2/README b/c/src/lib/libbsp/sh/gensh2/README
new file mode 100644
index 0000000000..e5a578fa7c
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/README
@@ -0,0 +1,51 @@
+#
+#  $Id$
+#
+#  Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de)
+#  Adapted by: John Mills (jmills@tga.com)
+#
+
+BSP NAME:           generic SH2 (gensh2)
+BOARD:              n/a
+BUS:                n/a
+CPU FAMILY:         Hitachi SH
+CPU:                SH 7045F
+COPROCESSORS:	    none
+MODE:               n/a
+
+DEBUG MONITOR:      gdb
+
+PERIPHERALS
+===========
+TIMERS:             on-chip
+  RESOLUTION:         cf. Hitachi SH 704X Hardware Manual (Phi/4)
+SERIAL PORTS:       on-chip (with 2 ports)
+REAL-TIME CLOCK:    none
+DMA:                not used
+VIDEO:              none
+SCSI:               none
+NETWORKING:         none
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       on-chip timer
+IOSUPP DRIVER:      default
+SHMSUPP:            default
+TIMER DRIVER:       on-chip timer
+TTY DRIVER:         /dev/null (stub)
+
+STDIO
+=====
+PORT:               /dev/null (stub)
+ELECTRICAL:         n/a
+BAUD:               n/a
+BITS PER CHARACTER: n/a
+PARITY:             n/a
+STOP BITS:          n/a
+
+NOTES
+=====
+
+(1) Only stub console driver available at the moment.
+    Driver for the on-chip serial devices (sci) will be available soon.
+
diff --git a/c/src/lib/libbsp/sh/gensh2/bsp_specs b/c/src/lib/libbsp/sh/gensh2/bsp_specs
new file mode 100644
index 0000000000..9436cdcd72
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/bsp_specs
@@ -0,0 +1,22 @@
+%rename cpp old_cpp
+%rename lib old_lib
+%rename endfile old_endfile
+%rename startfile old_startfile
+%rename link old_link
+
+*cpp:
+%(old_cpp) %{qrtems: -D__embedded__} -Asystem(embedded)
+
+*lib:
+%{!qrtems: %(old_lib)} \
+%{qrtems: --start-group %{!qrtems_debug: -lrtemsall } %{qrtems_debug: -lrtemsall_g} \
+ -lc -lgcc --end-group \
+ %{!qnolinkcmds: -T linkcmds%s}}
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{qrtems: %{qrtems_debug: start_g.o%s} %{!qrtems_debug: start.o%s}}
+
+*link:
+%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N -e _start}
+
diff --git a/c/src/lib/libbsp/sh/gensh2/console/Makefile.in b/c/src/lib/libbsp/sh/gensh2/console/Makefile.in
new file mode 100644
index 0000000000..0da719d5b9
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/console/Makefile.in
@@ -0,0 +1,71 @@
+##
+##  $Id$
+##
+
+@SET_MAKE@
+srcdir = @srcdir@
+top_srcdir = @top_srcdir@
+top_builddir = ../../..
+subdir = sh/gensh2/console
+
+RTEMS_ROOT = @RTEMS_ROOT@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+VPATH = @srcdir@:@top_srcdir@/sh/shared
+
+PGM = ${ARCH}/console.rel
+
+# C source names, if any, go here -- minus the .c
+C_PIECES = console
+C_FILES = $(C_PIECES:%=%.c)
+C_O_FILES = $(C_PIECES:%=${ARCH}/%.o)
+
+H_FILES =
+
+# Assembly source names, if any, go here -- minus the .S
+S_PIECES =
+S_FILES = $(S_PIECES:%=%.S)
+S_O_FILES = $(S_FILES:%.S=${ARCH}/%.o)
+
+SRCS = $(C_FILES) $(H_FILES) $(S_FILES)
+OBJS = $(C_O_FILES) $(S_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+INSTALL_CHANGE = @INSTALL_CHANGE@
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES +=
+CPPFLAGS +=
+CFLAGS +=
+
+LD_PATHS +=
+LD_LIBS +=
+LDFLAGS +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+${PGM}: ${SRCS} ${OBJS}
+	$(make-rel)
+
+all: ${ARCH} $(SRCS) $(PGM)
+
+# the .rel file built here will be put into libbsp.a by 
+# 	../wrapup/Makefile
+install: all
+
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+	cd $(top_builddir) \
+	 && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status
diff --git a/c/src/lib/libbsp/sh/gensh2/include/Makefile.in b/c/src/lib/libbsp/sh/gensh2/include/Makefile.in
new file mode 100644
index 0000000000..abbcd26b6e
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/include/Makefile.in
@@ -0,0 +1,43 @@
+##
+## $Id$
+##
+
+@SET_MAKE@
+srcdir = @srcdir@
+top_srcdir = @top_srcdir@
+top_builddir = ../../..
+subdir = sh/gensh2/include
+
+RTEMS_ROOT = @RTEMS_ROOT@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+VPATH = @srcdir@
+
+H_FILES = $(srcdir)/bsp.h $(srcdir)/coverhd.h
+
+#
+#  Equate files are for including from assembly preprocessed by
+#  gm4 or gasp.  No examples are provided except for those for
+#  other CPUs.  The best way to generate them would be to
+#  provide a program which generates the constants used based
+#  on the C equivalents.
+#
+
+EQ_FILES =
+
+SRCS = $(H_FILES) $(EQ_FILES)
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+INSTALL_CHANGE = @INSTALL_CHANGE@
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+all: $(SRCS)
+	@INSTALL@ -m 644 $(H_FILES) $(PROJECT_INCLUDE)
+
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+	cd $(top_builddir) \
+	 && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status
diff --git a/c/src/lib/libbsp/sh/gensh2/include/bsp.h b/c/src/lib/libbsp/sh/gensh2/include/bsp.h
new file mode 100644
index 0000000000..a403a44ecb
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/include/bsp.h
@@ -0,0 +1,139 @@
+/*
+ *  This include file contains all board IO definitions.
+ *
+ *  generic sh2
+ *
+ *  Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de)
+ *
+ *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * 
+ *
+ *  COPYRIGHT (c) 1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  Minor adaptations for sh2 by:
+ *  John M. Mills (jmills@tga.com)
+ *  TGA Technologies, Inc.
+ *  100 Pinnacle Way, Suite 140
+ *  Norcross, GA 30071 U.S.A.
+ *
+ *  This modified file may be copied and distributed in accordance
+ *  the above-referenced license. It is provided for critique and
+ *  developmental purposes without any warranty nor representation
+ *  by the authors or by TGA Technologies.
+ *
+ *  $Id$
+ */
+
+#ifndef __gensh2_h
+#define __gensh2_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtems.h>
+#include <clockdrv.h>
+#include <console.h>
+
+#if 0
+#include <sh/null.h>
+#define BSP_CONSOLE_DEVNAME "/dev/null"
+#define BSP_CONSOLE_DRIVER_TABLE_ENTRY DEVNULL_DRIVER_TABLE_ENTRY
+#else
+#include <sh/sci.h>
+#define BSP_CONSOLE_DEVNAME "/dev/sci1"
+#define BSP_CONSOLE_DRIVER_TABLE_ENTRY DEVSCI_DRIVER_TABLE_ENTRY
+#endif
+
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+/*
+ *  Stuff for Time Test 27
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector( handler ) \
+{ \
+  rtems_isr_entry ignored ; \
+  rtems_interrupt_catch( (handler), 0, &ignored ) ; \
+}
+
+#define Cause_tm27_intr()
+
+#define Clear_tm27_intr()
+
+#define Lower_tm27_intr()
+
+/* Constants */
+
+/*
+ *  Simple spin delay in microsecond units for device drivers.
+ *  This is very dependent on the clock speed of the target.
+ */
+
+#define delay( microseconds ) CPU_delay(microseconds)
+#define sh_delay( microseconds ) CPU_delay( microseconds )
+
+
+/*
+ * Defined in the linker script 'linkcmds'
+ */
+
+extern unsigned32       HeapStart ;
+extern unsigned32       HeapEnd ;
+extern unsigned32       WorkSpaceStart ;
+extern unsigned32       WorkSpaceEnd ;
+
+extern void *CPU_Interrupt_stack_low ;
+extern void *CPU_Interrupt_stack_high ;
+
+  
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+
+extern void bsp_cleanup( void );
+
+/*
+ *  Device Driver Table Entries
+ */
+
+/*
+ * We redefine CONSOLE_DRIVER_TABLE_ENTRY to redirect /dev/console
+ */
+#undef CONSOLE_DRIVER_TABLE_ENTRY
+#define CONSOLE_DRIVER_TABLE_ENTRY \
+  BSP_CONSOLE_DRIVER_TABLE_ENTRY, \
+  { console_initialize, console_open, console_close, \
+      console_read, console_write, console_control }
+ 
+/*
+ * NOTE: Use the standard Clock driver entry
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
diff --git a/c/src/lib/libbsp/sh/gensh2/include/coverhd.h b/c/src/lib/libbsp/sh/gensh2/include/coverhd.h
new file mode 100644
index 0000000000..005e19455a
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/include/coverhd.h
@@ -0,0 +1,130 @@
+/*  coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C.  These are used in the
+ *  Timing Test Suite to ignore the overhead required to pass arguments
+ *  to directives.  On some CPUs and/or target boards, this overhead
+ *  is significant and makes it difficult to distinguish internal
+ *  RTEMS execution time from that used to call the directive.
+ *  This file should be updated after running the C overhead timing
+ *  test.  Once this update has been performed, the RTEMS Time Test
+ *  Suite should be rebuilt to account for these overhead times in the
+ *  timing results.
+ *
+ *  NOTE:  If these are all zero, then the times reported include all
+ *         all calling overhead including passing of arguments.
+ *
+ *
+ * These are the figures tmoverhd.exe reported with gcc-2.95.1 -O4 
+ * on a Hitachi SH7045F Evaluation Board with SH7045F at 29 MHz
+ *
+ * These results are assumed to be applicable to most SH7045/29MHz boards
+ *
+ *  Author: John M.Mills (jmills@tga.com)
+ *
+ *  COPYRIGHT (c) 1999. TGA Technologies, Inc., Norcross, GA, USA
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * 
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  This file may be copied and distributed in accordance
+ *  the above-referenced license. It is provided for critique and
+ *  developmental purposes without any warranty nor representation
+ *  by the authors or by TGA Technologies.
+ *
+ *  $Id$
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      1
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        1
+#define CALLING_OVERHEAD_TASK_CREATE               2
+#define CALLING_OVERHEAD_TASK_IDENT                1
+#define CALLING_OVERHEAD_TASK_START                1
+#define CALLING_OVERHEAD_TASK_RESTART              1
+#define CALLING_OVERHEAD_TASK_DELETE               1
+#define CALLING_OVERHEAD_TASK_SUSPEND              1
+#define CALLING_OVERHEAD_TASK_RESUME               1
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         1
+#define CALLING_OVERHEAD_TASK_MODE                 1
+#define CALLING_OVERHEAD_TASK_GET_NOTE             1
+#define CALLING_OVERHEAD_TASK_SET_NOTE             1
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            2
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           1
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           1
+#define CALLING_OVERHEAD_CLOCK_GET                 3
+#define CALLING_OVERHEAD_CLOCK_SET                 2
+#define CALLING_OVERHEAD_CLOCK_TICK                1
+
+#define CALLING_OVERHEAD_TIMER_CREATE              1
+#define CALLING_OVERHEAD_TIMER_IDENT               1
+#define CALLING_OVERHEAD_TIMER_DELETE              1
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          1
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           3
+#define CALLING_OVERHEAD_TIMER_RESET               1
+#define CALLING_OVERHEAD_TIMER_CANCEL              1
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          1
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           1
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          1
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          1
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       1
+
+#define CALLING_OVERHEAD_EVENT_SEND                1
+#define CALLING_OVERHEAD_EVENT_RECEIVE             1
+#define CALLING_OVERHEAD_SIGNAL_CATCH              1
+#define CALLING_OVERHEAD_SIGNAL_SEND               1
+#define CALLING_OVERHEAD_PARTITION_CREATE          2
+#define CALLING_OVERHEAD_PARTITION_IDENT           1
+#define CALLING_OVERHEAD_PARTITION_DELETE          1
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      1
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   1
+#define CALLING_OVERHEAD_REGION_CREATE             2
+#define CALLING_OVERHEAD_REGION_IDENT              1
+#define CALLING_OVERHEAD_REGION_DELETE             1
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        2
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     1
+#define CALLING_OVERHEAD_PORT_CREATE               2
+#define CALLING_OVERHEAD_PORT_IDENT                1
+#define CALLING_OVERHEAD_PORT_DELETE               1
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 1
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 1
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             1
+#define CALLING_OVERHEAD_IO_OPEN                   1
+#define CALLING_OVERHEAD_IO_CLOSE                  1
+#define CALLING_OVERHEAD_IO_READ                   1
+#define CALLING_OVERHEAD_IO_WRITE                  1
+#define CALLING_OVERHEAD_IO_CONTROL                1
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     1
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
diff --git a/c/src/lib/libbsp/sh/gensh2/scitab/Makefile.in b/c/src/lib/libbsp/sh/gensh2/scitab/Makefile.in
new file mode 100644
index 0000000000..023fbe4e39
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/scitab/Makefile.in
@@ -0,0 +1,74 @@
+##
+##  $Id$
+##
+
+@SET_MAKE@
+srcdir = @srcdir@
+top_srcdir = @top_srcdir@
+top_builddir = ../../..
+subdir = sh/gensh2/scitab
+
+RTEMS_ROOT = @RTEMS_ROOT@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+VPATH = @srcdir@
+
+PGM = $(ARCH)/scitab.rel
+
+# C source names, if any, go here -- minus the .c
+C_PIECES = scitab
+C_FILES = $(C_PIECES:%=%.c)
+C_O_FILES = $(C_PIECES:%=${ARCH}/%.o)
+
+H_FILES =
+# Assembly source names, if any, go here -- minus the .s
+S_PIECES =
+S_FILES = $(S_PIECES:%=%.s)
+S_O_FILES = $(S_FILES:%.s=${ARCH}/%.o)
+
+SRCS = $(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES)
+OBJS = $(C_O_FILES) $(CC_O_FILES) $(S_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+INSTALL_CHANGE = @INSTALL_CHANGE@
+
+SHGEN = $(PROJECT_ROOT)/tools/cpu/sh/shgen
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES +=
+CPPFLAGS +=
+CFLAGS +=
+
+LD_PATHS +=
+LD_LIBS +=
+LDFLAGS +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+$(PGM): $(SRCS) ${OBJS}
+	$(make-rel)
+
+all: ${ARCH} $(SRCS) $(PGM)
+
+scitab.c: $(SHGEN)
+	$(SHGEN) -H $(HZ) sci > $@
+
+# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
+install: all
+
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+	cd $(top_builddir) \
+	 && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status
diff --git a/c/src/lib/libbsp/sh/gensh2/start/Makefile.in b/c/src/lib/libbsp/sh/gensh2/start/Makefile.in
new file mode 100644
index 0000000000..6e7cdeba44
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/start/Makefile.in
@@ -0,0 +1,70 @@
+##
+## $Id$
+##
+
+@SET_MAKE@
+srcdir = @srcdir@
+top_srcdir = @top_srcdir@
+top_builddir = ../../..
+subdir = sh/gensh2/start
+
+RTEMS_ROOT = @RTEMS_ROOT@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+VPATH = @srcdir@
+
+PGMS = ${ARCH}/start.o
+
+# C source names, if any, go here -- minus the .c
+C_PIECES =
+C_FILES = $(C_PIECES:%=%.c)
+C_O_FILES = $(C_PIECES:%=${ARCH}/%.o)
+
+H_FILES =
+
+# Assembly source names, if any, go here -- minus the .S
+S_PIECES = start
+S_FILES = $(S_PIECES:%=%.S)
+S_O_FILES = $(S_FILES:%.S=${ARCH}/%.o)
+
+SRCS = $(C_FILES) $(H_FILES) $(S_FILES)
+OBJS = $(C_O_FILES) $(S_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+INSTALL_CHANGE = @INSTALL_CHANGE@
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES +=
+CPPFLAGS +=
+CFLAGS +=
+
+LD_PATHS +=
+LD_LIBS +=
+LDFLAGS +=
+
+# force optimization, otherwise start.o will not work
+# CFLAGS_PROFILE=
+# CFLAGS_DEBUG=-O3
+# CFLAGS_OPTIMIZE=-O3
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+all: ${ARCH} $(SRCS) $(OBJS) $(PGM)
+	@$(INSTALL_VARIANT) -m 755 ${PGMS} $(PROJECT_RELEASE)/lib
+
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+	cd $(top_builddir) \
+	 && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status
diff --git a/c/src/lib/libbsp/sh/gensh2/start/start.S b/c/src/lib/libbsp/sh/gensh2/start/start.S
new file mode 100644
index 0000000000..f06b284f50
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/start/start.S
@@ -0,0 +1,198 @@
+/*
+ *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
+ *           Bernd Becker (becker@faw.uni-ulm.de)
+ *
+ *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *  Modified to reflect Hitachi EDK SH7045F:
+ *  John M. Mills (jmills@tga.com)
+ *  TGA Technologies, Inc.
+ *  100 Pinnacle Way, Suite 140
+ *  Norcross, GA 30071 U.S.A.
+ *  
+ *
+ *  This modified file may be copied and distributed in accordance
+ *  the above-referenced license. It is provided for critique and
+ *  developmental purposes without any warranty nor representation
+ *  by the authors or by TGA Technologies.
+ *
+ *  COPYRIGHT (c) 1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+
+	BEGIN_CODE
+	PUBLIC(start)
+
+SYM (start):
+        ! install the stack pointer
+	mov.l	stack_k,r15
+
+#ifdef	START_HW_INIT	/* from $RTEMS_BSP.cfg */
+	! Initialize minimal hardware
+	mov.l	hw_init_k, r0
+	jsr @r0
+	nop		!debug dead-slot target
+#endif /* START_HW_INIT */
+
+	! zero out bss
+	mov.l	edata_k,r0
+	mov.l	end_k,r1
+	mov	#0,r2
+0:
+	mov.l	r2,@r0
+	add	#4,r0
+	cmp/ge	r0,r1
+	bt	0b
+	nop		!debug dead-slot target
+
+	! copy the vector table from rom to ram
+	mov.l   vects_k,r0   	! vectab
+	mov	#0,r1		! address of boot vector table
+	mov     #0,r2		! number of bytes copied
+	mov.w   vects_size,r3   ! size of entries in vectab
+1:
+	mov.l   @r1+,r4
+	mov.l   r4,@r0
+	add     #4,r0
+	add     #1,r2
+	cmp/hi  r3,r2
+	bf      1b
+	nop		!debug dead-slot target
+
+	! overlay monitor vectors onto RTEMS table template
+	! code adapted  from Hitachi EDK7045F User Manual: "Copyvect.s"
+	mova	vects_k,r0
+	mov.l	@r0, r1	! Shadow vect tbl addr
+	stc		vbr, r2	! Original vect tbl addr
+	and		#0, r0 
+	mov		r0, r4	! 0 in r4 and r0
+
+!trapa #32
+	or		#0x80, r0
+	mov.l	@(r0,r2), r3
+	mov.l	r3, @(r0, r1)
+	mov		r4, r0
+
+!cpu addr err
+	or		#0x24, r0
+	mov.l	@(r0, r2), r3
+	mov.l	r3, @(r0, r1)
+	mov		r4, r0
+
+!ill slot
+	or		#0x18, r0
+	mov.l	@(r0, r2), r3
+	mov.l	r3, @(r0, r1)
+	mov		r4, r0
+
+!ill inst
+	or		#0x10, r0
+	mov.l	@(r0, r2), r3
+	mov.l	r3, @(r0, r1)
+	mov		r4, r0
+
+!nmi
+	or		#0x2c, r0
+	mov.l	@(r0, r2), r3
+	mov.l	r3, @(r0, r1)
+	mov		r4, r0
+
+!User brk
+	or		#0x30, r0
+	mov.l	@(r0, r2), r3
+	mov.l	r3, @(r0, r1)
+	mov		r4, r0
+
+!sci0 err
+	or		#0x80, r0
+	rotl	r0
+	rotl	r0
+	mov.l	@(r0, r2), r3
+	mov.l	r3, @(r0, r1)
+	mov		r4, r0
+!sci rx
+	or		#0x81, r0
+	rotl	r0
+	rotl	r0
+	mov.l	@(r0, r2), r3
+	mov.l	r3, @(r0, r1)
+
+	stc	vbr,r3		! capture copy of monitor vbr
+	mov.l	vbrtemp_k,r0
+	mov.l	r3, @r0
+	mov.l   vects_k,r0   	! point vbr to vectab
+	ldc     r0,vbr
+
+	! call the mainline	
+	mov #0,r4		! argc
+	mov #0,r5		! argv - can place in dead slot
+	mov.l main_k,r0
+	jsr @r0
+	nop		!debug dead-slot target
+
+	! call exit
+	mov	r0,r4
+	mov.l	exit_k,r0
+	or	r0,r0
+	jsr	@r0
+	nop		!debug dead-slot target
+
+	mov.l	vbrtemp_k,r0	! restore original vbr
+	mov.l	@r0,r3
+	ldc	r3, vbr
+	trapa	#13		! UBR capture by monitor
+	nop		!debug dead-slot target
+
+	END_CODE
+
+	.align 2
+stack_k:
+	.long	SYM(stack)	
+edata_k:
+	.long	SYM(edata)
+end_k:
+	.long	SYM(end)
+main_k:
+	.long	SYM(boot_card)
+exit_k:
+	.long	SYM(exit)
+#ifdef	START_HW_INIT	/* from $RTEMS_BSP.cfg */
+hw_init_k:
+	.long	SYM(hw_initialize)
+#endif /* START_HW_INIT */
+vbrtemp_k:
+	.long	SYM(vbrtemp)
+vects_k:
+	.long	SYM(vectab)
+vects_size:
+	.word	255
+
+#ifdef __ELF__
+	.section .stack,"aw"
+#else
+	.section .stack
+#endif
+SYM(stack):
+	.long	0xdeaddead
+
+#ifdef __ELF__
+	.section .bss,"aw"
+#else
+	.section .bss
+#endif
+SYM(vbrtemp):
+	.long	0x0
+
diff --git a/c/src/lib/libbsp/sh/gensh2/start/start.ram b/c/src/lib/libbsp/sh/gensh2/start/start.ram
new file mode 100644
index 0000000000..1bbcc9daf2
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/start/start.ram
@@ -0,0 +1,199 @@
+/*
+ *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
+ *           Bernd Becker (becker@faw.uni-ulm.de)
+ *
+ *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *
+ *  COPYRIGHT (c) 1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  Modified to reflect Hitachi EDK SH7045F:
+ *  John M. Mills (jmills@tga.com)
+ *  TGA Technologies, Inc.
+ *  100 Pinnacle Way, Suite 140
+ *  Norcross, GA 30071 U.S.A.
+ *  
+ *
+ *  This modified file may be copied and distributed in accordance
+ *  the above-referenced license. It is provided for critique and
+ *  developmental purposes without any warranty nor representation
+ *  by the authors or by TGA Technologies.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+
+	BEGIN_CODE
+	PUBLIC(start)
+
+SYM (start):
+        ! install the stack pointer
+	mov.l	stack_k,r15
+
+#ifdef	START_HW_INIT	/* from $RTEMS_BSP.cfg */
+	! Initialize minimal hardware
+	mov.l	hw_init_k, r0
+	jsr @r0
+	nop		!debug dead-slot target
+#endif /* START_HW_INIT */
+
+	! zero out bss
+	mov.l	edata_k,r0
+	mov.l	end_k,r1
+	mov	#0,r2
+0:
+	mov.l	r2,@r0
+	add	#4,r0
+	cmp/ge	r0,r1
+	bt	0b
+	nop		!debug dead-slot target
+
+	! copy the vector table from rom to ram
+	mov.l   vects_k,r0   	! vectab
+	mov	#0,r1		! address of boot vector table
+	mov     #0,r2		! number of bytes copied
+	mov.w   vects_size,r3   ! size of entries in vectab
+1:
+	mov.l   @r1+,r4
+	mov.l   r4,@r0
+	add     #4,r0
+	add     #1,r2
+	cmp/hi  r3,r2
+	bf      1b
+	nop		!debug dead-slot target
+
+	! overlay monitor vectors onto RTEMS table template
+	! code adapted  from Hitachi EDK7045F User Manual: "Copyvect.s"
+	mova	vects_k,r0
+	mov.l	@r0, r1	! Shadow vect tbl addr
+	stc		vbr, r2	! Original vect tbl addr
+	and		#0, r0 
+	mov		r0, r4	! 0 in r4 and r0
+
+!trapa #32
+	or		#0x80, r0
+	mov.l	@(r0,r2), r3
+	mov.l	r3, @(r0, r1)
+	mov		r4, r0
+
+!cpu addr err
+	or		#0x24, r0
+	mov.l	@(r0, r2), r3
+	mov.l	r3, @(r0, r1)
+	mov		r4, r0
+
+!ill slot
+	or		#0x18, r0
+	mov.l	@(r0, r2), r3
+	mov.l	r3, @(r0, r1)
+	mov		r4, r0
+
+!ill inst
+	or		#0x10, r0
+	mov.l	@(r0, r2), r3
+	mov.l	r3, @(r0, r1)
+	mov		r4, r0
+
+!nmi
+	or		#0x2c, r0
+	mov.l	@(r0, r2), r3
+	mov.l	r3, @(r0, r1)
+	mov		r4, r0
+
+!User brk
+	or		#0x30, r0
+	mov.l	@(r0, r2), r3
+	mov.l	r3, @(r0, r1)
+	mov		r4, r0
+
+!sci0 err
+	or		#0x80, r0
+	rotl	r0
+	rotl	r0
+	mov.l	@(r0, r2), r3
+	mov.l	r3, @(r0, r1)
+	mov		r4, r0
+!sci rx
+	or		#0x81, r0
+	rotl	r0
+	rotl	r0
+	mov.l	@(r0, r2), r3
+	mov.l	r3, @(r0, r1)
+
+	stc	vbr,r3		! capture copy of monitor vbr
+	mov.l	vbrtemp_k,r0
+	mov.l	r3, @r0
+	mov.l   vects_k,r0   	! point vbr to vectab
+	ldc     r0,vbr
+
+	! call the mainline	
+	mov #0,r4		! argc
+	mov #0,r5		! argv - can place in dead slot
+	mov.l main_k,r0
+	jsr @r0
+	nop		!debug dead-slot target
+
+	! call exit
+	mov	r0,r4
+	mov.l	exit_k,r0
+	or	r0,r0
+	jsr	@r0
+	nop		!debug dead-slot target
+
+	mov.l	vbrtemp_k,r0	! restore original vbr
+	mov.l	@r0,r3
+	ldc	r3, vbr
+	trapa	#13		! UBR capture by monitor
+	nop		!debug dead-slot target
+
+	END_CODE
+
+	.align 2
+stack_k:
+	.long	SYM(stack)	
+edata_k:
+	.long	SYM(edata)
+end_k:
+	.long	SYM(end)
+main_k:
+	.long	SYM(boot_card)
+exit_k:
+	.long	SYM(exit)
+#ifdef	START_HW_INIT	/* from $RTEMS_BSP.cfg */
+hw_init_k:
+	.long	SYM(hw_initialize)
+#endif /* START_HW_INIT */
+vbrtemp_k:
+	.long	SYM(vbrtemp)
+vects_k:
+	.long	SYM(vectab)
+vects_size:
+	.word	255
+
+#ifdef __ELF__
+	.section .stack,"aw"
+#else
+	.section .stack
+#endif
+SYM(stack):
+	.long	0xdeaddead
+
+#ifdef __ELF__
+	.section .bss,"aw"
+#else
+	.section .bss
+#endif
+SYM(vbrtemp):
+	.long	0x0
+
diff --git a/c/src/lib/libbsp/sh/gensh2/start/start.rom b/c/src/lib/libbsp/sh/gensh2/start/start.rom
new file mode 100644
index 0000000000..9deeb53fed
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/start/start.rom
@@ -0,0 +1,94 @@
+/*
+ *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
+ *           Bernd Becker (becker@faw.uni-ulm.de)
+ *
+ *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *
+ *  COPYRIGHT (c) 1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+
+	BEGIN_CODE
+	PUBLIC(start)
+SYM (start):
+        ! install the stack pointer
+	mov.l	stack_k,r15
+
+	! zero out bss
+	mov.l	edata_k,r0
+	mov.l	end_k,r1
+	mov	#0,r2
+0:
+	mov.l	r2,@r0
+	add	#4,r0
+	cmp/ge	r0,r1
+	bt	0b
+
+	! copy the vector table from rom to ram
+	mov.l   vects_k,r0   	! vectab
+	mov	#0,r1		! address of boot vector table
+	mov     #0,r2		| number of bytes copied
+	mov.w   vects_size,r3   ! size of entries in vectab
+1:
+	mov.l   @r1+,r4
+	mov.l   r4,@r0
+	add     #4,r0
+	add     #1,r2
+	cmp/hi  r3,r2
+	bf      1b
+
+	mov.l   vects_k,r0   	! update vbr to point to vectab
+	ldc     r0,vbr
+
+	! call the mainline	
+	mov #0,r4		! argc
+	mov.l main_k,r0
+	jsr @r0
+	mov #0,r5		! argv
+
+	! call exit
+	mov	r0,r4
+	mov.l	exit_k,r0
+	jsr	@r0
+	or	r0,r0
+
+	END_CODE
+
+	.align 2
+stack_k:
+	.long	SYM(stack)	
+edata_k:
+	.long	SYM(edata)
+end_k:
+	.long	SYM(end)
+main_k:
+	.long	SYM(boot_card)
+exit_k:
+	.long	SYM(exit)
+
+vects_k:
+	.long	SYM(vectab)
+vects_size:
+	.word	255
+
+#ifdef __ELF__
+	.section .stack,"aw"
+#else
+	.section .stack
+#endif
+SYM(stack):
+	.long	0xdeaddead
diff --git a/c/src/lib/libbsp/sh/gensh2/startup/Makefile.in b/c/src/lib/libbsp/sh/gensh2/startup/Makefile.in
new file mode 100644
index 0000000000..5b758601f5
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/startup/Makefile.in
@@ -0,0 +1,77 @@
+##
+## $Id$
+##
+
+@SET_MAKE@
+srcdir = @srcdir@
+top_srcdir = @top_srcdir@
+top_builddir = ../../..
+subdir = sh/gensh2/startup
+
+RTEMS_ROOT = @RTEMS_ROOT@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+VPATH = @srcdir@:@srcdir@/../../shared:@srcdir@/../../../shared
+
+PGM = ${ARCH}/startup.rel
+
+# C source names, if any, go here -- minus the .c
+C_PIECES = hw_init bsplibc bsppost bspstart bspclean sbrk bootcard main \
+    gnatinstallhandler
+C_FILES = $(C_PIECES:%=%.c)
+C_O_FILES = $(C_PIECES:%=${ARCH}/%.o)
+
+H_FILES =
+
+# Assembly source names, if any, go here -- minus the .s
+S_PIECES =
+S_FILES = $(S_PIECES:%=%.S)
+S_O_FILES = $(S_FILES:%.S=${ARCH}/%.o)
+
+SRCS = linkcmds $(C_FILES) $(H_FILES) $(S_FILES)
+OBJS = $(C_O_FILES) $(S_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+INSTALL_CHANGE = @INSTALL_CHANGE@
+mkinstalldirs = $(SHELL) $(top_srcdir)/@RTEMS_TOPdir@/mkinstalldirs
+
+INSTALLDIRS = $(PROJECT_RELEASE)/lib
+
+$(INSTALLDIRS):
+	@$(mkinstalldirs) $(INSTALLDIRS)
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES +=
+CPPFLAGS += $(BSP_CPPFLAGS)
+CFLAGS +=
+
+LD_PATHS +=
+LD_LIBS +=
+LDFLAGS +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+${PGM}: ${SRCS} ${OBJS}
+	$(make-rel)
+
+all: ${ARCH} $(SRCS) $(PGM)
+	$(INSTALL_CHANGE) -m 644 $(srcdir)/linkcmds $(PROJECT_RELEASE)/lib
+
+# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
+
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+	cd $(top_builddir) \
+	 && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status
diff --git a/c/src/lib/libbsp/sh/gensh2/startup/bspclean.c b/c/src/lib/libbsp/sh/gensh2/startup/bspclean.c
new file mode 100644
index 0000000000..fed966fdb4
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/startup/bspclean.c
@@ -0,0 +1,43 @@
+/*  bsp_cleanup()
+ *
+ *  This routine normally is part of start.s and usually returns
+ *  control to a monitor.
+ *
+ *  INPUT:  NONE
+ *
+ *  OUTPUT: NONE
+ *
+ *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
+ *           Bernd Becker (becker@faw.uni-ulm.de)
+ *
+ *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; If not, write to the Free Software Foundation, 
+ *  675 Mass Ave, Cambridge, MA 02139, USA. 
+ * 
+ *
+ *  COPYRIGHT (c) 1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+
+void bsp_cleanup( void )
+{
+#if 0
+  rtems_fatal_error_occurred(0);
+#endif
+}
diff --git a/c/src/lib/libbsp/sh/gensh2/startup/bspstart.c b/c/src/lib/libbsp/sh/gensh2/startup/bspstart.c
new file mode 100644
index 0000000000..abf97c3a86
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/startup/bspstart.c
@@ -0,0 +1,138 @@
+/*
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *
+ *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
+ *           Bernd Becker (becker@faw.uni-ulm.de)
+ *
+ *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *
+ *  COPYRIGHT (c) 1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <rtems/libio.h>
+ 
+#include <libcsupport.h>
+ 
+#include <string.h>
+ 
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+
+extern void hw_initialize(void);
+
+extern rtems_configuration_table Configuration;
+
+rtems_configuration_table  BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+
+char *rtems_progname;
+
+/*
+ *  Use the shared implementations of the following routines
+ */
+ 
+void bsp_postdriver_hook(void);
+void bsp_libc_init( void *, unsigned32, int );
+
+/*
+ *  Function:   bsp_pretasking_hook
+ *
+ *  Description:
+ *      BSP pretasking hook.  Called just before drivers are initialized.
+ *      Used to setup libc and install any BSP extensions.
+ *
+ *  NOTES:
+ *      Must not use libc (to do io) from here, since drivers are
+ *      not yet initialized.
+ *
+ */
+ 
+void bsp_pretasking_hook(void)
+{
+    bsp_libc_init(&HeapStart, sizeof(unsigned32) * (&HeapEnd - &HeapStart), 0);
+ 
+#ifdef RTEMS_DEBUG
+    rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
+#endif
+}
+
+/*
+ *  bsp_start
+ *
+ *  This routine does the bulk of the system initialization.
+ */
+
+void bsp_start(void)
+{
+  /*
+     For real boards you need to setup the hardware 
+     and need to copy the vector table from rom to ram.
+
+     Depending on the board this can ether be done from inside the rom 
+     startup code, rtems startup code or here.
+   */
+  hw_initialize();
+
+  /*
+   *  Allocate the memory for the RTEMS Work Space.  This can come from
+   *  a variety of places: hard coded address, malloc'ed from outside
+   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
+   *  typically done by stock BSPs) by subtracting the required amount
+   *  of work space from the last physical address on the CPU board.
+   */
+
+  /*
+   *  Need to "allocate" the memory for the RTEMS Workspace and
+   *  tell the RTEMS configuration where it is.  This memory is
+   *  not malloc'ed.  It is just "pulled from the air".
+   */
+
+  BSP_Configuration.work_space_start = (void *) &WorkSpaceStart ;
+  BSP_Configuration.work_space_size  = 
+    (unsigned32) &WorkSpaceEnd - 
+    (unsigned32) &WorkSpaceStart ;
+  
+  /*
+   *  initialize the CPU table for this BSP
+   */
+
+#if ( CPU_ALLOCATE_INTERRUPT_STACK == FALSE )
+  _CPU_Interrupt_stack_low = &CPU_Interrupt_stack_low ;
+  _CPU_Interrupt_stack_high = &CPU_Interrupt_stack_high ;
+
+  /* This isn't used anywhere */
+  Cpu_table.interrupt_stack_size = 
+    (unsigned32) (&CPU_Interrupt_stack_high) -
+    (unsigned32) (&CPU_Interrupt_stack_low) ;
+#endif
+
+
+  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
+  Cpu_table.postdriver_hook = bsp_postdriver_hook;
+
+#if ( CPU_ALLOCATE_INTERRUPT_STACK == TRUE )
+  Cpu_table.interrupt_stack_size = 4096;
+#endif
+
+  Cpu_table.clicks_per_second = HZ ;
+}
diff --git a/c/src/lib/libbsp/sh/gensh2/startup/hw_init.c b/c/src/lib/libbsp/sh/gensh2/startup/hw_init.c
new file mode 100644
index 0000000000..be2cdab35b
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/startup/hw_init.c
@@ -0,0 +1,140 @@
+/*
+ *  hw_init.c: set up sh7045F internal subunits
+ *
+ *  Author: John M. Mills (jmills@tga.com)
+ *  COPYRIGHT(c) 1999, TGA Technologies, Inc
+ *                     Norcross, GA 30071 U.S.A
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  Adapted from Hitachi EVB7045F tutorial files by:
+ *  John M. Mills (jmills@tga.com)
+ *  TGA Technologies, Inc.
+ *  100 Pinnacle Way, Suite 140
+ *  Norcross, GA 30071 U.S.A.
+ *  
+ *
+ *  This file may be copied and distributed in accordance
+ *  the above-referenced license. It is provided for critique and
+ *  developmental purposes without any warranty nor representation
+ *  by the authors or by TGA Technologies.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+
+#include <stdlib.h>
+
+#include <rtems/libio.h>
+#include <iosupp.h>
+#include <rtems/score/sh_io.h>
+#include <rtems/score/iosh7045.h>
+
+/* exported entry */
+extern void hw_initialize (void);
+
+/* STANDALONE_EVB sets up bus, DRAM, PFC, and SCI0 */
+/* no STANDALONE_EVB accepts defaults, adds RESET, SCI1, WDT */
+
+/***************************************************/
+/*      Inline function to access CPU features     */
+/*	from C.  This makes use of GNU extensions. */
+/***************************************************/
+
+__inline__ void set_interrupt_mask(unsigned char mask)
+{
+  asm("mov.l r0,@-r15");
+  asm("mov %0,r0"::"r"(mask));	
+  asm("and #0xF,r0");
+  asm("rotl r0");
+  asm("rotl r0");
+  asm("rotl r0");
+  asm("rotl r0");
+  asm("ldc r0,sr");
+  asm("mov.l @r15+,r0");
+}
+
+void hw_initialize (void) 
+{
+	int a;
+	unsigned8 temp8;
+	unsigned16 temp16;
+
+#ifdef STANDALONE_EVB
+	write16(0x2020, BSC_BCR1);  /* Bus width access - 32-bit on CS1 */
+	write16(0xF3DD, BSC_BCR2);  /* Idle cycles CS3-CS0 - 0 idle cycles*/
+	write16(0xFF3F, BSC_WCR1);  /* Waits for CS3-CS0 - 3 waits on CS1 */
+	write16(0x000F, BSC_WCR2);  /* Waits for DRAM/DMA access - default */
+	write16(0x0000, BSC_DCR);   /* DRAM control - default */
+	write16(0x0000, BSC_RTCSR); /* DRAM refresh - default */
+	write16(0x0000, BSC_RTCNT); /* DRAM refresh counter - default*/
+	write16(0x0000, BSC_RTCOR); /* DRAM refresh compare match - default */
+	
+	write16(0x5000, PFC_PACRH); /* Pin function controller - WRHH, WRHL */
+	write16(0x1550, PFC_PACRL1); /* Pin fun. controller - WRH,WRL,RD,CS1 */
+	write16(0x0000, PFC_PBCR1); /* Pin function controller - default */
+	write16(0x2005, PFC_PBCR2); /* Pin function controller - A18,A17,A16 */
+	write16(0xFFFF, PFC_PCCR);  /* Pin function controller - A15-A0  */
+	write16(0x5555, PFC_PDCRH1; /* Pin function controller - D31-D24 */
+	write16(0x5555, PFC_PDCRH2); /* Pin function controller - D23-D16 */
+	write16(0xFFFF, PFC_PDCRL); /* Pin function controller - D15-D0  */
+	write16(0x0000, PFC_IFCR);  /* Pin function controller - default */
+	write16(0x0005, PFC_PACRL2); /* Pin function controller - Tx0, Rx0 */
+
+	/* SCI0 */
+/* FIXME: This doesn't belong here */
+	write8(0x00, SCI_SCR0);     /* Clear SCR */
+	write8(0x00, SCI_SMR0);	    /* Clear SMR */
+	write8(0x5F, SCI_BRR0);	    /* Default 9600 baud rate */
+#if 0
+	write8(0x1F, SCI_BRR0);    /* 28800 baud */
+#endif
+/* FIXME: Will get optimized away */
+	for(a=0;a<00000L;a++);	    /* One bit delay */
+	write8(0x30, SCI_SCR0);	    /* Enable clock output */
+	temp8 = read8(SCI_RDR0);    /* Clear out old input */
+
+#endif
+
+	/* default hardware setup */
+
+	/* PFC: General I/O except pin 13 (reset): */
+	temp16 = read16(PFC_PECR1) | 0x0800;
+	write16(temp16, PFC_PECR1);
+
+	/* All I/O lines bits 7-0: */
+	write16(0x00, PFC_PECR2);
+
+	/* P5 out, all other pins in: */
+	temp16 = read16(PFC_PEIOR) | 0x0020;
+	write16(temp16, PFC_PEIOR);
+
+	/* PFC - pins for Tx0-1, Rx0-1: */
+	temp16 = read16(PFC_PACRL2) | 0x0145;
+	write16(temp16, PFC_PACRL2);
+
+	/* SCI1 - Default RTEMS console */
+#if FIXME
+	/* write8(0x00, SCI_SCR1);	/* Clear SCR */
+	/* write8(0x00, SCI_SMR1);	/* Clear SMR */
+	/* write8(0x5F, SCI_BRR1);	/* Default 9600 baud rate */
+	/* write8(0x1F, SCI_BRR1);    /* 28800 baud */
+/* FIXME: Will get optimized away */
+	/* for(a=0;a<10000L;a++);	/* One bit delay */
+	/* write8(0x30, SCI_SCR1);	/* Enable clock output */
+	/* temp8 = read8(SCI_RDR1);      /* Clear out old input */
+
+	/* INTC setup */
+	/* set_interrupt_mask(0);	/* enable interrupts */
+	/* INTC_IPRF &= ~(SCI1_IPMSK);	/* set SIO1 priority at INTC */
+	/* INTC_IPRF |= SCI1_LOWIP;	*/
+#endif
+}
diff --git a/c/src/lib/libbsp/sh/gensh2/startup/linkcmds b/c/src/lib/libbsp/sh/gensh2/startup/linkcmds
new file mode 100644
index 0000000000..71258d7fe8
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/startup/linkcmds
@@ -0,0 +1,216 @@
+/*
+ * This is an adapted linker script from egcs-1.0.1 
+ *
+ * Memory layout for an SH7045F with main memory in area 2
+ * This memory layout it very similar to that used for Hitachi's
+ * EVB with CMON in FLASH
+ *
+ * NOTE: The ram start address may vary, all other start addresses are fixed
+ *       Not suiteable for gdb's simulator
+ *
+ *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
+ *           Bernd Becker (becker@faw.uni-ulm.de)
+ *
+ *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *
+ *  COPYRIGHT (c) 1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *	Modified to reflect SH7045F processor and EVB:
+ *	John M. Mills (jmills@tga.com)
+ *	TGA Technologies, Inc.
+ *      100 Pinnacle Way, Suite 140
+ *	Norcross, GA 30071 U.S.A.
+ *
+ *	This modified file may be copied and distributed in accordance
+ *	the above-referenced license. It is provided for critique and
+ *	developmental purposes without any warranty nor representation
+ *	by the authors or by TGA Technologies.
+ *
+ *  $Id$
+ */
+
+OUTPUT_FORMAT("coff-sh")
+OUTPUT_ARCH(sh)
+ENTRY(_start)
+
+/* These assignments load code into SH7045F EVB SRAM for monitor debugging */
+
+MEMORY
+{
+  rom           : o = 0x00400000, l = 0x00040000
+  ram           : o = 0x00440000, l = 0x00040000
+  onchip_peri   : o = 0xFFFF8000, l = 0x00000800
+  onchip_ram    : o = 0xFFFFF000, l = 0x00001000
+}
+
+/* Sections are defined for RAM loading and monitor debugging */
+SECTIONS
+{
+  /* boot vector table */
+  .monvects 0x00400000 (NOLOAD): {
+    _monvects = . ;
+  } > rom
+
+  /* monitor play area */
+  .monram 0x00440000 (NOLOAD) : 
+  {
+  _ramstart = .;
+  } > ram 
+
+  /* monitor vector table */
+  .vects   0x00442000 (NOLOAD) : {
+    _vectab = . ;
+    *(.vects);
+  }
+
+  /* Read-only sections, merged into text segment: */
+
+  . = 0x00444000 ;
+  .interp        : { *(.interp) 	}
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .gnu.version   : { *(.gnu.version)	}
+  .gnu.version_d : { *(.gnu.version_d)	}
+  .gnu.version_r : { *(.gnu.version_r)	}
+  .rel.text      :
+    { *(.rel.text) *(.rel.gnu.linkonce.t*) }
+  .rela.text     :
+    { *(.rela.text) *(.rela.gnu.linkonce.t*) }
+  .rel.data      :
+    { *(.rel.data) *(.rel.gnu.linkonce.d*) }
+  .rela.data     :
+    { *(.rela.data) *(.rela.gnu.linkonce.d*) }
+  .rel.rodata    :
+    { *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
+  .rela.rodata   :
+    { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.init      : { *(.rel.init)	}
+  .rela.init     : { *(.rela.init)	}
+  .rel.fini      : { *(.rel.fini)	}
+  .rela.fini     : { *(.rela.fini)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	} =0
+  .plt      	 : { *(.plt)	}
+  .text   .   	 :
+  {
+    *(.text)
+    *(.stub)
+    /* .gnu.warning sections are handled specially by elf32.em.  */
+    *(.gnu.warning)
+    *(.gnu.linkonce.t*)
+  } > ram
+  _etext = .;
+  PROVIDE (etext = .);
+  .fini    .  : { *(.fini)    } =0
+  .rodata  .  : { *(.rodata) *(.gnu.linkonce.r*) }
+  .rodata1 .  : { *(.rodata1) }
+  /* Adjust the address for the data segment.  We want to adjust up to
+     the same address within the page on the next page up.  */
+  . = ALIGN(128) + (. & (128 - 1));
+  .data  .  :
+  {
+    *(.data)
+    *(.gnu.linkonce.d*)
+    CONSTRUCTORS
+  } > ram
+  .data1  . : { *(.data1) }
+  .ctors  .       :
+  {
+    ___ctors = .;
+    *(.ctors)
+    ___ctors_end = .;
+  }
+  .dtors  .       :
+  {
+    ___dtors = .;
+    *(.dtors)
+    ___dtors_end = .;
+  }
+  .got     .      : { *(.got.plt) *(.got) }
+  .dynamic .      : { *(.dynamic) }
+  /* We want the small data sections together, so single-instruction offsets
+     can access them all, and initialized data all before uninitialized, so
+     we can shorten the on-disk segment size.  */
+  .sdata   .  : { *(.sdata) }
+  _edata  =  .;
+  PROVIDE (edata = .);
+  __bss_start = .;
+  .sbss    .  : { *(.sbss) *(.scommon) }
+  .bss     .  :
+  {
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  } > ram
+  _end = . ;
+  PROVIDE (end = .);
+
+  _HeapStart = . ;
+  . = . + 1024 * 20 ;
+  PROVIDE( _HeapEnd = . );
+
+  _WorkSpaceStart = . ;
+  . = 0x00480000 ;
+  PROVIDE(_WorkSpaceEnd = .);
+
+  _CPU_Interrupt_stack_low  = 0xFFFFF000 ;
+  _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ;
+
+  /* Stabs debugging sections.  */
+  .stab 0 : { *(.stab) }
+  .stabstr 0 : { *(.stabstr) }
+  .stab.excl 0 : { *(.stab.excl) }
+  .stab.exclstr 0 : { *(.stab.exclstr) }
+  .stab.index 0 : { *(.stab.index) }
+  .stab.indexstr 0 : { *(.stab.indexstr) }
+  .comment 0 : { *(.comment) }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+
+  .stack 0xFFFFFEC0 : { _stack = .; *(.stack) } > onchip_ram
+  /* These must appear regardless of  .  */
+}
diff --git a/c/src/lib/libbsp/sh/gensh2/startup/linkcmds.ram b/c/src/lib/libbsp/sh/gensh2/startup/linkcmds.ram
new file mode 100644
index 0000000000..71258d7fe8
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/startup/linkcmds.ram
@@ -0,0 +1,216 @@
+/*
+ * This is an adapted linker script from egcs-1.0.1 
+ *
+ * Memory layout for an SH7045F with main memory in area 2
+ * This memory layout it very similar to that used for Hitachi's
+ * EVB with CMON in FLASH
+ *
+ * NOTE: The ram start address may vary, all other start addresses are fixed
+ *       Not suiteable for gdb's simulator
+ *
+ *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
+ *           Bernd Becker (becker@faw.uni-ulm.de)
+ *
+ *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *
+ *  COPYRIGHT (c) 1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *	Modified to reflect SH7045F processor and EVB:
+ *	John M. Mills (jmills@tga.com)
+ *	TGA Technologies, Inc.
+ *      100 Pinnacle Way, Suite 140
+ *	Norcross, GA 30071 U.S.A.
+ *
+ *	This modified file may be copied and distributed in accordance
+ *	the above-referenced license. It is provided for critique and
+ *	developmental purposes without any warranty nor representation
+ *	by the authors or by TGA Technologies.
+ *
+ *  $Id$
+ */
+
+OUTPUT_FORMAT("coff-sh")
+OUTPUT_ARCH(sh)
+ENTRY(_start)
+
+/* These assignments load code into SH7045F EVB SRAM for monitor debugging */
+
+MEMORY
+{
+  rom           : o = 0x00400000, l = 0x00040000
+  ram           : o = 0x00440000, l = 0x00040000
+  onchip_peri   : o = 0xFFFF8000, l = 0x00000800
+  onchip_ram    : o = 0xFFFFF000, l = 0x00001000
+}
+
+/* Sections are defined for RAM loading and monitor debugging */
+SECTIONS
+{
+  /* boot vector table */
+  .monvects 0x00400000 (NOLOAD): {
+    _monvects = . ;
+  } > rom
+
+  /* monitor play area */
+  .monram 0x00440000 (NOLOAD) : 
+  {
+  _ramstart = .;
+  } > ram 
+
+  /* monitor vector table */
+  .vects   0x00442000 (NOLOAD) : {
+    _vectab = . ;
+    *(.vects);
+  }
+
+  /* Read-only sections, merged into text segment: */
+
+  . = 0x00444000 ;
+  .interp        : { *(.interp) 	}
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .gnu.version   : { *(.gnu.version)	}
+  .gnu.version_d : { *(.gnu.version_d)	}
+  .gnu.version_r : { *(.gnu.version_r)	}
+  .rel.text      :
+    { *(.rel.text) *(.rel.gnu.linkonce.t*) }
+  .rela.text     :
+    { *(.rela.text) *(.rela.gnu.linkonce.t*) }
+  .rel.data      :
+    { *(.rel.data) *(.rel.gnu.linkonce.d*) }
+  .rela.data     :
+    { *(.rela.data) *(.rela.gnu.linkonce.d*) }
+  .rel.rodata    :
+    { *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
+  .rela.rodata   :
+    { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.init      : { *(.rel.init)	}
+  .rela.init     : { *(.rela.init)	}
+  .rel.fini      : { *(.rel.fini)	}
+  .rela.fini     : { *(.rela.fini)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	} =0
+  .plt      	 : { *(.plt)	}
+  .text   .   	 :
+  {
+    *(.text)
+    *(.stub)
+    /* .gnu.warning sections are handled specially by elf32.em.  */
+    *(.gnu.warning)
+    *(.gnu.linkonce.t*)
+  } > ram
+  _etext = .;
+  PROVIDE (etext = .);
+  .fini    .  : { *(.fini)    } =0
+  .rodata  .  : { *(.rodata) *(.gnu.linkonce.r*) }
+  .rodata1 .  : { *(.rodata1) }
+  /* Adjust the address for the data segment.  We want to adjust up to
+     the same address within the page on the next page up.  */
+  . = ALIGN(128) + (. & (128 - 1));
+  .data  .  :
+  {
+    *(.data)
+    *(.gnu.linkonce.d*)
+    CONSTRUCTORS
+  } > ram
+  .data1  . : { *(.data1) }
+  .ctors  .       :
+  {
+    ___ctors = .;
+    *(.ctors)
+    ___ctors_end = .;
+  }
+  .dtors  .       :
+  {
+    ___dtors = .;
+    *(.dtors)
+    ___dtors_end = .;
+  }
+  .got     .      : { *(.got.plt) *(.got) }
+  .dynamic .      : { *(.dynamic) }
+  /* We want the small data sections together, so single-instruction offsets
+     can access them all, and initialized data all before uninitialized, so
+     we can shorten the on-disk segment size.  */
+  .sdata   .  : { *(.sdata) }
+  _edata  =  .;
+  PROVIDE (edata = .);
+  __bss_start = .;
+  .sbss    .  : { *(.sbss) *(.scommon) }
+  .bss     .  :
+  {
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  } > ram
+  _end = . ;
+  PROVIDE (end = .);
+
+  _HeapStart = . ;
+  . = . + 1024 * 20 ;
+  PROVIDE( _HeapEnd = . );
+
+  _WorkSpaceStart = . ;
+  . = 0x00480000 ;
+  PROVIDE(_WorkSpaceEnd = .);
+
+  _CPU_Interrupt_stack_low  = 0xFFFFF000 ;
+  _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ;
+
+  /* Stabs debugging sections.  */
+  .stab 0 : { *(.stab) }
+  .stabstr 0 : { *(.stabstr) }
+  .stab.excl 0 : { *(.stab.excl) }
+  .stab.exclstr 0 : { *(.stab.exclstr) }
+  .stab.index 0 : { *(.stab.index) }
+  .stab.indexstr 0 : { *(.stab.indexstr) }
+  .comment 0 : { *(.comment) }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+
+  .stack 0xFFFFFEC0 : { _stack = .; *(.stack) } > onchip_ram
+  /* These must appear regardless of  .  */
+}
diff --git a/c/src/lib/libbsp/sh/gensh2/startup/linkcmds.rom b/c/src/lib/libbsp/sh/gensh2/startup/linkcmds.rom
new file mode 100644
index 0000000000..54d28e5552
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/startup/linkcmds.rom
@@ -0,0 +1,217 @@
+/*
+ * This is an adapted linker script from egcs-1.0.1 
+ *
+ * Memory layout for an SH7045F with main memory in area 2
+ * This memory layout it very similar to that used for Hitachi's
+ * EVB with CMON in FLASH
+ *
+ * NOTE: The ram start address may vary, all other start addresses are fixed
+ *       Not suiteable for gdb's simulator
+ *
+ *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
+ *           Bernd Becker (becker@faw.uni-ulm.de)
+ *
+ *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *
+ *  COPYRIGHT (c) 1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *	Modified to reflect SH7045F processor and EVB:
+ *	John M. Mills (jmills@tga.com)
+ *	TGA Technologies, Inc.
+ *      100 Pinnacle Way, Suite 140
+ *	Norcross, GA 30071 U.S.A.
+ *
+ *	This modified file may be copied and distributed in accordance
+ *	the above-referenced license. It is provided for critique and
+ *	developmental purposes without any warranty nor representation
+ *	by the authors or by TGA Technologies.
+ *
+ *  $Id$
+ */
+
+OUTPUT_FORMAT("coff-sh")
+OUTPUT_ARCH(sh)
+ENTRY(_start)
+
+/* These asignments represent actual SH7045F EVB architecture */
+
+MEMORY
+{
+  rom           : o = 0x00000000, l = 0x00040000
+  ram           : o = 0x00400000, l = 0x00080000
+  onchip_peri   : o = 0xFFFF8000, l = 0x00000800
+  onchip_ram    : o = 0xFFFFF000, l = 0x00001000
+}
+
+
+/* Sections are defined for RAM loading and monitor debugging */
+SECTIONS
+{
+  /* boot vector table */
+  .monvects 0x00000000 (NOLOAD): {
+    _monvects = . ;
+  } > rom
+
+  /* monitor play area */
+  .monram 0x00400000 (NOLOAD) : 
+  {
+  _ramstart = .;
+  } > ram 
+
+  /* monitor vector table */
+  .vects   0x00402000 (NOLOAD) : {
+    _vectab = . ;
+    *(.vects);
+  }
+
+  /* Read-only sections, merged into text segment: */
+
+  . = 0x00404000 ;
+  .interp        : { *(.interp) 	}
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .gnu.version   : { *(.gnu.version)	}
+  .gnu.version_d : { *(.gnu.version_d)	}
+  .gnu.version_r : { *(.gnu.version_r)	}
+  .rel.text      :
+    { *(.rel.text) *(.rel.gnu.linkonce.t*) }
+  .rela.text     :
+    { *(.rela.text) *(.rela.gnu.linkonce.t*) }
+  .rel.data      :
+    { *(.rel.data) *(.rel.gnu.linkonce.d*) }
+  .rela.data     :
+    { *(.rela.data) *(.rela.gnu.linkonce.d*) }
+  .rel.rodata    :
+    { *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
+  .rela.rodata   :
+    { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.init      : { *(.rel.init)	}
+  .rela.init     : { *(.rela.init)	}
+  .rel.fini      : { *(.rel.fini)	}
+  .rela.fini     : { *(.rela.fini)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	} =0
+  .plt      	 : { *(.plt)	}
+  .text   .   	 :
+  {
+    *(.text)
+    *(.stub)
+    /* .gnu.warning sections are handled specially by elf32.em.  */
+    *(.gnu.warning)
+    *(.gnu.linkonce.t*)
+  } > ram
+  _etext = .;
+  PROVIDE (etext = .);
+  .fini    .  : { *(.fini)    } =0
+  .rodata  .  : { *(.rodata) *(.gnu.linkonce.r*) }
+  .rodata1 .  : { *(.rodata1) }
+  /* Adjust the address for the data segment.  We want to adjust up to
+     the same address within the page on the next page up.  */
+  . = ALIGN(128) + (. & (128 - 1));
+  .data  .  :
+  {
+    *(.data)
+    *(.gnu.linkonce.d*)
+    CONSTRUCTORS
+  } > ram
+  .data1  . : { *(.data1) }
+  .ctors  .       :
+  {
+    ___ctors = .;
+    *(.ctors)
+    ___ctors_end = .;
+  }
+  .dtors  .       :
+  {
+    ___dtors = .;
+    *(.dtors)
+    ___dtors_end = .;
+  }
+  .got     .      : { *(.got.plt) *(.got) }
+  .dynamic .      : { *(.dynamic) }
+  /* We want the small data sections together, so single-instruction offsets
+     can access them all, and initialized data all before uninitialized, so
+     we can shorten the on-disk segment size.  */
+  .sdata   .  : { *(.sdata) }
+  _edata  =  .;
+  PROVIDE (edata = .);
+  __bss_start = .;
+  .sbss    .  : { *(.sbss) *(.scommon) }
+  .bss     .  :
+  {
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  } > ram
+  _end = . ;
+  PROVIDE (end = .);
+
+  _HeapStart = . ;
+  . = . + 1024 * 20 ;
+  PROVIDE( _HeapEnd = . );
+
+  _WorkSpaceStart = . ;
+  . = 0x00480000 ;
+  PROVIDE(_WorkSpaceEnd = .);
+
+  _CPU_Interrupt_stack_low  = 0xFFFFF000 ;
+  _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ;
+
+  /* Stabs debugging sections.  */
+  .stab 0 : { *(.stab) }
+  .stabstr 0 : { *(.stabstr) }
+  .stab.excl 0 : { *(.stab.excl) }
+  .stab.exclstr 0 : { *(.stab.exclstr) }
+  .stab.index 0 : { *(.stab.index) }
+  .stab.indexstr 0 : { *(.stab.indexstr) }
+  .comment 0 : { *(.comment) }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+
+  .stack 0xFFFFFEC0 : { _stack = .; *(.stack) } > onchip_ram
+  /* These must appear regardless of  .  */
+}
diff --git a/c/src/lib/libbsp/sh/gensh2/wrapup/Makefile.in b/c/src/lib/libbsp/sh/gensh2/wrapup/Makefile.in
new file mode 100644
index 0000000000..19f6e613c5
--- /dev/null
+++ b/c/src/lib/libbsp/sh/gensh2/wrapup/Makefile.in
@@ -0,0 +1,69 @@
+#
+#  $Id$
+#
+#  build and install libbsp
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+top_srcdir = @top_srcdir@
+top_builddir = ../../..
+subdir = sh/gensh2/wrapup
+
+RTEMS_ROOT = @RTEMS_ROOT@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+VPATH = @srcdir@
+
+BSP_PIECES = startup scitab console
+GENERIC_PIECES =
+
+# pieces to pick up out of libcpu/sh
+CPU_PIECES = sh7045/null sh7045/clock sh7045/timer sh7045/sci
+
+# bummer; have to use $foreach since % pattern subst rules only replace 1x
+OBJS = $(foreach piece, $(BSP_PIECES), ../$(piece)/$(ARCH)/$(piece).rel) \
+    $(foreach piece, $(CPU_PIECES), \
+    ../../../../libcpu/$(RTEMS_CPU)/$(piece)/$(ARCH)/$(notdir $(piece)).rel) \
+    $(foreach piece, $(GENERIC_PIECES), \
+    ../../../../$(piece)/$(ARCH)/$(piece).rel)
+
+LIB = $(ARCH)/libbsp.a
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(RTEMS_ROOT)/make/lib.cfg
+
+INSTALL_CHANGE = @INSTALL_CHANGE@
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES +=
+CPPFLAGS +=
+CFLAGS +=
+
+LD_PATHS +=
+LD_LIBS +=
+LDFLAGS +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+$(LIB): ${OBJS}
+	$(make-library)
+
+all: ${ARCH} $(SRCS) $(LIB)
+	$(INSTALL_VARIANT) -m 644 $(LIB) $(PROJECT_RELEASE)/lib
+
+install: all
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+	cd $(top_builddir) \
+	 && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status