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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2010-11-16 23:22:13 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2010-11-16 23:22:13 +0000 |
| commit | b5df1f9a7d492de2218e26719bcdf7b6cc1047a9 (patch) | |
| tree | c2ce426d62e2f0e0db2036720be7b974e8ec8e00 /c/src/lib/libbsp/sparc64 | |
| parent | 2010-11-15 Gedare Bloom <giddyup44@yahoo.com> (diff) | |
| download | rtems-b5df1f9a7d492de2218e26719bcdf7b6cc1047a9.tar.bz2 | |
2010-11-16 Gedare Bloom <giddyup44@yahoo.com>
PR 1691/bsps
* shared/clock/ckinit.c: The sparc64/shared/clock driver has
a bug that causes nested timer interrupts to not be serviced,
which leads to non-preemptive behavior especially when dispatching
work from the timer ISR.
Diffstat (limited to 'c/src/lib/libbsp/sparc64')
| -rw-r--r-- | c/src/lib/libbsp/sparc64/ChangeLog | 8 | ||||
| -rw-r--r-- | c/src/lib/libbsp/sparc64/shared/clock/ckinit.c | 8 |
2 files changed, 14 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/sparc64/ChangeLog b/c/src/lib/libbsp/sparc64/ChangeLog index b175dde7b6..341b1eeaf6 100644 --- a/c/src/lib/libbsp/sparc64/ChangeLog +++ b/c/src/lib/libbsp/sparc64/ChangeLog @@ -1,3 +1,11 @@ +2010-11-16 Gedare Bloom <giddyup44@yahoo.com> + + PR 1691/bsps + * shared/clock/ckinit.c: The sparc64/shared/clock driver has + a bug that causes nested timer interrupts to not be serviced, + which leads to non-preemptive behavior especially when dispatching + work from the timer ISR. + 2010-11-15 Gedare Bloom <giddyup44@yahoo.com> PR 1691/bsps diff --git a/c/src/lib/libbsp/sparc64/shared/clock/ckinit.c b/c/src/lib/libbsp/sparc64/shared/clock/ckinit.c index a8f4312c25..18eb66a172 100644 --- a/c/src/lib/libbsp/sparc64/shared/clock/ckinit.c +++ b/c/src/lib/libbsp/sparc64/shared/clock/ckinit.c @@ -50,11 +50,16 @@ void Clock_driver_support_at_tick(void) { uint64_t tick_reg; int bit_mask; - + uint64_t pil_reg; bit_mask = SPARC_SOFTINT_TM_MASK | SPARC_SOFTINT_SM_MASK | (1<<14); sparc64_clear_interrupt_bits(bit_mask); + sparc64_get_pil(pil_reg); + if(pil_reg == 0xe) { /* 0xe is the tick compare interrupt (softint(14)) */ + pil_reg--; + sparc64_set_pil(pil_reg); /* enable the next timer interrupt */ + } /* Note: sun4v uses stick_cmpr for clock driver for M5 simulator, which * does not currently have tick_cmpr implemented */ /* TODO: this could be more efficiently implemented as a single assembly @@ -85,7 +90,6 @@ void Clock_driver_support_initialize_hardware(void) uint64_t tick_reg; int bit_mask; - bit_mask = SPARC_SOFTINT_TM_MASK | SPARC_SOFTINT_SM_MASK | (1<<14); sparc64_clear_interrupt_bits(bit_mask); |