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| author | Martin Aberg <maberg@gaisler.com> | 2017-03-06 11:14:23 +0100 |
|---|---|---|
| committer | Daniel Hellstrom <daniel@gaisler.com> | 2017-05-02 12:34:45 +0200 |
| commit | 7cb932504750b7a2c88812139812e43e94a77d6b (patch) | |
| tree | 503f929009e1ada647ee04a0d7ced3e96863a9d3 /c/src/lib/libbsp/sparc/shared/uart/cons.c | |
| parent | leon, clock: new driver manager clock driver (diff) | |
| download | rtems-7cb932504750b7a2c88812139812e43e94a77d6b.tar.bz2 | |
leon, apbuart: added register defines: FIFO, delay int
The FIFOs available capability bit is available in the UART Control Register:
FIFOs available (FA) - Set to 1 when receiver and transmitter FIFOs are
available. When 0, only holding register is available.
Delay interrupt can delay a receive character interrupt to better handle RX bursts.
Diffstat (limited to 'c/src/lib/libbsp/sparc/shared/uart/cons.c')
0 files changed, 0 insertions, 0 deletions