diff options
author | Daniel Cederman <cederman@gaisler.com> | 2014-05-08 15:42:12 +0200 |
---|---|---|
committer | Daniel Hellstrom <daniel@gaisler.com> | 2014-05-27 09:46:13 +0200 |
commit | 363b1f7f021c71f3e5d81a045a43f337e8bb6734 (patch) | |
tree | 7c8384ab3b00cf4810e760375489f5a04d5a77f5 /c/src/lib/libbsp/sparc/leon3 | |
parent | bsp/gdbarmsim: Switch to the standard arm/shared/startup. (diff) | |
download | rtems-363b1f7f021c71f3e5d81a045a43f337e8bb6734.tar.bz2 |
bsps/sparc: Make lines in SPARC BSPs adhere to 80 character limit.
Diffstat (limited to 'c/src/lib/libbsp/sparc/leon3')
-rw-r--r-- | c/src/lib/libbsp/sparc/leon3/Makefile.am | 3 | ||||
-rw-r--r-- | c/src/lib/libbsp/sparc/leon3/configure.ac | 7 | ||||
-rw-r--r-- | c/src/lib/libbsp/sparc/leon3/include/bsp.h | 13 | ||||
-rw-r--r-- | c/src/lib/libbsp/sparc/leon3/include/leon.h | 14 | ||||
-rw-r--r-- | c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c | 3 | ||||
-rw-r--r-- | c/src/lib/libbsp/sparc/leon3/pci/pci.c | 118 | ||||
-rw-r--r-- | c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c | 5 |
7 files changed, 100 insertions, 63 deletions
diff --git a/c/src/lib/libbsp/sparc/leon3/Makefile.am b/c/src/lib/libbsp/sparc/leon3/Makefile.am index 71d54d5779..789c3d09fc 100644 --- a/c/src/lib/libbsp/sparc/leon3/Makefile.am +++ b/c/src/lib/libbsp/sparc/leon3/Makefile.am @@ -35,7 +35,8 @@ libbsp_a_SOURCES = libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \ ../../shared/bsppost.c ../../shared/bootcard.c startup/bspstart.c \ ../../sparc/shared/bsppretaskinghook.c startup/bsppredriver.c \ - ../../sparc/shared/startup/bspgetworkarea.c ../../shared/sbrk.c startup/setvec.c \ + ../../sparc/shared/startup/bspgetworkarea.c ../../shared/sbrk.c \ + startup/setvec.c \ startup/spurious.c startup/bspidle.S startup/bspdelay.c \ ../../shared/bspinit.c ../../sparc/shared/startup/early_malloc.c libbsp_a_SOURCES += startup/bspreset.c diff --git a/c/src/lib/libbsp/sparc/leon3/configure.ac b/c/src/lib/libbsp/sparc/leon3/configure.ac index dbefd3e8f2..fd3b0a47df 100644 --- a/c/src/lib/libbsp/sparc/leon3/configure.ac +++ b/c/src/lib/libbsp/sparc/leon3/configure.ac @@ -1,7 +1,8 @@ ## Process this file with autoconf to produce a configure script. AC_PREREQ([2.69]) -AC_INIT([rtems-c-src-lib-libbsp-sparc-leon3],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla]) +AC_INIT([rtems-c-src-lib-libbsp-sparc-leon3], +[_RTEMS_VERSION],[http://www.rtems.org/bugzilla]) AC_CONFIG_SRCDIR([bsp_specs]) RTEMS_TOP(../../../../../..) @@ -23,8 +24,8 @@ AM_CONDITIONAL(HAS_SMP,[test "$rtems_cv_HAS_SMP" = "yes"]) RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[0]) RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS], [The leon3 console driver can operate in either polled or interrupt mode. -Under the simulator (especially when FAST_UART is defined), polled seems to operate -better.]) +Under the simulator (especially when FAST_UART is defined), polled seems +to operate better.]) RTEMS_BSPOPTS_SET([SIMSPARC_FAST_IDLE],[*],[]) RTEMS_BSPOPTS_HELP([SIMSPARC_FAST_IDLE], diff --git a/c/src/lib/libbsp/sparc/leon3/include/bsp.h b/c/src/lib/libbsp/sparc/leon3/include/bsp.h index eb2669e126..6bbd6ed380 100644 --- a/c/src/lib/libbsp/sparc/leon3/include/bsp.h +++ b/c/src/lib/libbsp/sparc/leon3/include/bsp.h @@ -80,11 +80,14 @@ extern int rtems_leon_greth_driver_attach( ); #define RTEMS_BSP_NETWORK_DRIVER_NAME_OPENETH "open_eth1" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_OPENETH rtems_leon_open_eth_driver_attach +#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_OPENETH \ + rtems_leon_open_eth_driver_attach #define RTEMS_BSP_NETWORK_DRIVER_NAME_SMC91111 "smc_eth1" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_SMC91111 rtems_smc91111_driver_attach_leon3 +#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_SMC91111 \ + rtems_smc91111_driver_attach_leon3 #define RTEMS_BSP_NETWORK_DRIVER_NAME_GRETH "gr_eth1" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_GRETH rtems_leon_greth_driver_attach +#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_GRETH \ + rtems_leon_greth_driver_attach #ifndef RTEMS_BSP_NETWORK_DRIVER_NAME #define RTEMS_BSP_NETWORK_DRIVER_NAME RTEMS_BSP_NETWORK_DRIVER_NAME_GRETH @@ -131,8 +134,8 @@ void bsp_spurious_initialize( void ); /* Allocate 8-byte aligned non-freeable pre-malloc() memory. The function * can be called at any time. The work-area will shrink when called before - * bsp_work_area_initialize(). malloc() is called to get memory when this function - * is called after bsp_work_area_initialize(). + * bsp_work_area_initialize(). malloc() is called to get memory when this + * function is called after bsp_work_area_initialize(). */ void *bsp_early_malloc(int size); diff --git a/c/src/lib/libbsp/sparc/leon3/include/leon.h b/c/src/lib/libbsp/sparc/leon3/include/leon.h index bda28f2bd1..f1b987be43 100644 --- a/c/src/lib/libbsp/sparc/leon3/include/leon.h +++ b/c/src/lib/libbsp/sparc/leon3/include/leon.h @@ -80,11 +80,11 @@ extern "C" { */ #define LEON_REG_TIMER_CONTROL_EN 0x00000001 /* 1 = enable counting */ - /* 0 = hold scalar and counter */ + /* 0 = hold scalar and counter */ #define LEON_REG_TIMER_CONTROL_RL 0x00000002 /* 1 = reload at 0 */ - /* 0 = stop at 0 */ + /* 0 = stop at 0 */ #define LEON_REG_TIMER_CONTROL_LD 0x00000004 /* 1 = load counter */ - /* 0 = no function */ + /* 0 = no function */ /* * The following defines the bits in the UART Control Registers. @@ -119,8 +119,10 @@ extern "C" { #define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */ #define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */ -extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs; /* LEON3 Interrupt Controller */ -extern volatile struct gptimer_regs *LEON3_Timer_Regs; /* LEON3 GP Timer */ +/* LEON3 Interrupt Controller */ +extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs; +/* LEON3 GP Timer */ +extern volatile struct gptimer_regs *LEON3_Timer_Regs; /* LEON3 CPU Index of boot CPU */ extern uint32_t LEON3_Cpu_Index; @@ -270,7 +272,7 @@ extern rtems_interrupt_lock LEON3_IrqCtrl_Lock; #if defined(RTEMS_MULTIPROCESSING) #define LEON3_CLOCK_INDEX \ - (rtems_configuration_get_user_multiprocessing_table() ? LEON3_Cpu_Index : 0) + (rtems_configuration_get_user_multiprocessing_table() ? LEON3_Cpu_Index : 0) #else #define LEON3_CLOCK_INDEX 0 #endif diff --git a/c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c b/c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c index 5b903eb0ec..a6b73d9f1e 100644 --- a/c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c +++ b/c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c @@ -74,7 +74,8 @@ rtems_smc91111_driver_attach_leon3 (struct rtems_bsdnet_ifconfig *config, io->dir &= ~(1 << leon_scmv91111_configuration.pio); /* Setup memory controller I/O waitstates */ - *((volatile unsigned int *) addr_mctrl) |= 0x10f80000; /* enable I/O area access */ + *((volatile unsigned int *) addr_mctrl) |= + 0x10f80000; /* enable I/O area access */ return _rtems_smc91111_driver_attach(config, &leon_scmv91111_configuration); }; diff --git a/c/src/lib/libbsp/sparc/leon3/pci/pci.c b/c/src/lib/libbsp/sparc/leon3/pci/pci.c index b36b02643c..5e95cbc2a0 100644 --- a/c/src/lib/libbsp/sparc/leon3/pci/pci.c +++ b/c/src/lib/libbsp/sparc/leon3/pci/pci.c @@ -49,27 +49,27 @@ /* allow for overriding these definitions */ #ifndef PCI_CONFIG_ADDR -#define PCI_CONFIG_ADDR 0xcf8 +#define PCI_CONFIG_ADDR 0xcf8 #endif #ifndef PCI_CONFIG_DATA -#define PCI_CONFIG_DATA 0xcfc +#define PCI_CONFIG_DATA 0xcfc #endif /* define a shortcut */ -#define pci BSP_pci_configuration +#define pci BSP_pci_configuration /* * Bit encode for PCI_CONFIG_HEADER_TYPE register */ unsigned char ucMaxPCIBus; typedef struct { - volatile unsigned int cfg_stat; - volatile unsigned int bar0; - volatile unsigned int page0; - volatile unsigned int bar1; - volatile unsigned int page1; - volatile unsigned int iomap; - volatile unsigned int stat_cmd; + volatile unsigned int cfg_stat; + volatile unsigned int bar0; + volatile unsigned int page0; + volatile unsigned int bar1; + volatile unsigned int page1; + volatile unsigned int iomap; + volatile unsigned int stat_cmd; } LEON3_GRPCI_Regs_Map; LEON3_GRPCI_Regs_Map *pcic = (LEON3_GRPCI_Regs_Map *) PCI_ADDR; @@ -83,7 +83,8 @@ struct pci_res { static inline unsigned int flip_dword (unsigned int l) { - return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) | (((l>>16)&0xff)<<8)| ((l>>24)&0xff); + return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) | + (((l>>16)&0xff)<<8)| ((l>>24)&0xff); } @@ -123,14 +124,17 @@ BSP_pci_read_config_dword( *val = 0xffffffff; } - DBG("pci_read - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), *val); + DBG("pci_read - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", + bus, slot, function, offset, + (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), *val); return PCIBIOS_SUCCESSFUL; } static int -BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short *val) { +BSP_pci_read_config_word(unsigned char bus, unsigned char slot, + unsigned char function, unsigned char offset, unsigned short *val) { uint32_t v; if (offset & 1) return PCIBIOS_BAD_REGISTER_NUMBER; @@ -143,7 +147,8 @@ BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char fu static int -BSP_pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char *val) { +BSP_pci_read_config_byte(unsigned char bus, unsigned char slot, + unsigned char function, unsigned char offset, unsigned char *val) { uint32_t v; pci_read_config_dword(bus, slot, function, offset&~3, &v); @@ -155,7 +160,8 @@ BSP_pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char fu static int -BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, uint32_t val) { +BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, + unsigned char function, unsigned char offset, uint32_t val) { volatile unsigned int *pci_conf; unsigned int value; @@ -174,14 +180,17 @@ BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char *pci_conf = value; - DBG("pci write - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), value); + DBG("pci write - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", + bus, slot, function, offset, + (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), value); return PCIBIOS_SUCCESSFUL; } static int -BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short val) { +BSP_pci_write_config_word(unsigned char bus, unsigned char slot, + unsigned char function, unsigned char offset, unsigned short val) { uint32_t v; if (offset & 1) return PCIBIOS_BAD_REGISTER_NUMBER; @@ -195,7 +204,8 @@ BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char f static int -BSP_pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char val) { +BSP_pci_write_config_byte(unsigned char bus, unsigned char slot, + unsigned char function, unsigned char offset, unsigned char val) { uint32_t v; pci_read_config_dword(bus, slot, function, offset&~3, &v); @@ -234,10 +244,14 @@ static int init_grpci(void) { #ifndef BT_ENABLED pci_write_config_dword(0,0,0,0x10, 0xffffffff); pci_read_config_dword(0,0,0,0x10, &addr); - pci_write_config_dword(0,0,0,0x10, flip_dword(0x10000000)); /* Setup bar0 to nonzero value (grpci considers BAR==0 as invalid) */ - addr = (~flip_dword(addr)+1)>>1; /* page0 is accessed through upper half of bar0 */ - pcic->cfg_stat |= 0x10000000; /* Setup mmap reg so we can reach bar0 */ - page0[addr/4] = 0; /* Disable bytetwisting ... */ + /* Setup bar0 to nonzero value (grpci considers BAR==0 as invalid) */ + pci_write_config_dword(0,0,0,0x10, flip_dword(0x10000000)); + /* page0 is accessed through upper half of bar0 */ + addr = (~flip_dword(addr)+1)>>1; + /* Setup mmap reg so we can reach bar0 */ + pcic->cfg_stat |= 0x10000000; + /* Disable bytetwisting ... */ + page0[addr/4] = 0; #endif /* set 1:1 mapping between AHB -> PCI memory */ @@ -255,7 +269,8 @@ static int init_grpci(void) { } /* DMA functions which uses GRPCIs optional DMA controller (len in words) */ -int dma_to_pci(unsigned int ahb_addr, unsigned int pci_addr, unsigned int len) { +int dma_to_pci(unsigned int ahb_addr, unsigned int pci_addr, + unsigned int len) { int ret = 0; pcidma[0] = 0x82; @@ -276,7 +291,8 @@ int dma_to_pci(unsigned int ahb_addr, unsigned int pci_addr, unsigned int len) { } -int dma_from_pci(unsigned int ahb_addr, unsigned int pci_addr, unsigned int len) { +int dma_from_pci(unsigned int ahb_addr, unsigned int pci_addr, + unsigned int len) { int ret = 0; pcidma[0] = 0x80; @@ -298,19 +314,23 @@ int dma_from_pci(unsigned int ahb_addr, unsigned int pci_addr, unsigned int len) } -void pci_mem_enable(unsigned char bus, unsigned char slot, unsigned char function) { +void pci_mem_enable(unsigned char bus, unsigned char slot, + unsigned char function) { uint32_t data; pci_read_config_dword(0, slot, function, PCI_COMMAND, &data); - pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MEMORY); + pci_write_config_dword(0, slot, function, PCI_COMMAND, + data | PCI_COMMAND_MEMORY); } -void pci_master_enable(unsigned char bus, unsigned char slot, unsigned char function) { +void pci_master_enable(unsigned char bus, unsigned char slot, + unsigned char function) { uint32_t data; pci_read_config_dword(0, slot, function, PCI_COMMAND, &data); - pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MASTER); + pci_write_config_dword(0, slot, function, PCI_COMMAND, + data | PCI_COMMAND_MASTER); } @@ -324,13 +344,13 @@ static inline void swap_res(struct pci_res **p1, struct pci_res **p2) { /* pci_allocate_resources * - * This function scans the bus and assigns PCI addresses to all devices. It handles both - * single function and multi function devices. All allocated devices are enabled and - * latency timers are set to 40. - * - * NOTE that it only allocates PCI memory space devices (that are at least 1 KB). - * IO spaces are not enabled. Also, it does not handle pci-pci bridges. They are left disabled. + * This function scans the bus and assigns PCI addresses to all devices. + * It handles both single function and multi function devices. All + * allocated devices are enabled and latency timers are set to 40. * + * NOTE that it only allocates PCI memory space devices (that are at + * least 1 KB). IO spaces are not enabled. Also, it does not handle + * pci-pci bridges. They are left disabled. * */ static void pci_allocate_resources(void) { @@ -361,7 +381,7 @@ static void pci_allocate_resources(void) { pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header); - if(header & PCI_HEADER_TYPE_MULTI_FUNCTION) { + if(header & PCI_HEADER_TYPE_MULTI_FUNCTION) { numfuncs = PCI_MAX_FUNCTIONS; } else { @@ -382,11 +402,14 @@ static void pci_allocate_resources(void) { } for (pos = 0; pos < 6; pos++) { - pci_write_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), 0xffffffff); - pci_read_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), &size); + pci_write_config_dword(0, slot, func, + PCI_BASE_ADDRESS_0 + (pos<<2), 0xffffffff); + pci_read_config_dword(0, slot, func, + PCI_BASE_ADDRESS_0 + (pos<<2), &size); if (size == 0 || size == 0xffffffff || (size & 0x3f1) != 0){ - pci_write_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), 0); + pci_write_config_dword(0, slot, func, + PCI_BASE_ADDRESS_0 + (pos<<2), 0); continue; }else { @@ -395,7 +418,8 @@ static void pci_allocate_resources(void) { res[slot*8*6+func*6+pos]->devfn = slot*8 + func; res[slot*8*6+func*6+pos]->bar = pos; - DBG("Slot: %d, function: %d, bar%d size: %x\n", slot, func, pos, ~size+1); + DBG("Slot: %d, function: %d, bar%d size: %x\n", + slot, func, pos, ~size+1); } } } @@ -430,8 +454,10 @@ static void pci_allocate_resources(void) { dev = res[i]->devfn >> 3; fn = res[i]->devfn & 7; - DBG("Assigning PCI addr %x to device %d, function %d, bar %d\n", addr, dev, fn, res[i]->bar); - pci_write_config_dword(0, dev, fn, PCI_BASE_ADDRESS_0+res[i]->bar*4, addr); + DBG("Assigning PCI addr %x to device %d, function %d, bar %d\n", + addr, dev, fn, res[i]->bar); + pci_write_config_dword(0, dev, fn, + PCI_BASE_ADDRESS_0+res[i]->bar*4, addr); addr += res[i]->size; /* Set latency timer to 64 */ @@ -452,7 +478,7 @@ done: pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header); - if(header & PCI_HEADER_TYPE_MULTI_FUNCTION) { + if(header & PCI_HEADER_TYPE_MULTI_FUNCTION) { numfuncs = PCI_MAX_FUNCTIONS; } else { @@ -469,10 +495,12 @@ done: if (id == PCI_INVALID_VENDORDEVICEID || id == 0) continue; - printk("\nSlot %d function: %d\nVendor id: 0x%x, device id: 0x%x\n", slot, func, id & 0xffff, id>>16); + printk("\nSlot %d function: %d\nVendor id: 0x%x, " + "device id: 0x%x\n", slot, func, id & 0xffff, id>>16); for (pos = 0; pos < 6; pos++) { - pci_read_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + pos*4, &tmp); + pci_read_config_dword(0, slot, func, + PCI_BASE_ADDRESS_0 + pos*4, &tmp); if (tmp != 0 && tmp != 0xffffffff && (tmp & 0x3f1) == 0) { @@ -530,7 +558,7 @@ int init_pci(void) 0, PCI_HEADER_TYPE, &ucHeader); - if(ucHeader&PCI_HEADER_TYPE_MULTI_FUNCTION) { + if(ucHeader&PCI_HEADER_TYPE_MULTI_FUNCTION) { ucNumFuncs=PCI_MAX_FUNCTIONS; } else { diff --git a/c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c b/c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c index 6129933f7d..52bc0fdee6 100644 --- a/c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c +++ b/c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c @@ -72,6 +72,7 @@ void Shm_Get_configuration( { int i; unsigned int tmp; + rtems_multiprocessing_table *mptable; BSP_shm_cfgtbl.format = SHM_BIG; @@ -97,8 +98,8 @@ void Shm_Get_configuration( if (LEON3_Cpu_Index == 0) { tmp = 0; - for (i = 1; - i < (rtems_configuration_get_user_multiprocessing_table())->maximum_nodes; i++) + mptable = rtems_configuration_get_user_multiprocessing_table(); + for (i = 1; i < mptable->maximum_nodes; i++) tmp |= (1 << i); LEON3_IrqCtrl_Regs->mpstat = tmp; } |