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authorDaniel Hellstrom <daniel@gaisler.com>2014-05-29 21:39:18 +0200
committerDaniel Hellstrom <daniel@gaisler.com>2014-10-09 13:18:01 +0200
commitfad33860ae86b78e8fedd2f8832f379e80909c83 (patch)
treeaebd4b0a47047e407256100557f38d4a0fee5702 /c/src/lib/libbsp/sparc/leon3/include/bsp.h
parentSPARC BSPs: added CPU aware interrupt ctrl operations (diff)
downloadrtems-fad33860ae86b78e8fedd2f8832f379e80909c83.tar.bz2
LEON3 SMP: support static interrupt affinity
Changed LEON3_irq-mp to const also.
Diffstat (limited to 'c/src/lib/libbsp/sparc/leon3/include/bsp.h')
-rw-r--r--c/src/lib/libbsp/sparc/leon3/include/bsp.h13
1 files changed, 12 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/sparc/leon3/include/bsp.h b/c/src/lib/libbsp/sparc/leon3/include/bsp.h
index a4a4a6f788..5cc6e026a6 100644
--- a/c/src/lib/libbsp/sparc/leon3/include/bsp.h
+++ b/c/src/lib/libbsp/sparc/leon3/include/bsp.h
@@ -220,7 +220,18 @@ extern void BSP_shared_interrupt_mask(int irq);
* to override the BSP default.
* See startup/bspsmp.c for the default value.
*/
-extern unsigned char LEON3_mp_irq;
+extern const unsigned char LEON3_mp_irq;
+
+#ifdef RTEMS_SMP
+/* Weak table used to implement static interrupt CPU affinity in a SMP
+ * configuration. The array index is the interrupt to be looked up, and
+ * the array[INTERRUPT] content is the CPU number relative to boot CPU
+ * index that will be servicing the interrupts from the IRQ source. The
+ * default is to let the first CPU (the boot cpu) to handle all
+ * interrupts (all zeros).
+ */
+extern const unsigned char LEON3_irq_to_cpu[32];
+#endif
#ifdef __cplusplus
}