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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-24 10:49:17 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-24 11:54:28 +0100 |
| commit | 562b0a014afd9b0553510ef8ae3f6900644d4c2a (patch) | |
| tree | ca0e12b9bb0bda5648331f91c7a7601592d476b5 /c/src/lib/libbsp/shared | |
| parent | arm: Fix _CPU_ISR_Is_enabled() for ARMv7-M (diff) | |
| download | rtems-562b0a014afd9b0553510ef8ae3f6900644d4c2a.tar.bz2 | |
bsps/arm: Add Cortex-M DWT CPU counter
Diffstat (limited to 'c/src/lib/libbsp/shared')
| -rw-r--r-- | c/src/lib/libbsp/shared/include/fatal.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/shared/include/fatal.h b/c/src/lib/libbsp/shared/include/fatal.h index 8220a732f0..fdb7797650 100644 --- a/c/src/lib/libbsp/shared/include/fatal.h +++ b/c/src/lib/libbsp/shared/include/fatal.h @@ -49,6 +49,7 @@ typedef enum { BSP_ARM_PL111_FATAL_SEM_CREATE, BSP_ARM_PL111_FATAL_SEM_RELEASE, BSP_ARM_A9MPCORE_FATAL_CLOCK_SMP_INIT, + BSP_ARM_ARMV7M_CPU_COUNTER_INIT, /* LEON3 fatal codes */ LEON3_FATAL_NO_IRQMP_CONTROLLER = BSP_FATAL_CODE_BLOCK(2), |