2000-11-27 Joel Sherrill <joel@OARcorp.com>

	* The shsim is for the SH simulator in gdb. It should be able
	to be used with multiple SH CPU models.
	* .cvsignore, ChangeLog, Makefile.am, README, bsp_specs,
	configure.in, clock/.cvsignore, clock/Makefile.am,
	clock/clockdrv.c, console/.cvsignore, console/Makefile.am,
	console/console-io.c, console/console-support.S,
	include/.cvsignore, include/Makefile.am, include/bsp.h,
	start/.cvsignore, start/Makefile.am, start/regs.S,
	start/start.S, startup/.cvsignore, startup/Makefile.am,
	startup/bspstart.c, startup/linkcmds, wrapup/.cvsignore,
	wrapup/Makefile.am: New files.

4 files changed, 362 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/sh/shsim/startup/.cvsignore b/c/src/lib/libbsp/sh/shsim/startup/.cvsignore
new file mode 100644
index 0000000000..282522db03
--- /dev/null
+++ b/c/src/lib/libbsp/sh/shsim/startup/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/c/src/lib/libbsp/sh/shsim/startup/Makefile.am b/c/src/lib/libbsp/sh/shsim/startup/Makefile.am
new file mode 100644
index 0000000000..4dd270fbea
--- /dev/null
+++ b/c/src/lib/libbsp/sh/shsim/startup/Makefile.am
@@ -0,0 +1,40 @@
+##
+## $Id$
+##
+
+AUTOMAKE_OPTIONS = foreign 1.4
+
+VPATH = @srcdir@:@srcdir@/../../../shared
+
+PGM = $(ARCH)/startup.rel
+
+C_FILES = bspclean.c bsplibc.c bsppost.c bspstart.c bootcard.c main.c sbrk.c \
+    gnatinstallhandler.c
+C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
+
+OBJS = $(C_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(top_srcdir)/../../../../../../automake/compile.am
+include $(top_srcdir)/../../../../../../automake/lib.am
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+$(PGM): $(OBJS)
+	$(make-rel)
+
+$(PROJECT_RELEASE)/lib/linkcmds: linkcmds
+	$(INSTALL_DATA) $< $@
+
+# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
+TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/linkcmds
+
+all-local: $(ARCH) $(OBJS) $(PGM) $(TMPINSTALL_FILES)
+
+.PRECIOUS: $(PGM)
+
+EXTRA_DIST = bspclean.c bspstart.c exit.c linkcmds setvec.c
+
+include $(top_srcdir)/../../../../../../automake/local.am
diff --git a/c/src/lib/libbsp/sh/shsim/startup/bspstart.c b/c/src/lib/libbsp/sh/shsim/startup/bspstart.c
new file mode 100644
index 0000000000..1143386ada
--- /dev/null
+++ b/c/src/lib/libbsp/sh/shsim/startup/bspstart.c
@@ -0,0 +1,117 @@
+/*
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *
+ *  COPYRIGHT (c) 1989-2000.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include <string.h>
+
+#include <bsp.h>
+#include <rtems/libio.h>
+#include <rtems/libcsupport.h>
+
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+
+extern rtems_configuration_table Configuration;
+
+rtems_configuration_table  BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+
+char *rtems_progname;
+
+/*
+ *  Use the shared implementations of the following routines
+ */
+ 
+void bsp_postdriver_hook(void);
+void bsp_libc_init( void *, unsigned32, int );
+
+/*
+ *  Function:   bsp_pretasking_hook
+ *  Created:    95/03/10
+ *
+ *  Description:
+ *      BSP pretasking hook.  Called just before drivers are initialized.
+ *      Used to setup libc and install any BSP extensions.
+ *
+ *  NOTES:
+ *      Must not use libc (to do io) from here, since drivers are
+ *      not yet initialized.
+ *
+ */
+ 
+void bsp_pretasking_hook(void)
+{
+    extern int HeapBase;
+    extern int HeapSize;
+    void         *heapStart = &HeapBase;
+    unsigned long heapSize = (unsigned long)&HeapSize;
+    unsigned long ramSpace;
+
+    bsp_libc_init(heapStart, (unsigned32) heapSize, 0);
+
+#ifdef RTEMS_DEBUG
+    rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
+#endif
+
+}
+ 
+/*
+ *  bsp_start
+ *
+ *  This routine does the bulk of the system initialization.
+ */
+
+void bsp_start( void )
+{
+  extern int _end;
+  extern int WorkspaceBase;
+  /* Configure Number of Register Caches */
+
+  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
+  Cpu_table.postdriver_hook = bsp_postdriver_hook;
+  Cpu_table.interrupt_stack_size = 4096;
+
+  if ( BSP_Configuration.work_space_size >(512*1024) )
+   _sys_exit( 1 );
+
+  BSP_Configuration.work_space_start = (void *) &WorkspaceBase;
+}
+
+/* XXX */
+void clear_cache( void *address, size_t n )
+{
+}
+
+/* Structure filled in by get_mem_info.  Only the size field is
+   actually used (to clear bss), so the others aren't even filled in.  */
+
+struct s_mem
+{
+  unsigned int size;
+  unsigned int icsize;
+  unsigned int dcsize;
+};
+
+
+void
+get_mem_info (mem)
+     struct s_mem *mem;
+{
+  mem->size = 0x1000000;        /* XXX figure out something here */
+}
+
diff --git a/c/src/lib/libbsp/sh/shsim/startup/linkcmds b/c/src/lib/libbsp/sh/shsim/startup/linkcmds
new file mode 100644
index 0000000000..a0a099f4ee
--- /dev/null
+++ b/c/src/lib/libbsp/sh/shsim/startup/linkcmds
@@ -0,0 +1,203 @@
+/*
+ * This is an adapted linker script from egcs-1.0.1 
+ *
+ * Memory layout for an SH 7032 with main memory in area 2
+ * This memory layout it very similar to that used for Hitachi's
+ * EVB with CMON in rom
+ *
+ * NOTE: The ram start address may vary, all other start addresses are fixed
+ *       Not suiteable for gdb's simulator
+ *
+ *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
+ *           Bernd Becker (becker@faw.uni-ulm.de)
+ *
+ *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *
+ *  COPYRIGHT (c) 1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+OUTPUT_FORMAT("coff-sh")
+OUTPUT_ARCH(sh)
+ENTRY(_start)
+
+MEMORY
+{
+  rom           : o = 0x00000000, l = 128k
+  onchip_peri	: o = 0x05000000, l = 512
+  ram           : o = 0x0A040000, l = 256k
+
+  onchip_ram    : o = 0x0f000000, l = 8k
+}
+
+SECTIONS
+{
+  /* boot vector table */
+  .monvects 0x00000000 (NOLOAD): {
+    _monvects = . ;
+  } > rom
+
+  /* monitor play area */
+  .monram 0x0A040000 (NOLOAD) : 
+  {
+  _ramstart = .;
+  } > ram 
+
+  /* monitor vector table */
+  .vects   0x0A042000 (NOLOAD) : {
+    _vectab = . ;
+    *(.vects);
+  }
+
+  /* Read-only sections, merged into text segment: */
+
+  . = 0x0a044000 ;
+  .interp        : { *(.interp) 	}
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .gnu.version   : { *(.gnu.version)	}
+  .gnu.version_d : { *(.gnu.version_d)	}
+  .gnu.version_r : { *(.gnu.version_r)	}
+  .rel.text      :
+    { *(.rel.text) *(.rel.gnu.linkonce.t*) }
+  .rela.text     :
+    { *(.rela.text) *(.rela.gnu.linkonce.t*) }
+  .rel.data      :
+    { *(.rel.data) *(.rel.gnu.linkonce.d*) }
+  .rela.data     :
+    { *(.rela.data) *(.rela.gnu.linkonce.d*) }
+  .rel.rodata    :
+    { *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
+  .rela.rodata   :
+    { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.init      : { *(.rel.init)	}
+  .rela.init     : { *(.rela.init)	}
+  .rel.fini      : { *(.rel.fini)	}
+  .rela.fini     : { *(.rela.fini)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	} =0
+  .plt      	 : { *(.plt)	}
+  .text   .   	 :
+  {
+    *(.text)
+    *(.stub)
+    /* .gnu.warning sections are handled specially by elf32.em.  */
+    *(.gnu.warning)
+    *(.gnu.linkonce.t*)
+  } > ram
+  _etext = .;
+  PROVIDE (etext = .);
+  .fini    .  : { *(.fini)    } =0
+  .rodata  .  : { *(.rodata) *(.gnu.linkonce.r*) }
+  .rodata1 .  : { *(.rodata1) }
+  /* Adjust the address for the data segment.  We want to adjust up to
+     the same address within the page on the next page up.  */
+  . = ALIGN(128) + (. & (128 - 1));
+  .data  .  :
+  {
+    *(.data)
+    *(.gnu.linkonce.d*)
+    CONSTRUCTORS
+  } > ram
+  .data1  . : { *(.data1) }
+  .ctors  .       :
+  {
+    ___ctors = .;
+    *(.ctors)
+    ___ctors_end = .;
+  }
+  .dtors  .       :
+  {
+    ___dtors = .;
+    *(.dtors)
+    ___dtors_end = .;
+  }
+  .got     .      : { *(.got.plt) *(.got) }
+  .dynamic .      : { *(.dynamic) }
+  /* We want the small data sections together, so single-instruction offsets
+     can access them all, and initialized data all before uninitialized, so
+     we can shorten the on-disk segment size.  */
+  .sdata   .  : { *(.sdata) }
+  _edata  =  .;
+  PROVIDE (edata = .);
+  __bss_start = .;
+  .sbss    .  : { *(.sbss) *(.scommon) }
+  .bss     .  :
+  {
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  } > ram
+  _end = . ;
+  PROVIDE (end = .);
+
+  _HeapBase = . ;
+  . = . + 1024 * 20 ;
+  PROVIDE( _HeapEnd = . );
+
+  _WorkSpaceBase = . ;
+  . = 0x0a080000 ;
+  PROVIDE(_WorkSpaceEnd = .);
+
+  _CPU_Interrupt_stack_low  = 0x0f000000 ;
+  _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ;
+
+  /* Stabs debugging sections.  */
+  .stab 0 : { *(.stab) }
+  .stabstr 0 : { *(.stabstr) }
+  .stab.excl 0 : { *(.stab.excl) }
+  .stab.exclstr 0 : { *(.stab.exclstr) }
+  .stab.index 0 : { *(.stab.index) }
+  .stab.indexstr 0 : { *(.stab.indexstr) }
+  .comment 0 : { *(.comment) }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+
+  .stack 0x0f001ff0 : { _stack = .; *(.stack) } > onchip_ram
+  /* These must appear regardless of  .  */
+}