Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step.  It
copied header files from arbitrary locations into the build tree.  The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

* The make preinstall step itself needs time and disk space.

* Errors in header files show up in the build tree copy.  This makes it
  hard for editors to open the right file to fix the error.

* There is no clear relationship between source and build tree header
  files.  This makes an audit of the build process difficult.

* The visibility of all header files in the build tree makes it
  difficult to enforce API barriers.  For example it is discouraged to
  use BSP-specifics in the cpukit.

* An introduction of a new build system is difficult.

* Include paths specified by the -B option are system headers.  This
  may suppress warnings.

* The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step.   All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc.  Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

* cpukit/include

* cpukit/score/cpu/@RTEMS_CPU@/include

* cpukit/libnetworking

The new BSP include directories are:

* bsps/include

* bsps/@RTEMS_CPU@/include

* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed.  The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

13 files changed, 8 insertions, 1275 deletions

diff --git a/c/src/lib/libbsp/sh/gensh2/Makefile.am b/c/src/lib/libbsp/sh/gensh2/Makefile.am
index 57f0ab7b3b..131ee3f58c 100644
--- a/c/src/lib/libbsp/sh/gensh2/Makefile.am
+++ b/c/src/lib/libbsp/sh/gensh2/Makefile.am
@@ -4,26 +4,8 @@ EXTRA_DIST =
 include $(top_srcdir)/../../../../automake/compile.am
 include $(top_srcdir)/../../bsp.am
 
-include_shdir = $(includedir)/sh
-include_rtems_scoredir = $(includedir)/rtems/score
-include_bspdir = $(includedir)/bsp
+dist_project_lib_DATA = startup/bsp_specs
 
-dist_project_lib_DATA = bsp_specs
-
-include_HEADERS = include/bsp.h
-include_HEADERS += include/tm27.h
-
-include_sh_HEADERS = include/sh/io_types.h
-include_sh_HEADERS += include/sh/sci.h
-include_sh_HEADERS += include/sh/sh7_pfc.h
-include_sh_HEADERS += include/sh/sh7_sci.h
-include_sh_HEADERS += include/sh/sci_termios.h
-
-include_rtems_score_HEADERS = include/rtems/score/ispsh7045.h
-include_rtems_score_HEADERS += include/rtems/score/iosh7045.h
-
-nodist_include_HEADERS = include/bspopts.h
-nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
 DISTCLEANFILES = include/bspopts.h
 
 
@@ -33,8 +15,9 @@ start.$(OBJEXT): start/start.S
 	$(CPPASCOMPILE) -o $@ -c $<
 project_lib_DATA = start.$(OBJEXT)
 
-dist_project_lib_DATA += startup/linkcmds startup/linkcmds.ram \
-    startup/linkcmds.rom
+project_lib_DATA += linkcmds
+dist_project_lib_DATA += startup/linkcmds.ram
+dist_project_lib_DATA += startup/linkcmds.rom
 
 noinst_LIBRARIES = libbsp.a
 libbsp_a_SOURCES =
@@ -72,5 +55,5 @@ libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
 libbsp_a_SOURCES += ../../shared/include/cache_.h
 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
 
-include $(srcdir)/preinstall.am
 include $(top_srcdir)/../../../../automake/local.am
+include $(srcdir)/../../../../../../bsps/sh/gensh2/headers.am
diff --git a/c/src/lib/libbsp/sh/gensh2/configure.ac b/c/src/lib/libbsp/sh/gensh2/configure.ac
index 4fdd7e5717..2d6f3492fa 100644
--- a/c/src/lib/libbsp/sh/gensh2/configure.ac
+++ b/c/src/lib/libbsp/sh/gensh2/configure.ac
@@ -4,6 +4,9 @@ AC_PREREQ([2.69])
 AC_INIT([rtems-c-src-lib-libbsp-sh-gensh2],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
 AC_CONFIG_SRCDIR([make/custom/gensh2.cfg])
 RTEMS_TOP(../../../../../..)
+RTEMS_SOURCE_TOP
+RTEMS_BUILD_TOP
+RTEMS_BSP_LINKCMDS
 
 RTEMS_CANONICAL_TARGET_CPU
 AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2])
diff --git a/c/src/lib/libbsp/sh/gensh2/include/bsp.h b/c/src/lib/libbsp/sh/gensh2/include/bsp.h
deleted file mode 100644
index 221137ad81..0000000000
--- a/c/src/lib/libbsp/sh/gensh2/include/bsp.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- *  generic sh2
- *
- *  This include file contains all board IO definitions.
- */
-
-/*
- *  Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de)
- *
- *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- *  COPYRIGHT (c) 1998.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- *
- *  Minor adaptations for sh2 by:
- *  John M. Mills (jmills@tga.com)
- *  TGA Technologies, Inc.
- *  100 Pinnacle Way, Suite 140
- *  Norcross, GA 30071 U.S.A.
- *
- *  This modified file may be copied and distributed in accordance
- *  the above-referenced license. It is provided for critique and
- *  developmental purposes without any warranty nor representation
- *  by the authors or by TGA Technologies.
- */
-
-#ifndef LIBBSP_SH_GENSH2_BSP_H
-#define LIBBSP_SH_GENSH2_BSP_H
-
-#include <rtems.h>
-
-#include <bspopts.h>
-#include <bsp/default-initial-extension.h>
-
-#include <termios.h> /* for tcflag_t */
-
-#include <sh/sci.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#if 1
-/* FIXME:
- *   These definitions will be no longer necessary if the old
- *   implementation of SCI driver will be droped
- */
-#define BSP_CONSOLE_DEVNAME "/dev/sci0"
-#define BSP_CONSOLE_MINOR_NUMBER ((rtems_device_minor_number) 0)
-#define BSP_CONSOLE_DRIVER_TABLE_ENTRY DEVSCI_DRIVER_TABLE_ENTRY
-#define BSP_CONSOLE_DEVICE_TERMIOS_HANDLERS (sh_sci_get_termios_handlers(TRUE))
-#endif
-
-/* Constants */
-
-/*
- * Defined in the linker script 'linkcmds'
- */
-extern void *CPU_Interrupt_stack_low;
-extern void *CPU_Interrupt_stack_high;
-
-/*
- * BSP methods that cross file boundaries.
- */
-void bsp_hw_init(void);
-extern int _sci_get_brparms(
-  tcflag_t      cflag,
-  unsigned char *smr,
-  unsigned char *brr
-);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/c/src/lib/libbsp/sh/gensh2/include/rtems/score/iosh7045.h b/c/src/lib/libbsp/sh/gensh2/include/rtems/score/iosh7045.h
deleted file mode 100644
index db3252b72d..0000000000
--- a/c/src/lib/libbsp/sh/gensh2/include/rtems/score/iosh7045.h
+++ /dev/null
@@ -1,322 +0,0 @@
-/*
- *  This include file contains information pertaining to the Hitachi SH
- *  processor.
- *
- *  NOTE: NOT ALL VALUES HAVE BEEN CHECKED !!
- *
- *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
- *           Bernd Becker (becker@faw.uni-ulm.de)
- *
- *  Based on "iosh7030.h" distributed with Hitachi's EVB's tutorials, which
- *  contained no copyright notice.
- *
- *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- *  COPYRIGHT (c) 1998.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- *
- *	Modified to reflect on-chip registers for sh7045 processor, based on
- *	"Register.h" distributed with Hitachi's EVB7045F tutorials, and which
- *  contained no copyright notice:
- *	John M. Mills (jmills@tga.com)
- *	TGA Technologies, Inc.
- *  100 Pinnacle Way, Suite 140
- *	Norcross, GA 30071 U.S.A.
- *	August, 1999
- *
- *	This modified file may be copied and distributed in accordance
- *	the above-referenced license. It is provided for critique and
- *	developmental purposes without any warranty nor representation
- *	by the authors or by TGA Technologies.
- */
-
-#ifndef __IOSH7045_H
-#define __IOSH7045_H
-
-/*
- * After each line is explained whether the access is char short or long.
- * The functions read/writeb, w, l, 8, 16, 32 can be found
- * in exec/score/cpu/sh/sh_io.h
- *
- * 8 bit  == char     ( readb, writeb, read8, write8)
- * 16 bit == short    ( readw, writew, read16, write16 )
- * 32 bit == long     ( readl, writel, read32, write32 )
- * JMM: Addresses noted "[char, ]short,word" are per Hitachi _SuperH_RISC_
- *      ENGINE_..Hardware_Manual; alignment access-restrictions may apply
- */
-
-#define REG_BASE    0xFFFF8000
-
-/* SCI0 Registers */
-#define SCI_SMR0   (REG_BASE + 0x01a0) /*char: Serial mode     ch 0 */
-#define SCI_BRR0   (REG_BASE + 0x01a1) /*char: Bit rate        ch 0 */
-#define SCI_SCR0   (REG_BASE + 0x01a2) /*char: Serial control  ch 0 */
-#define SCI_TDR0   (REG_BASE + 0x01a3) /*char: Transmit data   ch 0 */
-#define SCI_SSR0   (REG_BASE + 0x01a4) /*char: Serial status   ch 0 */
-#define SCI_RDR0   (REG_BASE + 0x01a5) /*char: Receive data    ch 0 */
-
-#define SCI0_SMR   SCI_SMR0
-
-/* SCI1 Registers */
-#define SCI_SMR1   (REG_BASE + 0x01b0) /* char: Serial mode     ch 1 */
-#define SCI_BRR1   (REG_BASE + 0x01b1) /* char: Bit rate        ch 1 */
-#define SCI_SCR1   (REG_BASE + 0x01b2) /* char: Serial control  ch 1 */
-#define SCI_TDR1   (REG_BASE + 0x01b3) /* char: Transmit data   ch 1 */
-#define SCI_SSR1   (REG_BASE + 0x01b4) /* char: Serial status   ch 1 */
-#define SCI_RDR1   (REG_BASE + 0x01b5) /* char: Receive data    ch 1 */
-
-#define SCI1_SMR   SCI_SMR1
-
-/* ADI */
-/* High Speed A/D (Excluding A-Mask Part)*/
-#define ADDRA	   (REG_BASE + 0x03F0) /* short */
-#define ADDRB	   (REG_BASE + 0x03F2) /* short */
-#define ADDRC	   (REG_BASE + 0x03F4) /* short */
-#define ADDRD	   (REG_BASE + 0x03F6) /* short */
-#define ADDRE	   (REG_BASE + 0x03F8) /* short */
-#define ADDRF	   (REG_BASE + 0x03FA) /* short */
-#define ADDRG	   (REG_BASE + 0x03FC) /* short */
-#define ADDRH	   (REG_BASE + 0x03FE) /* short */
-#define ADCSR	   (REG_BASE + 0x03E0) /* char  */
-#define ADCR	   (REG_BASE + 0x03E1) /* char  */
-
-/* Mid-Speed A/D (A-Mask part)*/
-#define ADDRA0	   (REG_BASE + 0x0400) /* char, short */
-#define ADDRA0H	   (REG_BASE + 0x0400) /* char, short */
-#define ADDRA0L    (REG_BASE + 0x0401) /* char  */
-#define ADDRB0	   (REG_BASE + 0x0402) /* char, short */
-#define ADDRB0H	   (REG_BASE + 0x0402) /* char, short */
-#define ADDRB0L	   (REG_BASE + 0x0403) /* char  */
-#define ADDRC0	   (REG_BASE + 0x0404) /* char, short */
-#define ADDRC0H	   (REG_BASE + 0x0404) /* char, short */
-#define ADDRC0L	   (REG_BASE + 0x0405) /* char  */
-#define ADDRD0	   (REG_BASE + 0x0406) /* char, short */
-#define ADDRD0H	   (REG_BASE + 0x0406) /* char, short  */
-#define ADDRD0L	   (REG_BASE + 0x0407) /* char  */
-#define ADCSR0	   (REG_BASE + 0x0410) /* char  */
-#define ADCR0	   (REG_BASE + 0x0412) /* char  */
-#define ADDRA1	   (REG_BASE + 0x0408) /* char, short */
-#define ADDRA1H	   (REG_BASE + 0x0408) /* char, short */
-#define ADDRA1L	   (REG_BASE + 0x0409) /* char  */
-#define ADDRB1	   (REG_BASE + 0x040A) /* char, short */
-#define ADDRB1H	   (REG_BASE + 0x040A) /* char, short */
-#define ADDRB1L	   (REG_BASE + 0x040B) /* char  */
-#define ADDRC1	   (REG_BASE + 0x040C) /* char, short */
-#define ADDRC1H	   (REG_BASE + 0x040C) /* char, short */
-#define ADDRC1L	   (REG_BASE + 0x040D) /* char  */
-#define ADDRD1	   (REG_BASE + 0x040E) /* char, short */
-#define ADDRD1H	   (REG_BASE + 0x040E) /* char, short  */
-#define ADDRD1L	   (REG_BASE + 0x040F) /* char  */
-#define ADCSR1	   (REG_BASE + 0x0411) /* char  */
-#define ADCR1	   (REG_BASE + 0x0413) /* char  */
-
-/*MTU SHARED*/
-#define MTU_TSTR   (REG_BASE + 0x0240) /* char, short, word  */
-#define MTU_TSYR   (REG_BASE + 0x0241) /* char, short, word  */
-#define MTU_ICSR   (REG_BASE + 0x03C0) /* input lev. CSR */
-#define MTU_OCSR   (REG_BASE + 0x03C0) /* output lev. CSR */
-
-/*MTU CHANNEL 0*/
-#define MTU_TCR0   (REG_BASE + 0x0260) /* char, short, word  */
-#define MTU_TMDR0  (REG_BASE + 0x0261) /* char, short, word  */
-#define MTU_TIORH0 (REG_BASE + 0x0262) /* char, short, word  */
-#define MTU_TIORL0 (REG_BASE + 0x0263) /* char, short, word  */
-#define MTU_TIER0  (REG_BASE + 0x0264) /* char, short, word  */
-#define MTU_TSR0   (REG_BASE + 0x0265) /* char, short, word  */
-#define MTU_TCNT0  (REG_BASE + 0x0266) /* short, word */
-#define MTU_GR0A   (REG_BASE + 0x0268) /* short, word */
-#define MTU_GR0B   (REG_BASE + 0x026A) /* short, word */
-#define MTU_GR0C   (REG_BASE + 0x026C) /* short, word */
-#define MTU_GR0D   (REG_BASE + 0x026E) /* short, word */
-
-/*MTU CHANNEL 1*/
-#define MTU_TCR1   (REG_BASE + 0x0280) /* char, short, word  */
-#define MTU_TMDR1  (REG_BASE + 0x0281) /* char, short, word  */
-#define MTU_TIOR1  (REG_BASE + 0x0282) /* char, short, word  */
-#define MTU_TIER1  (REG_BASE + 0x0284) /* char, short, word  */
-#define MTU_TSR1   (REG_BASE + 0x0285) /* char, short, word  */
-#define MTU_TCNT1  (REG_BASE + 0x0286) /* short, word */
-#define MTU_GR1A   (REG_BASE + 0x0288) /* short, word */
-#define MTU_GR1B   (REG_BASE + 0x028A) /* short, word */
-
-/*MTU CHANNEL 2*/
-#define MTU_TCR2   (REG_BASE + 0x02A0) /* char, short, word  */
-#define MTU_TMDR2  (REG_BASE + 0x02A1) /* char, short, word  */
-#define MTU_TIOR2  (REG_BASE + 0x02A2) /* char, short, word  */
-#define MTU_TIER2  (REG_BASE + 0x02A4) /* char, short, word  */
-#define MTU_TSR2   (REG_BASE + 0x02A5) /* char, short, word  */
-#define MTU_TCNT2  (REG_BASE + 0x02A6) /* short, word */
-#define MTU_GR2A   (REG_BASE + 0x02A8) /* short, word */
-#define MTU_GR2B   (REG_BASE + 0x02AA) /* short, word */
-
-/*MTU CHANNELS 3-4 SHARED*/
-#define MTU_TOER   (REG_BASE + 0x020A) /* char, short, word  */
-#define MTU_TOCR   (REG_BASE + 0x020B) /* char, short, word  */
-#define MTU_TGCR   (REG_BASE + 0x020D) /* char, short, word  */
-#define MTU_TCDR   (REG_BASE + 0x0214) /* short, word  */
-#define MTU_TDDR   (REG_BASE + 0x0216) /* short, word  */
-#define MTU_TCNTS  (REG_BASE + 0x0220) /* short, word  */
-#define MTU_TCBR   (REG_BASE + 0x0222) /* short, word  */
-
-/*MTU CHANNEL 3*/
-#define MTU_TCR3   (REG_BASE + 0x0200) /* char, short, word  */
-#define MTU_TMDR3  (REG_BASE + 0x0202) /* char, short, word  */
-#define MTU_TIORH3 (REG_BASE + 0x0204) /* char, short, word  */
-#define MTU_TIORL3 (REG_BASE + 0x0205) /* char, short, word  */
-#define MTU_TIER3  (REG_BASE + 0x0208) /* char, short, word  */
-#define MTU_TSR3   (REG_BASE + 0x022C) /* char, short, word  */
-#define MTU_TCNT3  (REG_BASE + 0x0210) /* short, word */
-#define MTU_GR3A   (REG_BASE + 0x0218) /* short, word */
-#define MTU_GR3B   (REG_BASE + 0x021A) /* short, word */
-#define MTU_GR3C   (REG_BASE + 0x0224) /* short, word */
-#define MTU_GR3D   (REG_BASE + 0x0226) /* short, word */
-
-/*MTU CHANNEL 4*/
-#define MTU_TCR4   (REG_BASE + 0x0201) /* char, short, word  */
-#define MTU_TMDR4  (REG_BASE + 0x0203) /* char, short, word  */
-#define MTU_TIOR4  (REG_BASE + 0x0206) /* char, short, word  */
-#define MTU_TIORH4 (REG_BASE + 0x0206) /* char, short, word  */
-#define MTU_TIORL4 (REG_BASE + 0x0207) /* char, short, word  */
-#define MTU_TIER4  (REG_BASE + 0x0209) /* char, short, word  */
-#define MTU_TSR4   (REG_BASE + 0x022D) /* char, short, word  */
-#define MTU_TCNT4  (REG_BASE + 0x0212) /* short, word */
-#define MTU_GR4A   (REG_BASE + 0x021C) /* short, word */
-#define MTU_GR4B   (REG_BASE + 0x021E) /* short, word */
-#define MTU_GR4C   (REG_BASE + 0x0228) /* short, word */
-#define MTU_GR4D   (REG_BASE + 0x022A) /* short, word */
-
-/*DMAC CHANNELS 0-3 SHARED*/
-#define DMAOR      (REG_BASE + 0x06B0) /* short */
-
-/*DMAC CHANNEL 0*/
-#define DMA_SAR0    (REG_BASE + 0x06C0) /* short, word */
-#define DMA_DAR0    (REG_BASE + 0x06C4) /* short, word */
-#define DMA_DMATCR0 (REG_BASE + 0x06C8) /* short, word */
-#define DMA_CHCR0   (REG_BASE + 0x06CC) /* short, word */
-
-/*DMAC CHANNEL 1*/
-#define DMA_SAR1    (REG_BASE + 0x06D0) /* short, word */
-#define DMA_DAR1    (REG_BASE + 0x06D4) /* short, word */
-#define DMA_DMATCR1 (REG_BASE + 0x06D8) /* short, wordt */
-#define DMA_CHCR1   (REG_BASE + 0x06DC) /* short, word */
-
-/*DMAC CHANNEL 3*/
-#define DMA_SAR3    (REG_BASE + 0x06E0) /* short, word */
-#define DMA_DAR3    (REG_BASE + 0x06E4) /* short, word */
-#define DMA_DMATCR3 (REG_BASE + 0x06E8) /* short, word */
-#define DMA_CHCR3   (REG_BASE + 0x06EC) /* short, word */
-
-/*DMAC CHANNEL 4*/
-#define DMA_SAR4    (REG_BASE + 0x06F0) /* short, word */
-#define DMA_DAR4    (REG_BASE + 0x06F4) /* short, word */
-#define DMA_DMATCR4 (REG_BASE + 0x06F8) /* short, word */
-#define DMA_CHCR4   (REG_BASE + 0x06FC) /* short, word */
-
-/*Data Transfer Controller*/
-#define DTC_DTEA   (REG_BASE + 0x0700) /* char, short, word */
-#define DTC_DTEB   (REG_BASE + 0x0701) /* char, short(?), word(?) */
-#define DTC_DTEC   (REG_BASE + 0x0702) /* char, short(?), word(?) */
-#define DTC_DTED   (REG_BASE + 0x0703) /* char, short(?), word(?) */
-#define DTC_DTEE   (REG_BASE + 0x0704) /* char, short(?), word(?) */
-#define DTC_DTCSR  (REG_BASE + 0x0706) /* char, short, word */
-#define DTC_DTBR   (REG_BASE + 0x0708) /* short, word */
-
-/*Cache Memory*/
-#define CAC_CCR	   (REG_BASE + 0x0740) /* char, short, word */
-
-/*INTC*/
-#define INTC_IPRA  (REG_BASE + 0x0348) /* char, short, word */
-#define INTC_IPRB  (REG_BASE + 0x034A) /* char, short, word */
-#define INTC_IPRC  (REG_BASE + 0x034C) /* char, short, word */
-#define INTC_IPRD  (REG_BASE + 0x034E) /* char, short, word */
-#define INTC_IPRE  (REG_BASE + 0x0350) /* char, short, word */
-#define INTC_IPRF  (REG_BASE + 0x0352) /* char, short, word */
-#define INTC_IPRG  (REG_BASE + 0x0354) /* char, short, word */
-#define INTC_IPRH  (REG_BASE + 0x0356) /* char, short, word */
-#define INTC_ICR   (REG_BASE + 0x0358) /* char, short, word */
-#define INTC_ISR   (REG_BASE + 0x035A) /* char, short, word */
-
-/*Flash (F-ZTAT)*/
-#define FL_FLMCR1  (REG_BASE + 0x0580) /* Fl.Mem.Contr.Reg 1: char */
-#define FL_FLMCR2  (REG_BASE + 0x0581) /* Fl.Mem.Contr.Reg 2: char */
-#define FL_EBR1	   (REG_BASE + 0x0582) /* Fl.Mem.Erase Blk.1: char */
-#define FL_EBR2	   (REG_BASE + 0x0584) /* Fl.Mem.Erase Blk.2: char */
-#define FL_RAMER   (REG_BASE + 0x0628) /* Ram Emul.Reg.- char,short,word */
-
-/*UBC*/
-#define UBC_BARH   (REG_BASE + 0x0600) /* char, short, word  */
-#define UBC_BARL   (REG_BASE + 0x0602) /* char, short, word  */
-#define UBC_BAMRH  (REG_BASE + 0x0604) /* char, short, word  */
-#define UBC_BAMRL  (REG_BASE + 0x0606) /* char, short, word  */
-#define UBC_BBR    (REG_BASE + 0x0608) /* char, short, word  */
-/*BSC*/
-#define BSC_BCR1   (REG_BASE + 0x0620) /* short */
-#define BSC_BCR2   (REG_BASE + 0x0622) /* short */
-#define BSC_WCR1   (REG_BASE + 0x0624) /* short */
-#define BSC_WCR2   (REG_BASE + 0x0626) /* short */
-#define BSC_DCR    (REG_BASE + 0x062A) /* short */
-#define BSC_RTCSR  (REG_BASE + 0x062C) /* short */
-#define BSC_RTCNT  (REG_BASE + 0x062E) /* short */
-#define BSC_RTCOR  (REG_BASE + 0x0630) /* short */
-
-/*WDT*/
-#define WDT_R_TCSR   (REG_BASE + 0x0610) /* rd: char */
-#define WDT_R_TCNT   (REG_BASE + 0x0611) /* rd: char */
-#define WDT_R_RSTCSR (REG_BASE + 0x0613) /* rd: char */
-#define WDT_W_TCSR   (REG_BASE + 0x0610) /* wrt: short */
-#define WDT_W_TCNT   (REG_BASE + 0x0610) /* wrt: short */
-#define WDT_W_RSTCSR (REG_BASE + 0x0612) /* wrt: short */
-
-/*POWER DOWN STATE*/
-#define PDT_SBYCR  (REG_BASE + 0x0614) /* char  */
-
-/* Port I/O  Control Registers */
-#define IO_PADRH   (REG_BASE + 0x0380) /* Port A Data Register */
-#define IO_PADRL   (REG_BASE + 0x0382) /* Port A Data Register */
-#define IO_PBDR    (REG_BASE + 0x0390) /* Port B Data Register */
-#define IO_PCDR    (REG_BASE + 0x0392) /* Port C Data Register */
-#define IO_PDDRH   (REG_BASE + 0x03A0) /* Port D Data Register */
-#define IO_PDDRL   (REG_BASE + 0x03A2) /* Port D Data Register */
-#define IO_PEDR    (REG_BASE + 0x03B0) /* Port E Data Register */
-#define IO_PFDR    (REG_BASE + 0x03B2) /* Port F Data Register */
-
-/*Pin Function Control Register*/
-#define PFC_PAIORH (REG_BASE + 0x0384) /* Port A I/O Reg. H */
-#define PFC_PAIORL (REG_BASE + 0x0386) /* Port A I/O Reg. L */
-#define PFC_PACRH  (REG_BASE + 0x0388) /* Port A Ctr. Reg. H  */
-#define PFC_PACRL1 (REG_BASE + 0x038C) /* Port A Ctr. Reg. L1 */
-#define PFC_PACRL2 (REG_BASE + 0x038E) /* Port A Ctr. Reg. L2 */
-#define PFC_PBIOR  (REG_BASE + 0x0394) /* Port B I/O Register */
-#define PFC_PBCR1  (REG_BASE + 0x0398) /* Port B Ctr. Reg. R1 */
-#define PFC_PBCR2  (REG_BASE + 0x039A) /* Port B Ctr. Reg. R2 */
-#define PFC_PCIOR  (REG_BASE + 0x0396) /* Port C I/O Register */
-#define PFC_PCCR   (REG_BASE + 0x039C) /* Port C Ctr. Reg. */
-#define PFC_PDIORH (REG_BASE + 0x03A4) /* Port D I/O Reg. H */
-#define PFC_PDIORL (REG_BASE + 0x03A6) /* Port D I/O Reg. L */
-#define PFC_PDCRH1 (REG_BASE + 0x03A8) /* Port D Ctr. Reg. H1 */
-#define PFC_PDCRH2 (REG_BASE + 0x03AA) /* Port D Ctr. Reg. H2 */
-#define PFC_PDCRL  (REG_BASE + 0x03AC) /* Port D Ctr. Reg. L  */
-#define PFC_PEIOR  (REG_BASE + 0x03B4) /* Port E I/O Register */
-#define PFC_PECR1  (REG_BASE + 0x03B8) /* Port E Ctr. Reg. 1 */
-#define PFC_PECR2  (REG_BASE + 0x03BA) /* Port E Ctr. Reg. 2 */
-#define PFC_IFCR   (REG_BASE + 0x03C8) /* short */
-
-/*Compare/Match Timer*/
-#define CMT_CMSTR  (REG_BASE + 0x3D0) /* Start Reg. char, short, word */
-#define CMT_CMCSR0 (REG_BASE + 0x3D2) /* C0 SCR short, word */
-#define CMT_CMCNT0 (REG_BASE + 0x3D4) /* C0 Counter char, short, word */
-#define CMT_CMCOR0 (REG_BASE + 0x3D6) /* C0 Const.Reg. char, short, word */
-#define CMT_CMCSR1 (REG_BASE + 0x3D8) /* C1 SCR short, word */
-#define CMT_CMCNT1 (REG_BASE + 0x3DA) /* C1 Counter char, short, word */
-#define CMT_CMCOR1 (REG_BASE + 0x3DC) /* C1 Const.Reg. char, short, word */
-
-#endif
diff --git a/c/src/lib/libbsp/sh/gensh2/include/rtems/score/ispsh7045.h b/c/src/lib/libbsp/sh/gensh2/include/rtems/score/ispsh7045.h
deleted file mode 100644
index fb9f5297ae..0000000000
--- a/c/src/lib/libbsp/sh/gensh2/include/rtems/score/ispsh7045.h
+++ /dev/null
@@ -1,208 +0,0 @@
-/*
- *  This include file contains information pertaining to the Hitachi SH
- *  processor.
- *
- *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
- *           Bernd Becker (becker@faw.uni-ulm.de)
- *
- *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- *  COPYRIGHT (c) 1998.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- *
- *  Modified to reflect isp entries for sh7045 processor:
- *  John M. Mills (jmills@tga.com)
- *  TGA Technologies, Inc.
- *  100 Pinnacle Way, Suite 140
- *  Norcross, GA 30071 U.S.A.
- *
- *
- *  This modified file may be copied and distributed in accordance
- *  the above-referenced license. It is provided for critique and
- *  developmental purposes without any warranty nor representation
- *  by the authors or by TGA Technologies.
- */
-
-#ifndef __CPU_ISPS_H
-#define __CPU_ISPS_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <rtems/score/types.h>
-
-extern void __ISR_Handler( uint32_t   vector );
-
-
-/*
- * interrupt vector table offsets
- */
-#define NMI_ISP_V 11
-#define USB_ISP_V 12
-#define IRQ0_ISP_V 64
-#define IRQ1_ISP_V 65
-#define IRQ2_ISP_V 66
-#define IRQ3_ISP_V 67
-#define IRQ4_ISP_V 68
-#define IRQ5_ISP_V 69
-#define IRQ6_ISP_V 70
-#define IRQ7_ISP_V 71
-#define DMA0_ISP_V 72
-#define DMA1_ISP_V 76
-#define DMA2_ISP_V 80
-#define DMA3_ISP_V 84
-
-#define MTUA0_ISP_V 88
-#define MTUB0_ISP_V 89
-#define MTUC0_ISP_V 90
-#define MTUD0_ISP_V 91
-#define MTUV0_ISP_V 92
-
-#define MTUA1_ISP_V 96
-#define MTUB1_ISP_V 97
-#define MTUV1_ISP_V 100
-#define MTUU1_ISP_V 101
-
-#define MTUA2_ISP_V 104
-#define MTUB2_ISP_V 105
-#define MTUV2_ISP_V 108
-#define MTUU2_ISP_V 109
-
-#define MTUA3_ISP_V 112
-#define MTUB3_ISP_V 113
-#define MTUC3_ISP_V 114
-#define MTUD3_ISP_V 115
-#define MTUV3_ISP_V 116
-
-#define MTUA4_ISP_V 120
-#define MTUB4_ISP_V 121
-#define MTUC4_ISP_V 122
-#define MTUD4_ISP_V 123
-#define MTUV4_ISP_V 124
-
-#define ERI0_ISP_V 128
-#define RXI0_ISP_V 129
-#define TXI0_ISP_V 130
-#define TEI0_ISP_V 131
-
-#define ERI1_ISP_V 132
-#define RXI1_ISP_V 133
-#define TXI1_ISP_V 134
-#define TEI1_ISP_V 135
-
-#define ADI0_ISP_V 136
-#define ADI1_ISP_V 137
-#define DTC_ISP_V 140  /* Data Transfer Controller */
-#define CMT0_ISP_V 144 /* Compare Match Timer */
-#define CMT1_ISP_V 148
-#define WDT_ISP_V 152  /* Wtachdog Timer */
-#define CMI_ISP_V 153  /* BSC RAS interrupt */
-#define OEI_ISP_V 156  /* I/O Port */
-#define DREF_ISP_V CMI_ISP_V /* DRAM Refresh from BSC */
-#if 0
-#define PRT_ISP_V /* parity error - no equivalent */
-#endif
-
-/* dummy ISP */
-extern void _dummy_isp( void );
-
-/* Non Maskable Interrupt */
-extern void _nmi_isp( void );
-
-/* User Break Controller */
-extern void _usb_isp( void );
-
-/* External interrupts 0-7 */
-extern void _irq0_isp( void );
-extern void _irq1_isp( void );
-extern void _irq2_isp( void );
-extern void _irq3_isp( void );
-extern void _irq4_isp( void );
-extern void _irq5_isp( void );
-extern void _irq6_isp( void );
-extern void _irq7_isp( void );
-
-/* DMA - Controller */
-extern void _dma0_isp( void );
-extern void _dma1_isp( void );
-extern void _dma2_isp( void );
-extern void _dma3_isp( void );
-
-/* Interrupt Timer Unit */
-/* Timer 0 */
-extern void _mtua0_isp( void );
-extern void _mtub0_isp( void );
-extern void _mtuc0_isp( void );
-extern void _mtud0_isp( void );
-extern void _mtuv0_isp( void );
-/* Timer 1 */
-extern void _mtua1_isp( void );
-extern void _mtub1_isp( void );
-extern void _mtuv1_isp( void );
-extern void _mtuu1_isp( void );
-/* Timer 2 */
-extern void _mtua2_isp( void );
-extern void _mtub2_isp( void );
-extern void _mtuv2_isp( void );
-extern void _mtuu2_isp( void );
-/* Timer 3 */
-extern void _mtua3_isp( void );
-extern void _mtub3_isp( void );
-extern void _mtuc3_isp( void );
-extern void _mtud3_isp( void );
-extern void _mtuv3_isp( void );
-/* Timer 4 */
-extern void _mtua4_isp( void );
-extern void _mtub4_isp( void );
-extern void _mtuc4_isp( void );
-extern void _mtud4_isp( void );
-extern void _mtuv4_isp( void );
-
-/* serial interfaces */
-extern void _eri0_isp( void );
-extern void _rxi0_isp( void );
-extern void _txi0_isp( void );
-extern void _tei0_isp( void );
-extern void _eri1_isp( void );
-extern void _rxi1_isp( void );
-extern void _txi1_isp( void );
-extern void _tei1_isp( void );
-
-/* ADC */
-extern void _adi0_isp( void );
-extern void _adi1_isp( void );
-
-/* Data Transfer Controller */
-extern void _dtci_isp( void );
-
-/* Compare Match Timer */
-extern void _cmt0_isp( void );
-extern void _cmt1_isp( void );
-
-/* Watchdog Timer */
-extern void _wdt_isp( void );
-
-/* DRAM refresh control unit of bus state controller */
-extern void _bsc_isp( void );
-
-/* I/O Port */
-extern void _oei_isp( void );
-
-/* Parity Control Unit of the Bus State Controllers */
-/* extern void _prt_isp( void ); */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/c/src/lib/libbsp/sh/gensh2/include/sh/io_types.h b/c/src/lib/libbsp/sh/gensh2/include/sh/io_types.h
deleted file mode 100644
index 1dab885672..0000000000
--- a/c/src/lib/libbsp/sh/gensh2/include/sh/io_types.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/************************************************************************
- *
- *  Data types and constants for Hitachi SH704X on-chip peripherals
- *
- *  Author: John M.Mills (jmills@tga.com)
- *
- *  COPYRIGHT (c) 1999, TGA Technologies, Norcross, GA, USA
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- *  This file may be distributed as part of the RTEMS software item.
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- *
- *      John M. Mills (jmills@tga.com)
- *      TGA Technologies, Inc.
- *      100 Pinnacle Way, Suite 140
- *      Norcross, GA 30071 U.S.A.
- *
- *      This modified file may be copied and distributed in accordance
- *      the above-referenced license. It is provided for critique and
- *      developmental purposes without any warranty nor representation
- *      by the authors or by TGA Technologies.
- *
- *
- ************************************************************************/
-
-#ifndef _sh_io_types_h
-#define _sh_io_types_h
-
-#include <rtems/score/iosh7045.h>
-#include <termios.h>
-
-typedef enum {SCI0, SCI1} portNo;
-typedef enum {eight, seven} dataBits;
-typedef enum {one, two} stopBits;
-typedef enum {even, odd} parity;
-
-typedef struct {
-  portNo   line;
-  int      speed_ix;
-  dataBits dBits;
-  int      parEn;
-  parity   par;
-  int      mulPro;
-  stopBits sBits;
-} sci_setup_t;
-
-typedef union{
-	unsigned char Reg;         /* By Register */
-	struct {                   /* By  Field */
-		 unsigned char Sync  :1; /* Async/Sync */
-		 unsigned char DBts  :1; /* Char.Length */
-		 unsigned char ParEn :1; /* Parity En.*/
-		 unsigned char Odd   :1; /* Even/Odd */
-		 unsigned char SBts  :1; /* No.Stop Bits */
-		 unsigned char MulP  :1; /* Multi-Proc. */
-		 unsigned char Dvsr  :2; /* Clock Sel. */
-	} Fld;
-} sci_smr_t;
-
-typedef union {
-	unsigned char Reg;          /*  By Register */
-	struct {                    /*  By Field */
-		 unsigned char TIE :1;    /*  Tx.Int.En. */
-		 unsigned char RIE :1;    /*  Rx.Int.En. */
-		 unsigned char TE  :1;    /*  Tx.En. */
-		 unsigned char RE  :1;    /*  Rx.En. */
-		 unsigned char MPIE:1;    /*  Mult.Pro.Int.En. */
-		 unsigned char TEIE:1;    /*  Tx.End Int.En. */
-		 unsigned char CkSrc :2;   /*  Clock Src. */
-	} Fld;
-} sci_scr_t;
-
-typedef struct {
-  unsigned char n ;
-  unsigned char N ;
-} sci_bitrate_t;
-
-#endif /* _sh_io_types_h */
diff --git a/c/src/lib/libbsp/sh/gensh2/include/sh/sci.h b/c/src/lib/libbsp/sh/gensh2/include/sh/sci.h
deleted file mode 100644
index dc34371d48..0000000000
--- a/c/src/lib/libbsp/sh/gensh2/include/sh/sci.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- *  Driver for the sh2 704x on-chip serial devices (sci)
- *
- *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
- *           Bernd Becker (becker@faw.uni-ulm.de)
- *
- *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- *  COPYRIGHT (c) 1998.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef _sh_sci_h
-#define _sh_sci_h
-
-#include <rtems/libio.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*
- * Devices are set to 9600 bps, 8 databits, 1 stopbit, no
- * parity and asynchronous mode by default.
- *
- * NOTE:
- *       The onboard serial devices of the SH do not support hardware
- *       handshake.
- */
-
-#define DEVSCI_DRIVER_TABLE_ENTRY \
-  { sh_sci_initialize, sh_sci_open, sh_sci_close, sh_sci_read, \
-      sh_sci_write, sh_sci_control }
-
-extern rtems_device_driver sh_sci_initialize(
-  rtems_device_major_number,
-  rtems_device_minor_number,
-  void *
-);
-
-extern rtems_device_driver sh_sci_open(
-  rtems_device_major_number,
-  rtems_device_minor_number,
-  void *
-);
-
-extern rtems_device_driver sh_sci_close(
-  rtems_device_major_number,
-  rtems_device_minor_number,
-  void *
-);
-
-extern rtems_device_driver sh_sci_read(
-  rtems_device_major_number,
-  rtems_device_minor_number,
-  void *
-);
-
-extern rtems_device_driver sh_sci_write(
-  rtems_device_major_number,
-  rtems_device_minor_number,
-  void *
-);
-
-extern rtems_device_driver sh_sci_control(
-  rtems_device_major_number,
-  rtems_device_minor_number,
-  void *
-);
-
-extern const rtems_termios_callbacks * sh_sci_get_termios_handlers(
-  bool poll
-);
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/c/src/lib/libbsp/sh/gensh2/include/sh/sci_termios.h b/c/src/lib/libbsp/sh/gensh2/include/sh/sci_termios.h
deleted file mode 100644
index 63750c9461..0000000000
--- a/c/src/lib/libbsp/sh/gensh2/include/sh/sci_termios.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- *  COPYRIGHT (c) 1989-2001.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- *
- */
-
-#ifndef _SH_SCI_TERMIOS_H_
-#define _SH_SCI_TERMIOS_H_
-
-#ifdef __cplusplus
-extern "C"{
-#endif
-
-
-int sh_sci_set_attributes(
-  int minor,
-  const struct termios *t
-);
-
-void sh_sci_initialize_interrupts(int minor);
-
-void sh_sci_init(int minor);
-
-ssize_t sh_sci_write_support_int(
-    int         minor,
-    const char *buf,
-    size_t      len
-);
-
-ssize_t sh_sci_write_support_polled(
-  int         minor,
-  const char *buf,
-  size_t      len
-);
-
-void sh_sci_write_polled(
-    int minor,
-    char c
-);
-
-int sh_sci_inbyte_nonblocking_polled(int minor);
-
-
-int sh_sci_first_open(
-  int major,
-  int minor,
-  void *arg
-);
-
-int sh_sci_last_close(
-  int major,
-  int minor,
-  void *arg
-);
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif /* _SH_SCI_TERMIOS_H_ */
diff --git a/c/src/lib/libbsp/sh/gensh2/include/sh/sh7_pfc.h b/c/src/lib/libbsp/sh/gensh2/include/sh/sh7_pfc.h
deleted file mode 100644
index b56433a9e2..0000000000
--- a/c/src/lib/libbsp/sh/gensh2/include/sh/sh7_pfc.h
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * Bit values for the pin function controller of the Hitachi SH704x
- *
- * From Hitachi tutorials
- *
- *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
- *           Bernd Becker (becker@faw.uni-ulm.de)
- *
- *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- *  COPYRIGHT (c) 1998.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef _sh7_pfc_h
-#define _sh7_pfc_h
-
-#include <rtems/score/iosh7045.h>
-
-/*
- * Port A IO Registers (PAIORH, PAIORL)
- *    1 => OUTPUT
- *    0 => INPUT
- */
-#define PAIORH     PFC_PAIORH
-#define PAIORL     PFC_PAIORL
-
-/* PAIORH */
-#define PA23IOR    0x0080
-#define PA22IOR    0x0040
-#define PA21IOR    0x0020
-#define PA20IOR    0x0010
-#define PA19IOR    0x0008
-#define PA18IOR    0x0004
-#define PA17IOR    0x0002
-#define PA16IOR    0x0001
-
-/* PAIORL */
-#define PA15IOR    0x8000
-#define PA14IOR    0x4000
-#define PA13IOR    0x2000
-#define PA12IOR    0x1000
-#define PA11IOR    0x0800
-#define PA10IOR    0x0400
-#define PA9IOR     0x0200
-#define PA8IOR     0x0100
-#define PA7IOR     0x0080
-#define PA6IOR     0x0040
-#define PA5IOR     0x0020
-#define PA4IOR     0x0010
-#define PA3IOR     0x0008
-#define PA2IOR     0x0004
-#define PA1IOR     0x0002
-#define PA0IOR     0x0001
-
-/*
- * Port A Control Registers (PACRH, PACRL1, PACRL2)
- * and mode bits
- */
-#define PACRH      PFC_PACRH
-#define PACRL1     PFC_PACRL1
-#define PACRL2     PFC_PACRL2
-
-/* PACRH */
-#define PA23MD0    0x4000
-#define PA22MD0    0x1000
-#define PA21MD0    0x0400
-#define PA20MD0    0x0100
-#define PA19MD1    0x0080
-#define PA19MD0    0x0040
-#define PA18MD1    0x0020
-#define PA18MD0    0x0010
-#define PA17MD0    0x0004
-#define PA16MD0    0x0001
-
-/* PACRL1 */
-#define PA15MD0    0x4000
-#define PA14MD0    0x1000
-#define PA13MD0    0x0400
-#define PA12MD0    0x0100
-#define PA11MD0    0x0040
-#define PA10MD0    0x0010
-#define PA9MD1     0x0008
-#define PA9MD0     0x0004
-#define PA8MD1     0x0002
-#define PA8MD0     0x0001
-
-/* PACRL2 */
-#define PA7MD1     0x8000
-#define PA7MD0     0x4000
-#define PA6MD1     0x2000
-#define PA6MD0     0x1000
-#define PA5MD1     0x0800
-#define PA5MD0     0x0400
-#define PA4MD0     0x0100
-#define PA3MD0     0x0040
-#define PA2MD1     0x0020
-#define PA2MD0     0x0010
-#define PA1MD0     0x0004
-#define PA0MD0     0x0001
-
-#define PA_TXD1    PA4MD0
-#define PA_RXD1    PA3MD0
-#define PA_TXD0    PA1MD0
-#define PA_RXD0    PA0MD0
-
-/*
- * Port B IO Register (PBIOR)
- */
-#define PBIOR      PFC_PBIOR
-#define PB15IOR    0x8000
-#define PB14IOR    0x4000
-#define PB13IOR    0x2000
-#define PB12IOR    0x1000
-#define PB11IOR    0x0800
-#define PB10IOR    0x0400
-#define PB9IOR     0x0200
-#define PB8IOR     0x0100
-#define PB7IOR     0x0080
-#define PB6IOR     0x0040
-#define PB5IOR     0x0020
-#define PB4IOR     0x0010
-#define PB3IOR     0x0008
-#define PB2IOR     0x0004
-#define PB1IOR     0x0002
-#define PB0IOR     0x0001
-
-/*
- * Port B Control Register (PBCR1)
- */
-#define PBCR1      PFC_PBCR1
-#define PB15MD1    0x8000
-#define PB15MD0    0x4000
-#define PB14MD1    0x2000
-#define PB14MD0    0x1000
-#define PB13MD1    0x0800
-#define PB13MD0    0x0400
-#define PB12MD1    0x0200
-#define PB12MD0    0x0100
-#define PB11MD1    0x0080
-#define PB11MD0    0x0040
-#define PB10MD1    0x0020
-#define PB10MD0    0x0010
-#define PB9MD1     0x0008
-#define PB9MD0     0x0004
-#define PB8MD1     0x0002
-#define PB8MD0     0x0001
-
-#define PB15MD     PB15MD1|PB14MD0
-#define PB14MD     PB14MD1|PB14MD0
-#define PB13MD     PB13MD1|PB13MD0
-#define PB12MD     PB12MD1|PB12MD0
-#define PB11MD     PB11MD1|PB11MD0
-#define PB10MD     PB10MD1|PB10MD0
-#define PB9MD      PB9MD1|PB9MD0
-#define PB8MD      PB8MD1|PB8MD0
-
-#define PB_TXD1    PB11MD1
-#define PB_RXD1    PB10MD1
-#define PB_TXD0    PB9MD1
-#define PB_RXD0    PB8MD1
-
-/*
- * Port B Control Register (PBCR2)
- */
-#define PBCR2      PFC_PBCR2
-#define PB7MD1     0x8000
-#define PB7MD0     0x4000
-#define PB6MD1     0x2000
-#define PB6MD0     0x1000
-#define PB5MD1     0x0800
-#define PB5MD0     0x0400
-#define PB4MD1     0x0200
-#define PB4MD0     0x0100
-#define PB3MD1     0x0080
-#define PB3MD0     0x0040
-#define PB2MD1     0x0020
-#define PB2MD0     0x0010
-#define PB1MD1     0x0008
-#define PB1MD0     0x0004
-#define PB0MD1     0x0002
-#define PB0MD0     0x0001
-
-#define PB7MD      PB7MD1|PB7MD0
-#define PB6MD      PB6MD1|PB6MD0
-#define PB5MD      PB5MD1|PB5MD0
-#define PB4MD      PB4MD1|PB4MD0
-#define PB3MD      PB3MD1|PB3MD0
-#define PB2MD      PB2MD1|PB2MD0
-#define PB1MD      PB1MD1|PB1MD0
-#define PB0MD      PB0MD1|PB0MD0
-
-#endif /* _sh7_pfc_h */
diff --git a/c/src/lib/libbsp/sh/gensh2/include/sh/sh7_sci.h b/c/src/lib/libbsp/sh/gensh2/include/sh/sh7_sci.h
deleted file mode 100644
index 7218313704..0000000000
--- a/c/src/lib/libbsp/sh/gensh2/include/sh/sh7_sci.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Bit values for the serial control registers of the Hitachi SH704X
- *
- * From Hitachi tutorials
- *
- *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
- *           Bernd Becker (becker@faw.uni-ulm.de)
- *
- *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- *  COPYRIGHT (c) 1998.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef _sh7_sci_h
-#define _sh7_sci_h
-
-#include <rtems/score/iosh7045.h>
-
-/*
- * Serial mode register bits
- */
-
-#define SCI_SYNC_MODE               0x80
-#define SCI_SEVEN_BIT_DATA          0x40
-#define SCI_PARITY_ON               0x20
-#define SCI_ODD_PARITY              0x10
-#define SCI_STOP_BITS_2             0x08
-#define SCI_ENABLE_MULTIP           0x04
-#define SCI_PHI_64                  0x03
-#define SCI_PHI_16                  0x02
-#define SCI_PHI_4                   0x01
-#define SCI_PHI_0                   0x00
-
-/*
- * Serial register offsets, relative to SCI0_SMR or SCI1_SMR
- */
-
-#define SCI_SMR			0x00
-#define SCI_BRR			0x01
-#define SCI_SCR			0x02
-#define SCI_TDR			0x03
-#define SCI_SSR			0x04
-#define SCI_RDR			0x05
-
-/*
- * Serial control register bits
- */
-#define SCI_TIE                 0x80    /* Transmit interrupt enable */
-#define SCI_RIE                 0x40    /* Receive interrupt enable */
-#define SCI_TE                  0x20    /* Transmit enable */
-#define SCI_RE                  0x10    /* Receive enable */
-#define SCI_MPIE                0x08    /* Multiprocessor interrupt enable */
-#define SCI_TEIE                0x04    /* Transmit end interrupt enable */
-#define SCI_CKE1                0x02    /* Clock enable 1 */
-#define SCI_CKE0                0x01    /* Clock enable 0 */
-
-/*
- * Serial status register bits
- */
-#define SCI_TDRE                0x80    /* Transmit data register empty */
-#define SCI_RDRF                0x40    /* Receive data register full */
-#define SCI_ORER                0x20    /* Overrun error */
-#define SCI_FER                 0x10    /* Framing error */
-#define SCI_PER                 0x08    /* Parity error */
-#define SCI_TEND                0x04    /* Transmit end */
-#define SCI_MPB                 0x02    /* Multiprocessor bit */
-#define SCI_MPBT                0x01    /* Multiprocessor bit transfer */
-
-/*
- * INTC Priority Settings
- */
-
-#define SCI0_IPMSK	0x00F0
-#define SCI0_LOWIP	0x0010
-#define SCI1_IPMSK	0x000F
-#define SCI1_LOWIP	0x0001
-
-#endif /* _sh7_sci_h */
diff --git a/c/src/lib/libbsp/sh/gensh2/include/tm27.h b/c/src/lib/libbsp/sh/gensh2/include/tm27.h
deleted file mode 100644
index 0dfa7bf628..0000000000
--- a/c/src/lib/libbsp/sh/gensh2/include/tm27.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <rtems/tm27-default.h>
diff --git a/c/src/lib/libbsp/sh/gensh2/preinstall.am b/c/src/lib/libbsp/sh/gensh2/preinstall.am
deleted file mode 100644
index 742998fee3..0000000000
--- a/c/src/lib/libbsp/sh/gensh2/preinstall.am
+++ /dev/null
@@ -1,109 +0,0 @@
-## Automatically generated by ampolish3 - Do not edit
-
-if AMPOLISH3
-$(srcdir)/preinstall.am: Makefile.am
-	$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
-endif
-
-PREINSTALL_DIRS =
-DISTCLEANFILES += $(PREINSTALL_DIRS)
-
-all-am: $(PREINSTALL_FILES)
-
-PREINSTALL_FILES =
-CLEANFILES += $(PREINSTALL_FILES)
-
-all-local: $(TMPINSTALL_FILES)
-
-TMPINSTALL_FILES =
-CLEANFILES += $(TMPINSTALL_FILES)
-
-$(PROJECT_LIB)/$(dirstamp):
-	@$(MKDIR_P) $(PROJECT_LIB)
-	@: > $(PROJECT_LIB)/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
-
-$(PROJECT_INCLUDE)/$(dirstamp):
-	@$(MKDIR_P) $(PROJECT_INCLUDE)
-	@: > $(PROJECT_INCLUDE)/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
-
-$(PROJECT_INCLUDE)/sh/$(dirstamp):
-	@$(MKDIR_P) $(PROJECT_INCLUDE)/sh
-	@: > $(PROJECT_INCLUDE)/sh/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/sh/$(dirstamp)
-
-$(PROJECT_INCLUDE)/rtems/score/$(dirstamp):
-	@$(MKDIR_P) $(PROJECT_INCLUDE)/rtems/score
-	@: > $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
-
-$(PROJECT_INCLUDE)/bsp/$(dirstamp):
-	@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
-	@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-
-$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
-PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
-
-$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
-
-$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
-
-$(PROJECT_INCLUDE)/sh/io_types.h: include/sh/io_types.h $(PROJECT_INCLUDE)/sh/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/sh/io_types.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/sh/io_types.h
-
-$(PROJECT_INCLUDE)/sh/sci.h: include/sh/sci.h $(PROJECT_INCLUDE)/sh/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/sh/sci.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/sh/sci.h
-
-$(PROJECT_INCLUDE)/sh/sh7_pfc.h: include/sh/sh7_pfc.h $(PROJECT_INCLUDE)/sh/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/sh/sh7_pfc.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/sh/sh7_pfc.h
-
-$(PROJECT_INCLUDE)/sh/sh7_sci.h: include/sh/sh7_sci.h $(PROJECT_INCLUDE)/sh/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/sh/sh7_sci.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/sh/sh7_sci.h
-
-$(PROJECT_INCLUDE)/sh/sci_termios.h: include/sh/sci_termios.h $(PROJECT_INCLUDE)/sh/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/sh/sci_termios.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/sh/sci_termios.h
-
-$(PROJECT_INCLUDE)/rtems/score/ispsh7045.h: include/rtems/score/ispsh7045.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/ispsh7045.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/ispsh7045.h
-
-$(PROJECT_INCLUDE)/rtems/score/iosh7045.h: include/rtems/score/iosh7045.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/iosh7045.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/iosh7045.h
-
-$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
-
-$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
-
-$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
-TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
-
-$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
-PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
-
-$(PROJECT_LIB)/linkcmds.ram: startup/linkcmds.ram $(PROJECT_LIB)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.ram
-PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.ram
-
-$(PROJECT_LIB)/linkcmds.rom: startup/linkcmds.rom $(PROJECT_LIB)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.rom
-PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.rom
-
diff --git a/c/src/lib/libbsp/sh/gensh2/bsp_specs b/c/src/lib/libbsp/sh/gensh2/startup/bsp_specs
index 87638cc027..87638cc027 100644
--- a/c/src/lib/libbsp/sh/gensh2/bsp_specs
+++ b/c/src/lib/libbsp/sh/gensh2/startup/bsp_specs