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| author | Hesham Almatary <hesham@alumni.york.ac.uk> | 2017-10-21 18:06:44 +1100 |
|---|---|---|
| committer | Hesham Almatary <heshamelmatary@gmail.com> | 2017-10-28 18:41:42 +1100 |
| commit | 6d85e0514409aaed17711bd2bff04f1a0b0bbc83 (patch) | |
| tree | eb782ca584c80783d39ee4afbc58c19821b82440 /c/src/lib/libbsp/riscv32/riscv_generic/configure.ac | |
| parent | cpukit: Add basic riscv32 architecture port v3 (diff) | |
| download | rtems-6d85e0514409aaed17711bd2bff04f1a0b0bbc83.tar.bz2 | |
bsp: Add new riscv_generic bsp v3
* Only runs/tested on simulator/spike.
* Ticker, hello, capture work proprely
* Tested via RTEMS Tester, Passed: 525/565 (92%)
Update #3109
Diffstat (limited to 'c/src/lib/libbsp/riscv32/riscv_generic/configure.ac')
| -rw-r--r-- | c/src/lib/libbsp/riscv32/riscv_generic/configure.ac | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/configure.ac b/c/src/lib/libbsp/riscv32/riscv_generic/configure.ac new file mode 100644 index 0000000000..92c1b9609d --- /dev/null +++ b/c/src/lib/libbsp/riscv32/riscv_generic/configure.ac @@ -0,0 +1,36 @@ +## +# +# @file +# +# @brief Configure script of LibBSP for riscv_generic BSP. +# + +AC_PREREQ([2.69]) +AC_INIT([rtems-c-src-lib-libbsp-riscv_generic],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla]) +AC_CONFIG_SRCDIR([bsp_specs]) +RTEMS_TOP(../../../../../..) + +RTEMS_CANONICAL_TARGET_CPU +AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) +RTEMS_BSP_CONFIGURE + +RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[]) +RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP +start]) + +RTEMS_BSPOPTS_SET([BSP_RISCV32_PERIPHCLK],[*],[100000000U]) +RTEMS_BSPOPTS_HELP([BSP_RISCV32_PERIPHCLK],[riscv PERIPHCLK clock +frequency in Hz]) + +RTEMS_PROG_CC_FOR_TARGET([-ansi -fasm]) +RTEMS_CANONICALIZE_TOOLS +RTEMS_PROG_CCAS + +RTEMS_CHECK_SMP +AM_CONDITIONAL(HAS_SMP,[test "$rtems_cv_HAS_SMP" = "yes"]) + +RTEMS_BSP_CLEANUP_OPTIONS(0, 1) +RTEMS_BSP_LINKCMDS + +AC_CONFIG_FILES([Makefile]) +AC_OUTPUT |