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| author | Hesham Almatary <hesham@alumni.york.ac.uk> | 2017-10-21 18:06:44 +1100 |
|---|---|---|
| committer | Hesham Almatary <heshamelmatary@gmail.com> | 2017-10-28 18:41:42 +1100 |
| commit | 6d85e0514409aaed17711bd2bff04f1a0b0bbc83 (patch) | |
| tree | eb782ca584c80783d39ee4afbc58c19821b82440 /c/src/lib/libbsp/riscv32/configure.ac | |
| parent | cpukit: Add basic riscv32 architecture port v3 (diff) | |
| download | rtems-6d85e0514409aaed17711bd2bff04f1a0b0bbc83.tar.bz2 | |
bsp: Add new riscv_generic bsp v3
* Only runs/tested on simulator/spike.
* Ticker, hello, capture work proprely
* Tested via RTEMS Tester, Passed: 525/565 (92%)
Update #3109
Diffstat (limited to 'c/src/lib/libbsp/riscv32/configure.ac')
| -rw-r--r-- | c/src/lib/libbsp/riscv32/configure.ac | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/riscv32/configure.ac b/c/src/lib/libbsp/riscv32/configure.ac new file mode 100644 index 0000000000..116fa2f91a --- /dev/null +++ b/c/src/lib/libbsp/riscv32/configure.ac @@ -0,0 +1,19 @@ +# Process this file with autoconf to produce a configure script. + +AC_PREREQ([2.69]) +AC_INIT([rtems-c-src-lib-libbsp-riscv32],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla]) +AC_CONFIG_SRCDIR([../riscv32]) +RTEMS_TOP(../../../../..) + +RTEMS_CANONICAL_TARGET_CPU +AM_INIT_AUTOMAKE([no-define foreign subdir-objects 1.12.2]) +AM_MAINTAINER_MODE + +RTEMS_ENV_RTEMSBSP +RTEMS_PROJECT_ROOT + +RTEMS_CHECK_BSPDIR([$RTEMS_BSP_FAMILY]) + +# Explicitly list all Makefiles here +AC_CONFIG_FILES([Makefile]) +AC_OUTPUT |