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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-07-19 12:11:19 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-07-25 10:07:43 +0200 |
| commit | 8db3f0e878b7f008ad05716f501220509662e2c4 (patch) | |
| tree | d55db59defa95096a3ef156427822a9f8744ab58 /c/src/lib/libbsp/riscv/riscv/configure.ac | |
| parent | riscv: New CPU_Exception_frame (diff) | |
| download | rtems-8db3f0e878b7f008ad05716f501220509662e2c4.tar.bz2 | |
riscv: Rework exception handling
Remove _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector()
functions. Applications can install an exception handler via the fatal
error handler to handle synchronous exceptions.
Handle interrupt exceptions via _RISCV_Interrupt_dispatch() which must
be provided by the BSP.
Update #3433.
Diffstat (limited to 'c/src/lib/libbsp/riscv/riscv/configure.ac')
| -rw-r--r-- | c/src/lib/libbsp/riscv/riscv/configure.ac | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/riscv/riscv/configure.ac b/c/src/lib/libbsp/riscv/riscv/configure.ac index 17f4eb8d88..478e255844 100644 --- a/c/src/lib/libbsp/riscv/riscv/configure.ac +++ b/c/src/lib/libbsp/riscv/riscv/configure.ac @@ -30,6 +30,9 @@ RTEMS_BSPOPTS_HELP([BSP_FDT_BLOB_COPY_TO_READ_ONLY_LOAD_AREA],[copy the FDT blob RTEMS_BSPOPTS_SET([BSP_CONSOLE_BAUD],[*],[115200]) RTEMS_BSPOPTS_HELP([BSP_CONSOLE_BAUD],[default baud for console driver devices (default 115200)]) +RTEMS_BSPOPTS_SET([RISCV_MAXIMUM_EXTERNAL_INTERRUPTS],[*],[64]) +RTEMS_BSPOPTS_HELP([RISCV_MAXIMUM_EXTERNAL_INTERRUPTS],[maximum number of external interrupts supported by the BSP (default 64)]) + RTEMS_BSPOPTS_SET([RISCV_ENABLE_HTIF_SUPPORT],[*],[1]) RTEMS_BSPOPTS_HELP([RISCV_ENABLE_HTIF_SUPPORT],[enables the HTIF support if defined to a non-zero value, otherwise it is disabled (enabled by default)]) |