bsp/qoriq: Simplify fatal exceptions

Avoid use of small-data area, since it is not supported in the ELFv2 ABI
by GCC.

Update #3082.

5 files changed, 184 insertions, 107 deletions

diff --git a/c/src/lib/libbsp/powerpc/qoriq/include/bsp.h b/c/src/lib/libbsp/powerpc/qoriq/include/bsp.h
index 8e168ee71a..5a125e4a83 100644
--- a/c/src/lib/libbsp/powerpc/qoriq/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/qoriq/include/bsp.h
@@ -108,6 +108,8 @@ void qoriq_restart_secondary_processor(
   const qoriq_start_spin_table *spin_table
 ) RTEMS_NO_RETURN;
 
+void qoriq_initialize_exceptions(void *interrupt_stack_begin);
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
diff --git a/c/src/lib/libbsp/powerpc/qoriq/start/start.S b/c/src/lib/libbsp/powerpc/qoriq/start/start.S
index 0dc303dfdb..7af2848720 100644
--- a/c/src/lib/libbsp/powerpc/qoriq/start/start.S
+++ b/c/src/lib/libbsp/powerpc/qoriq/start/start.S
@@ -312,105 +312,149 @@ _start_secondary_processor:
 	.section ".bsp_start_text", "ax"
 	.align 4
 bsp_exc_vector_base:
-	stw	r1, ppc_exc_lock_crit@sdarel(r13)
-	stw	r4, ppc_exc_vector_register_crit@sdarel(r13)
-	li	r4, -32767
-	b	ppc_exc_wrap_bookE_crit
+	/* Critical input */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 2
-	b	ppc_exc_wrap_nopush_e500_mchk
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 0
+	b	ppc_exc_fatal_critical
+	/* Machine check */
+	stwu	r1, -EXC_GENERIC_SIZE(r1)
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 1
+	b	ppc_exc_fatal_machine_check
+	/* Data storage */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 3
-	b	ppc_exc_wrap_nopush_std
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 2
+	b	ppc_exc_fatal_normal
+	/* Instruction storage */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 4
-	b	ppc_exc_wrap_nopush_std
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 3
+	b	ppc_exc_fatal_normal
+	/* External input */
 	stwu	r1, -CPU_INTERRUPT_FRAME_SIZE(r1)
-#ifndef PPC_EXC_CONFIG_USE_FIXED_HANDLER
-	stw	r4, PPC_EXC_VECTOR_PROLOGUE_OFFSET(r1)
-	li	r4, -32763
-#endif
 	b	ppc_exc_wrap_async_normal
-#ifdef PPC_EXC_CONFIG_USE_FIXED_HANDLER
 	nop
 	nop
-#endif
+	/* Alignment */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 6
-	b	ppc_exc_wrap_nopush_std
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 5
+	b	ppc_exc_fatal_normal
+	/* Program */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 7
-	b	ppc_exc_wrap_nopush_std
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 6
+	b	ppc_exc_fatal_normal
+#ifdef __PPC_CPU_E6500__
+	/* Floating-point unavailable */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 8
-	b	ppc_exc_wrap_nopush_std
-system_call:
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 7
+	b	ppc_exc_fatal_normal
+#endif
+	/* System call */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 12
-	b	ppc_exc_wrap_nopush_std
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 8
+	b	ppc_exc_fatal_normal
+#ifdef __PPC_CPU_E6500__
+	/* APU unavailable */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 24
-	b	ppc_exc_wrap_nopush_std
-	stwu	r1, -CPU_INTERRUPT_FRAME_SIZE(r1)
-#ifndef PPC_EXC_CONFIG_USE_FIXED_HANDLER
-	stw	r4, PPC_EXC_VECTOR_PROLOGUE_OFFSET(r1)
-	li	r4, -32752
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 9
+	b	ppc_exc_fatal_normal
 #endif
-	b	ppc_exc_wrap_async_normal
-#ifdef PPC_EXC_CONFIG_USE_FIXED_HANDLER
-	nop
-	nop
-#endif
-	stwu	r1, -CPU_INTERRUPT_FRAME_SIZE(r1)
-#ifndef PPC_EXC_CONFIG_USE_FIXED_HANDLER
-	stw	r4, PPC_EXC_VECTOR_PROLOGUE_OFFSET(r1)
-	li	r4, -32749
-#endif
-	b	ppc_exc_wrap_async_normal
-#ifdef PPC_EXC_CONFIG_USE_FIXED_HANDLER
-	nop
-	nop
+	/* Decrementer */
+	stwu	r1, -EXC_GENERIC_SIZE(r1)
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 10
+	b	ppc_exc_fatal_normal
+	/* Fixed-interval timer interrupt */
+	stwu	r1, -EXC_GENERIC_SIZE(r1)
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 11
+	b	ppc_exc_fatal_normal
+	/* Watchdog timer interrupt */
+	stwu	r1, -EXC_GENERIC_SIZE(r1)
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 12
+	b	ppc_exc_fatal_critical
+	/* Data TLB error */
+	stwu	r1, -EXC_GENERIC_SIZE(r1)
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 13
+	b	ppc_exc_fatal_normal
+	/* Instruction TLB error */
+	stwu	r1, -EXC_GENERIC_SIZE(r1)
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 14
+	b	ppc_exc_fatal_normal
+	/* Debug */
+	stwu	r1, -EXC_GENERIC_SIZE(r1)
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 15
+	b	ppc_exc_fatal_debug
+	/* SPE APU unavailable or AltiVec unavailable */
+	stwu	r1, -EXC_GENERIC_SIZE(r1)
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 32
+	b	ppc_exc_fatal_normal
+	/* SPE floating-point data exception or AltiVec assist */
+	stwu	r1, -EXC_GENERIC_SIZE(r1)
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 33
+	b	ppc_exc_fatal_normal
+#ifndef __PPC_CPU_E6500__
+	/* SPE floating-point round exception */
+	stwu	r1, -EXC_GENERIC_SIZE(r1)
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 34
+	b	ppc_exc_fatal_normal
 #endif
-	stw	r1, ppc_exc_lock_crit@sdarel(r13)
-	stw	r4, ppc_exc_vector_register_crit@sdarel(r13)
-	li	r4, -32748
-	b	ppc_exc_wrap_bookE_crit
+	/* Performance monitor */
+	stwu	r1, -EXC_GENERIC_SIZE(r1)
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 35
+	b	ppc_exc_fatal_normal
+#ifdef __PPC_CPU_E6500__
+	/* Processor doorbell interrupt */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 18
-	b	ppc_exc_wrap_nopush_std
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 36
+	b	ppc_exc_fatal_normal
+	/* Processor doorbell critical interrupt */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 17
-	b	ppc_exc_wrap_nopush_std
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 37
+	b	ppc_exc_fatal_critical
+	/* Guest processor doorbell */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 13
-	b	ppc_exc_wrap_nopush_bookE_crit
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 38
+	b	ppc_exc_fatal_normal
+	/* Guest processor doorbell critical and machine check */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 10
-	b	ppc_exc_wrap_nopush_std
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 39
+	b	ppc_exc_fatal_critical
+	/* Hypervisor system call */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 25
-	b	ppc_exc_wrap_nopush_std
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 40
+	b	ppc_exc_fatal_normal
+	/* Hypervisor privilege */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 26
-	b	ppc_exc_wrap_nopush_std
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 41
+	b	ppc_exc_fatal_normal
+	/* LRAT error */
 	stwu	r1, -EXC_GENERIC_SIZE(r1)
-	stw	r4, GPR4_OFFSET(r1)
-	li	r4, 15
-	b	ppc_exc_wrap_nopush_std
+	stw	r3, GPR3_OFFSET(r1)
+	li	r3, 42
+	b	ppc_exc_fatal_normal
+#endif
 
 /* Symbol provided for debugging and tracing */
 bsp_exc_vector_end:
diff --git a/c/src/lib/libbsp/powerpc/qoriq/startup/bspsmp.c b/c/src/lib/libbsp/powerpc/qoriq/startup/bspsmp.c
index 56bfa9f26b..b0342ec9ec 100644
--- a/c/src/lib/libbsp/powerpc/qoriq/startup/bspsmp.c
+++ b/c/src/lib/libbsp/powerpc/qoriq/startup/bspsmp.c
@@ -96,19 +96,7 @@ void bsp_start_on_secondary_processor(void)
   uint32_t cpu_index_self = _SMP_Get_current_processor();
   const Per_CPU_Control *cpu_self = _Per_CPU_Get_by_index(cpu_index_self);
 
-  ppc_exc_initialize_with_vector_base(
-    (uintptr_t) cpu_self->interrupt_stack_low,
-    rtems_configuration_get_interrupt_stack_size(),
-    bsp_exc_vector_base
-  );
-
-  /* Now it is possible to make the code execute only */
-  qoriq_mmu_change_perm(
-    FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SX,
-    FSL_EIS_MAS3_SX,
-    FSL_EIS_MAS3_SR
-  );
-
+  qoriq_initialize_exceptions(cpu_self->interrupt_stack_low);
   bsp_interrupt_facility_initialize();
 
   start_thread_if_necessary(cpu_index_self);
diff --git a/c/src/lib/libbsp/powerpc/qoriq/startup/bspstart.c b/c/src/lib/libbsp/powerpc/qoriq/startup/bspstart.c
index 7aba178806..58f930ee22 100644
--- a/c/src/lib/libbsp/powerpc/qoriq/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/qoriq/startup/bspstart.c
@@ -110,6 +110,63 @@ static void initialize_frequency_parameters(void)
   rtems_counter_initialize_converter(fdt32_to_cpu(*val_fdt));
 }
 
+#define MTIVPR(base) \
+  __asm__ volatile ("mtivpr %0" : : "r" (base))
+
+#define MTIVOR(vec, offset) \
+  do { \
+    __asm__ volatile ("mtspr " RTEMS_XSTRING(vec) ", %0" : : "r" (offset)); \
+    offset += 16; \
+  } while (0)
+
+void qoriq_initialize_exceptions(void *interrupt_stack_begin)
+{
+  uintptr_t addr;
+
+  ppc_exc_initialize_interrupt_stack(
+    (uintptr_t) interrupt_stack_begin,
+    rtems_configuration_get_interrupt_stack_size()
+  );
+
+  addr = (uintptr_t) bsp_exc_vector_base;
+  MTIVPR(addr);
+  MTIVOR(BOOKE_IVOR0,  addr);
+  MTIVOR(BOOKE_IVOR1,  addr);
+  MTIVOR(BOOKE_IVOR2,  addr);
+  MTIVOR(BOOKE_IVOR3,  addr);
+  MTIVOR(BOOKE_IVOR4,  addr);
+  MTIVOR(BOOKE_IVOR5,  addr);
+  MTIVOR(BOOKE_IVOR6,  addr);
+#ifdef __PPC_CPU_E6500__
+  MTIVOR(BOOKE_IVOR7,  addr);
+#endif
+  MTIVOR(BOOKE_IVOR8,  addr);
+#ifdef __PPC_CPU_E6500__
+  MTIVOR(BOOKE_IVOR9,  addr);
+#endif
+  MTIVOR(BOOKE_IVOR10, addr);
+  MTIVOR(BOOKE_IVOR11, addr);
+  MTIVOR(BOOKE_IVOR12, addr);
+  MTIVOR(BOOKE_IVOR13, addr);
+  MTIVOR(BOOKE_IVOR14, addr);
+  MTIVOR(BOOKE_IVOR15, addr);
+  MTIVOR(BOOKE_IVOR32, addr);
+  MTIVOR(BOOKE_IVOR33, addr);
+#ifndef __PPC_CPU_E6500__
+  MTIVOR(BOOKE_IVOR34, addr);
+#endif
+  MTIVOR(BOOKE_IVOR35, addr);
+#ifdef __PPC_CPU_E6500__
+  MTIVOR(BOOKE_IVOR36, addr);
+  MTIVOR(BOOKE_IVOR37, addr);
+  MTIVOR(BOOKE_IVOR38, addr);
+  MTIVOR(BOOKE_IVOR39, addr);
+  MTIVOR(BOOKE_IVOR40, addr);
+  MTIVOR(BOOKE_IVOR41, addr);
+  MTIVOR(BOOKE_IVOR42, addr);
+#endif
+}
+
 void bsp_start(void)
 {
   unsigned long i = 0;
@@ -140,21 +197,7 @@ void bsp_start(void)
     }
   }
 
-  /* Initialize exception handler */
-  ppc_exc_initialize_with_vector_base(
-    (uintptr_t) bsp_section_work_begin,
-    rtems_configuration_get_interrupt_stack_size(),
-    bsp_exc_vector_base
-  );
-
-  /* Now it is possible to make the code execute only */
-  qoriq_mmu_change_perm(
-    FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SX,
-    FSL_EIS_MAS3_SX,
-    FSL_EIS_MAS3_SR
-  );
-
-  /* Initalize interrupt support */
+  qoriq_initialize_exceptions(bsp_section_work_begin);
   bsp_interrupt_initialize();
 
   rtems_cache_coherent_add_area(
diff --git a/c/src/lib/libbsp/powerpc/qoriq/startup/mmu-config.c b/c/src/lib/libbsp/powerpc/qoriq/startup/mmu-config.c
index 3e572302ab..f3375ee824 100644
--- a/c/src/lib/libbsp/powerpc/qoriq/startup/mmu-config.c
+++ b/c/src/lib/libbsp/powerpc/qoriq/startup/mmu-config.c
@@ -48,7 +48,7 @@ typedef struct {
 	.begin = (uint32_t) b, \
 	.size = (uint32_t) s, \
 	.mas2 = 0, \
-	.mas3 = FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SX \
+	.mas3 = FSL_EIS_MAS3_SX \
 }
 
 #define ENTRY_R(b, s) { \