add support for mpc551x based GW_LCFM system

8 files changed, 325 insertions, 59 deletions

diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog b/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog
index b43d1b77d7..0a842a61a5 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog
@@ -1,3 +1,9 @@
+2010-03-25	Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
+
+	* Makefile.am, confiugre.ac, include/bsp.h, startup/bspstart.c,
+	startup/start.S:
+	add support for GW_LCFM mpc551x based system
+
 2009-10-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
 
 	* Makefile.am: Update for exception support changes.
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am b/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am
index 394132bd30..a099f01d8f 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am
@@ -58,11 +58,11 @@ libbsp_a_SOURCES += ../../shared/src/irq-generic.c \
     ../../shared/src/irq-shell.c
 
 # tests
-libbsp_a_SOURCES += ../../shared/timerstub.c
-
-# tests
 libbsp_a_SOURCES += tests/tests.c startup/sd-card-init.c
 
+# bsp_i2c
+libbsp_a_SOURCES += i2c/i2c_init.c
+
 # Network
 if HAS_NETWORKING
 noinst_PROGRAMS += network.rel
@@ -78,13 +78,14 @@ libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
     ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
     ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/misc.rel \
     ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/irq.rel \
+    ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/siu.rel \
     ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/edma.rel \
     ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/emios.rel \
     ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/dspi.rel \
     ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/esci.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel
-
+    ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
+    ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/timer.rel
 if HAS_NETWORKING
 libbsp_a_LIBADD += network.rel
 endif
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac b/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac
index 0fc9e31313..303367629d 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac
@@ -28,22 +28,52 @@ RTEMS_BSPOPTS_HELP([UARTS_USE_TERMIOS],
 [Define to 1 if you want termios support for every port.
  Termios support is independent of the choice of UART I/O mode.])
 
-RTEMS_BSPOPTS_SET([CONSOLE_MINOR],[*],[MPC55XX_ESCI_A_MINOR])
+RTEMS_BSPOPTS_SET([CONSOLE_MINOR],[GWLCFM],[MPC55XX_ESCI_A_MINOR])
+RTEMS_BSPOPTS_SET([CONSOLE_MINOR],[*]     ,[MPC55XX_ESCI_A_MINOR])
 RTEMS_BSPOPTS_HELP([CONSOLE_MINOR],
 [Must be defined to be one of MPC55XX_ESCI_A_MINOR or MPC55XX_ESCI_B_MINOR.  Determines which
  device will be registered as /dev/console.])
 
-RTEMS_BSPOPTS_SET([UARTS_IO_MODE],[*],[0])
+RTEMS_BSPOPTS_SET([UARTS_IO_MODE],[GWLCFM],[1])
+RTEMS_BSPOPTS_SET([UARTS_IO_MODE],[*]     ,[0])
 RTEMS_BSPOPTS_HELP([UARTS_IO_MODE],
 [Define to 1 if you want interrupt-driven I/O for the SCI ports.])
 
-RTEMS_BSPOPTS_SET([PRINTK_MINOR],[*],[MPC55XX_ESCI_B_MINOR])
+RTEMS_BSPOPTS_SET([PRINTK_MINOR],[GWLCFM],[MPC55XX_ESCI_A_MINOR])
+RTEMS_BSPOPTS_SET([PRINTK_MINOR],[*]     ,[MPC55XX_ESCI_B_MINOR])
 RTEMS_BSPOPTS_HELP([PRINTK_MINOR],
 [Must be defined to be one of MPC55XX_ESCI_A_MINOR or MPC55XX_ESCI_B_MINOR.  Determines which
  device is used for output by printk().  The printk port always uses polled
  I/O.  Don't open the printk port from RTEMS unless also using polled I/O
  for the SCI ports.])
 
+RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_REF_CLOCK],[GWLCFM],[40000000])
+RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_REF_CLOCK],[*]     ,[8000000])
+RTEMS_BSPOPTS_HELP([MPC55XX_FMPLL_REF_CLOCK],
+[Must be defined to be the external reference clock (in Hz) 
+ for clock generation])
+
+RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_CLK_OUT],[GWLCFM],[66000000])
+RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_CLK_OUT],[*]     ,[128000000])
+RTEMS_BSPOPTS_HELP([MPC55XX_FMPLL_REF_CLOCK],
+[Must be defined to be the PLL output clock (in Hz) for clock generation])
+
+RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_PREDIV],[GWLCFM],[10])
+RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_PREDIV],[*]     ,[1])
+RTEMS_BSPOPTS_HELP([MPC55XX_FMPLL_PREDIV],
+[Must be defined to be the PLL predivider factor for clock generation])
+
+RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_MFD],[GWLCFM],[99])
+RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_MFD],[*]     ,[12])
+RTEMS_BSPOPTS_HELP([MPC55XX_FMPLL_MFD],
+[Must be defined to be the PLL multiplication factor for clock generation])
+
+RTEMS_BSPOPTS_SET([MPC55XX_CHIP_DERIVATE],[*]         ,[5554])
+RTEMS_BSPOPTS_SET([MPC55XX_CHIP_DERIVATE],[MPC5566EVB],[5566])
+RTEMS_BSPOPTS_SET([MPC55XX_CHIP_DERIVATE],[GWLCFM]    ,[5516])
+RTEMS_BSPOPTS_HELP([MPC55XX_CHIP_DERIVATE],
+[specifies the chip derivate in use (e.g. 5554 for MPC5554)])
+
 AC_CONFIG_FILES([Makefile
 include/bspopts.h])
 
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/i2c/i2c_init.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/i2c/i2c_init.c
new file mode 100644
index 0000000000..db07b67948
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/i2c/i2c_init.c
@@ -0,0 +1,112 @@
+/*===============================================================*\
+| Project: RTEMS support for GWLCFM                               |
++-----------------------------------------------------------------+
+|                    Copyright (c) 2010                           |
+|                    Embedded Brains GmbH                         |
+|                    Obere Lagerstr. 30                           |
+|                    D-82178 Puchheim                             |
+|                    Germany                                      |
+|                    rtems@embedded-brains.de                     |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be         |
+| found in the file LICENSE in this distribution or at            |
+|                                                                 |
+| http://www.rtems.com/license/LICENSE.                           |
+|                                                                 |
++-----------------------------------------------------------------+
+| this file contains the low level MPC5516 I2C driver parameters  |
+\*===============================================================*/
+#if 0 /* FIXME: make this work... */
+#include <mpc55xx/mpc55xx_i2cdrv.h>
+#include <libchip/i2c-2b-eeprom.h>
+#include <bsp/irq.h>
+#include <bsp.h>
+
+static mpc55xx_i2c_desc_t mpc55xx_i2c_bus_tbl[] = {
+  /* first channel */
+  {
+    {/* public fields */
+      .ops = &mpc55xx_i2c_ops,
+      .size = sizeof(mpc55xx_i2c_bus_tbl[0]),
+    },
+    { /* our private fields */
+      .reg_ptr = &mpc55xx.i2c[0],
+      .initialized = FALSE,
+      .irq_number = BSP_IPIC_IRQ_I2C1,
+      .base_frq = 0 /* will be set during initiailization */
+    }
+  }
+};
+
+rtems_libi2c_bus_t *mpc55xx_i2c_bus_descriptor[] = {
+  &mpc55xx_i2c_bus_tbl[0].bus_desc
+};
+
+/*=========================================================================*\
+| Function:                                                                 |
+\*-------------------------------------------------------------------------*/
+rtems_status_code bsp_register_i2c
+(
+/*-------------------------------------------------------------------------*\
+| Purpose:                                                                  |
+|   register I2C busses and devices                                         |
++---------------------------------------------------------------------------+
+| Input Parameters:                                                         |
+\*-------------------------------------------------------------------------*/
+ void                                    /* <none>                         */
+)
+/*-------------------------------------------------------------------------*\
+| Return Value:                                                             |
+|    0 or error code                                                        |
+\*=========================================================================*/
+
+{
+  int ret_code;
+  int i2c1_busno,i2c2_busno;
+
+  /*
+   * init I2C library (if not already done)
+   */
+  rtems_libi2c_initialize ();
+
+  /*
+   * FIXME: update input frequency of I2c modules into descriptor
+   */
+#if 0
+  /*
+   * I2C1 is clocked with TSEC 1
+   */
+  if (((mpc55xx.clk.sccr >> (31-1)) & 0x03) > 0) {
+    mpc55xx_i2c_bus_tbl[0].softc.base_frq =
+      (BSP_bus_frequency
+       /((mpc55xx.clk.sccr >> (31-1)) & 0x03));
+  }
+#endif
+  mpc55xx_i2c_bus_tbl[1].softc.base_frq = BSP_bus_frequency;
+  /*
+   * register first I2C bus
+   */
+  ret_code = rtems_libi2c_register_bus("/dev/i2c1",
+				       mpc55xx_i2c_bus_descriptor[0]);
+  if (ret_code < 0) {
+    return -ret_code;
+  }
+  i2c1_busno = ret_code;
+
+#ifdef RTEMS_BSP_I2C_EEPROM_DEVICE_NAME
+
+  /*
+   * register EEPROM to bus 1, Address 0x50
+   */
+  ret_code = rtems_libi2c_register_drv(RTEMS_BSP_I2C_EEPROM_DEVICE_NAME,
+				       i2c_2b_eeprom_driver_descriptor,
+				       i2c1_busno,0x50);
+
+  if (ret_code < 0) {
+    return -ret_code;
+  }
+
+#endif /* RTEMS_BSP_I2C_EEPROM_DEVICE_NAME */
+  return 0;
+}
+#endif /* 0 */
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h b/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h
index 57a3c81d48..5ca098e340 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h
@@ -43,6 +43,10 @@ extern unsigned int bsp_clock_speed;
 /** @brief Time base clicks per micro second */
 extern uint32_t bsp_clicks_per_usec;
 
+/** @brief Convert Decrementer ticks to microseconds */
+#define BSP_Convert_decrementer( _value ) \
+  (((unsigned long long) (_value)) / ((unsigned long long)bsp_clicks_per_usec))
+
 rtems_status_code mpc55xx_sd_card_init( bool mount);
 
 /* Network driver configuration */
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/gwlcfm.cfg b/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/gwlcfm.cfg
new file mode 100644
index 0000000000..084d1e772e
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/gwlcfm.cfg
@@ -0,0 +1,10 @@
+##
+#
+# @file
+#
+# @ingroup mpc55xx_config
+#
+# @brief configuration file for the GWLCFM MPC5516 board
+#
+
+include $(RTEMS_ROOT)/make/custom/mpc55xx.cfg
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c
index 10e3881fe4..76cb8fef2e 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c
@@ -21,6 +21,8 @@
 #include <mpc55xx/mpc55xx.h>
 #include <mpc55xx/regs.h>
 #include <mpc55xx/edma.h>
+#include <mpc55xx/emios.h>
+#include <mpc55xx/siu.h>
 
 #include <rtems.h>
 
@@ -90,40 +92,154 @@ void bsp_predriver_hook()
 	}
 }
 
-static void mpc55xx_ebi_init()
+#if ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))
+/*
+ * define init values for FMPLL ESYNCRx
+ * (used in start.S/fmpll.S)
+ */
+#define EPREDIV_VAL (MPC55XX_FMPLL_PREDIV-1)
+#define EMFD_VAL    (MPC55XX_FMPLL_MFD-16)
+#define VCO_CLK_REF (MPC55XX_FMPLL_REF_CLOCK/(EPREDIV_VAL+1))
+#define VCO_CLK_OUT (VCO_CLK_REF*(EMFD_VAL+16))
+#define ERFD_VAL    ((VCO_CLK_OUT/MPC55XX_FMPLL_CLK_OUT)-1)
+
+const struct fmpll_syncr_vals_t {
+  union ESYNCR2_tag esyncr2_temp;
+  union ESYNCR2_tag esyncr2_final;
+  union ESYNCR1_tag esyncr1_final;
+} fmpll_syncr_vals = 
+  {
+    { /* esyncr2_temp */
+      .B.LOCEN=0,
+      .B.LOLRE=0,
+      .B.LOCRE=0,
+      .B.LOLIRQ=0,
+      .B.LOCIRQ=0,
+      .B.ERATE=0,
+      .B.DEPTH=0,
+      .B.ERFD=ERFD_VAL+2 /* reduce output clock during init */
+    },
+    { /* esyncr2_final */
+      .B.LOCEN=0,
+      .B.LOLRE=0,
+      .B.LOCRE=0,
+      .B.LOLIRQ=0,
+      .B.LOCIRQ=0,
+      .B.ERATE=0,
+      .B.DEPTH=0,
+      .B.ERFD=ERFD_VAL /* nominal output clock after init */
+    },
+    { /* esyncr1_final */
+      .B.CLKCFG=7,
+      .B.EPREDIV=EPREDIV_VAL,
+      .B.EMFD=EMFD_VAL
+    }
+  };
+
+#else /* ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */
+
+const struct fmpll_syncr_vals_t {
+  union SYNCR_tag syncr_temp;
+  union SYNCR_tag syncr_final;
+} fmpll_syncr_vals = 
+  {
+    { /* syncr_temp */
+      .B.PREDIV=MPC55XX_FMPLL_PREDIV-1,
+      .B.MFD=MPC55XX_FMPLL_MFD,
+      .B.RFD=2,
+      .B.LOCEN=1
+    },
+    { /* syncr_final */
+      .B.PREDIV=MPC55XX_FMPLL_PREDIV-1,
+      .B.MFD=MPC55XX_FMPLL_MFD,
+      .B.RFD=0,
+      .B.LOCEN=1
+    }
+  };
+
+#endif /* ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */
+
+#if defined(GWLCFM)
+static const mpc55xx_siu_pcr_entry_t siu_pcr_list[] = {
+  {  0,16,{.B.PA = 1,           .B.WPE = 0}}, /* PA[ 0..15] analog input */
+  { 16, 4,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PB[ 0.. 4] LED/CAN_STBN out */
+  { 20, 2,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PB[ 5.. 6] CAN_ERR/USBFLGC in*/
+  { 22, 1,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PB[ 7    ] FR_A_EN out */
+  { 23, 4,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PB[ 8..10] IRQ/FR_A_ERR/USB_RDYin */
+  { 27, 1,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PB[11..11] FR_STBN out */
+
+  { 32, 2,{.B.PA = 2,.B.OBE = 1,.B.WPE = 0}}, /* PC[ 0.. 1] FR_A_TX/TXEN out */
+  { 34, 1,{.B.PA = 2,.B.IBE = 1,.B.WPE = 0}}, /* PC[ 2.. 2] FR_A_RX in */
+  { 35, 2,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PC[ 3.. 4] INIT_ERR/ISB_IRQ in */
+  { 37, 2,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PC[ 5.. 6] PWRO1/2_ON out */
+  { 39, 1,{.B.PA = 2,.B.IBE = 1,.B.WPE = 0}}, /* PC[ 7.. 7] FR_B_RX in */
+  { 40, 2,{.B.PA = 2,.B.OBE = 1,.B.WPE = 0}}, /* PC[ 8.. 9] FR_B_TX/TXEN out */
+  { 42, 1,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PC[10    ] FR_B_EN out */
+  { 43, 1,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PC[11    ] FOR_STATUS in */
+  { 44, 1,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PC[12    ] FR_B_ERRN  in */
+  { 45, 1,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PC[13    ] HS_CAN_STBN out */
+  { 46, 1,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PC[14    ] HS_CAN_ERR in */
+  { 47, 1,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PC[15    ] HS_CAN_EN out */
+
+  { 48, 1,{.B.PA = 1,.B.OBE = 1,.B.WPE = 0}}, /* PD[ 0    ] HS_CAN_TX out */
+  { 49, 1,{.B.PA = 1,.B.IBE = 1,.B.WPE = 0}}, /* PD[ 1    ] HS_CAN_RX in  */
+  { 50, 2,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PD[ 2.. 3] PWRO1/2_OC in */
+  { 52, 1,{.B.PA = 1,.B.OBE = 1,.B.WPE = 0}}, /* PD[ 4    ] LS_CAN_TX out */
+  { 53, 1,{.B.PA = 1,.B.IBE = 1,.B.WPE = 0}}, /* PD[ 5    ] LS_CAN_RX in  */
+  { 54, 1,{.B.PA = 1,.B.OBE = 1,.B.WPE = 0}}, /* PD[ 6    ] HS_CAN_TX out */
+  { 55, 1,{.B.PA = 1,.B.IBE = 1,.B.WPE = 0}}, /* PD[ 7    ] HS_CAN_RX in  */
+  { 56, 1,{.B.PA = 2,.B.IBE = 1,.B.OBE = 1,.B.WPE = 0}}, 
+  /* PD[ 8    ] I2C_SCL in/out */
+  { 57, 1,{.B.PA = 2,.B.IBE = 1,.B.OBE = 1,.B.WPE = 0}}, 
+  /* PD[ 9    ] I2C_SDA in/out */
+  { 58, 4,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PD[10..13] LS_CAN_EN/LED out*/
+  { 62, 4,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PD[14..15] USB_FLGA/B    in */
+
+  { 64, 3,{.B.PA = 3,.B.IBE = 1,.B.WPE = 0}}, /* PE[ 0.. 2] MLBCLK/SI/DI  in */
+  { 67, 2,{.B.PA = 3,.B.OBE = 1,.B.WPE = 0}}, /* PE[ 3.. 4] MLBSO/DO      out*/
+  { 69, 1,{.B.PA = 3,.B.IBE = 1,.B.WPE = 0}}, /* PE[ 5.. 5] MLBSLOT       in */
+  { 70, 1,{.B.PA = 1,.B.OBE = 1,.B.WPE = 0}}, /* PE[ 6.. 6] CLKOUT        out*/
+  { 80, 1,{.B.PA = 1,.B.OBE = 1,.B.WPE = 0}}, /* PF[ 0.. 0] RD_WR         out*/
+  { 81, 1,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PF[ 1.. 1] (nc)          in */
+  { 82,14,{.B.PA = 1,.B.OBE = 1,.B.WPE = 0}}, /* PF[ 2..14] ADDR/CS/...   out*/
+  { 96,16,{.B.PA = 1,.B.IBE = 1,.B.OBE = 1,.B.WPE = 0}}, 
+  /* PG[ 0..15] AD16..31   in/out*/
+
+  {112, 3,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 0.. 2] LED_EXT1-3.   out*/
+  {115, 1,{.B.PA = 3,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 3.. 3] CS2_ETH       out*/
+  {116, 2,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 4.. 5] FR/HC_TERM    out*/
+  {118, 1,{.B.PA = 2,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 6.. 6] LIN_Tx        out*/
+  {119, 1,{.B.PA = 2,.B.IBE = 1,.B.WPE = 0}}, /* PH[ 7.. 7] LIN_Rx        in */
+  {120, 4,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 8..11] LIN_SLP,RST   out*/
+
+  {0,0}
+};
+
+#else /* MPC55xxEVB */
+
+static const mpc55xx_siu_pcr_entry_t siu_pcr_list[] = {
+  {  0, 1,{.B.PA = 1,.B.DSC = 1,.B.WPE=1,.B.WPS=1}}, /* !CS  [0]      */
+  {  3, 1,{.B.PA = 1,.B.DSC = 1,.B.WPE=1,.B.WPS=1}}, /* !CS  [3]      */
+  {  4,24,{.B.PA = 1,.B.DSC = 1                  }}, /* ADDR [8 : 31] */
+  { 28,16,{.B.PA = 1,.B.DSC = 1                  }}, /* DATA [0 : 15] */
+  { 62, 8,{.B.PA = 1,.B.DSC = 1,.B.WPE=1,.B.WPS=1}}, /* RD_!WR, BDIP, 
+							!WE, !OE, !TS */
+  { 89, 2,{.B.PA = 1                             }}, /* ESCI_B        */
+
+  {0,0}
+};
+#endif /* GWLCFM */
+
+static void mpc55xx_ebi_init(void)
 {
 	struct EBI_CS_tag cs = { .BR = MPC55XX_ZERO_FLAGS, .OR = MPC55XX_ZERO_FLAGS };
-	union SIU_PCR_tag pcr = MPC55XX_ZERO_FLAGS;
 	struct MMU_tag mmu = MMU_DEFAULT;
-	int i = 0;
-
-	/* ADDR [8 : 31] */
-	for (i = 4; i < 4 + 24; ++i) {
-		SIU.PCR [i].R = 0x440;
-	}
-
-	/* DATA [0 : 15] */
-	for (i = 28; i < 28 + 16; ++i) {
-		SIU.PCR [i].R = 0x440;
-	}
-
-	/* RD_!WR */
-	SIU.PCR [62].R = 0x443;
-
-	/* !BDIP */
-	SIU.PCR [63].R = 0x443;
-
-	/* !WE [0 : 3] */
-	for (i = 64; i < 64 + 4; ++i) {
-		SIU.PCR [i].R = 0x443;
-	}
-
-	/* !OE */
-	SIU.PCR [68].R = 0x443;
-
-	/* !TS */
-	SIU.PCR [69].R = 0x443;
-
+	
+	/*
+	 * init I/O pins to proper state
+	 */
+	mpc55xx_siu_pcr_init(&SIU,
+			     siu_pcr_list);
 	/* External SRAM (2 wait states, 512kB, 4 word burst) */
 
 	cs.BR.B.BA = 0;
@@ -140,9 +256,6 @@ static void mpc55xx_ebi_init()
 
 	EBI.CS [0] = cs;
 
-	/* !CS [0] */
-	SIU.PCR [0].R = 0x443;
-
 	/* External Ethernet Controller (3 wait states, 64kB) */
 
 	mmu.MAS0.B.ESEL = 5;
@@ -178,9 +291,6 @@ static void mpc55xx_ebi_init()
 	cs.OR.B.BSCY = 0;
 
 	EBI.CS [3] = cs;
-
-	/* !CS [3] */
-	SIU.PCR [3].R = 0x443;
 }
 
 /**
@@ -192,13 +302,9 @@ void bsp_start(void)
 	ppc_cpu_id_t myCpu;
 	ppc_cpu_revision_t myCpuRevision;
 
-	uint32_t interrupt_stack_start = bsp_ram_end - 2 * MPC55XX_INTERRUPT_STACK_SIZE;
+	uintptr_t interrupt_stack_start = (uintptr_t)bsp_ram_end - 2 * MPC55XX_INTERRUPT_STACK_SIZE;
 	uint32_t interrupt_stack_size = MPC55XX_INTERRUPT_STACK_SIZE;
 
-	/* ESCI pad configuration */
-	SIU.PCR [89].R = 0x400;
-	SIU.PCR [90].R = 0x400;
-
 	RTEMS_DEBUG_PRINT( "BSP start ...\n");
 
 	RTEMS_DEBUG_PRINT( "System clock          : %i\n", mpc55xx_get_system_clock());
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start.S b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start.S
index 5bfe00f3f8..67efea8a99 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start.S
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start.S
@@ -18,11 +18,6 @@
  * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
  */
 
-#warning Call to boot_card has changed and needs checking.
-#warning The call is "void boot_card(const char* cmdline);"
-#warning You need to pass a NULL.
-#warning Please check and remove these warnings.
-
 /**
  * @defgroup mpc55xx_asm Assembler files
  *
@@ -34,13 +29,14 @@
 
 .section ".entry", "ax"
 PUBLIC_VAR (start)
-start:
+.globl  fmpll_syncr_vals
+bam_rchw:
 /*
  * BAM
  */
 
 	/* BAM: RCHW */
-	.int 0x5a0000
+	.int 0x005a0000
 
 	/* BAM: Address of start instruction */
 	.int 0x8
@@ -48,7 +44,7 @@ start:
 /*
  * Enable time base
  */
-
+start:	
 	li r0, 0
 	mtspr TBWU, r0
 	mtspr TBWL, r0
@@ -60,6 +56,7 @@ start:
  * System clock
  */
 
+	LWI r3,fmpll_syncr_vals
 	bl SYM (mpc55xx_fmpll_reset_config)
 
 /*
@@ -122,7 +119,7 @@ start:
 	tlbwe
 
 /*
- * Zero RAM
+ * Zero RAM (needed to get proper ECC)
  */
 
 	/* Addresses */