2003-06-13 Till Straumann <strauman@slac.stanford.edu>

	PR 415/bsps
	* include/bsp.h, pci/detect_raven_bridge.c, startup/bspstart.c:
	Support enabling MCP exceptions on the host bridge. This can
	be used for memory probing on the VME bus.

4 files changed, 60 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/powerpc/shared/ChangeLog b/c/src/lib/libbsp/powerpc/shared/ChangeLog
index a76dceb019..f292edd127 100644
--- a/c/src/lib/libbsp/powerpc/shared/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/shared/ChangeLog
@@ -1,3 +1,10 @@
+2003-06-13  Till Straumann <strauman@slac.stanford.edu>
+
+	PR 415/bsps
+	* include/bsp.h, pci/detect_raven_bridge.c, startup/bspstart.c:
+	Support enabling MCP exceptions on the host bridge. This can
+	be used for memory probing on the VME bus.
+
 2003-04-15	Joel Sherrill <joel@OARcorp.com>
 
 	PR 386/bsps
diff --git a/c/src/lib/libbsp/powerpc/shared/include/bsp.h b/c/src/lib/libbsp/powerpc/shared/include/bsp.h
index b2062c3914..5e758343df 100644
--- a/c/src/lib/libbsp/powerpc/shared/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/shared/include/bsp.h
@@ -91,6 +91,21 @@ extern void rtemsReboot(void);
 extern int BSP_disconnect_clock_handler (void);
 extern int BSP_connect_clock_handler (void);
 
+/* clear hostbridge errors
+ *
+ * enableMCP: whether to enable MCP checkstop / machine check interrupts
+ *            on the hostbridge and in HID0.
+ *
+ *            NOTE: HID0 and MEREN are left alone if this flag is 0
+ *
+ * quiet    : be silent
+ *
+ * RETURNS  : raven MERST register contents (lowermost 16 bits), 0 if
+ *            there were no errors
+ */
+extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
+
+
 /*
  *  TM27 stuff
  */
diff --git a/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c b/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c
index 249aaa390f..feff4d1c0f 100644
--- a/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c
+++ b/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c
@@ -3,6 +3,7 @@
  */
 
 #include <libcpu/io.h>
+#include <libcpu/spr.h>
 
 #include <bsp.h>
 #include <bsp/pci.h>
@@ -12,6 +13,8 @@
 
 #include <rtems/bspIo.h>
 
+SPR_RW(HID0)
+
 #define RAVEN_MPIC_IOSPACE_ENABLE	0x1
 #define RAVEN_MPIC_MEMSPACE_ENABLE	0x2
 #define RAVEN_MASTER_ENABLE		0x4
@@ -19,11 +22,43 @@
 #define RAVEN_SYSTEM_ERROR_ENABLE	0x100
 #define RAVEN_CLEAR_EVENTS_MASK		0xf9000000
 
+#define RAVEN_MPIC_MEREN		0xfeff0020
+#define RAVEN_MPIC_MERST		0xfeff0024
+/* enable machine check on all conditions
+ * EXCEPT for signalled master abort (which
+ * can be caused by PCI configuration space
+ * accesses to non-present devices)
+ * - of course, this is sort of a hack :-(
+ */
+#define MEREN_VAL				0x2d00
+
 #define pci BSP_pci_configuration
 
 extern const pci_config_access_functions pci_direct_functions;
 extern const pci_config_access_functions pci_indirect_functions;
 
+unsigned long
+_BSP_clear_hostbridge_errors(int enableMCP, int quiet)
+{
+unsigned merst;
+
+		merst = in_be32(RAVEN_MPIC_MERST);
+		/* write back value to clear status */
+		out_be32(RAVEN_MPIC_MERST, merst);
+
+		if (enableMCP) {
+			if (!quiet)
+				printk("Enabling MCP generation on hostbridge errors\n");
+			out_be32(RAVEN_MPIC_MEREN, MEREN_VAL);
+			_write_HID0(_read_HID0() | HID0_EMCP );
+		} else {
+			if ( !quiet && enableMCP ) {
+				printk("leaving MCP interrupt disabled\n");
+			}
+		}
+		return (merst & 0xffff);
+}
+
 void detect_host_bridge()
 {
   PPC_DEVICE *hostbridge;
diff --git a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
index 37da84f3a8..a865742dad 100644
--- a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
@@ -323,6 +323,9 @@ void bsp_start( void )
   BSP_time_base_divisor			= (residualCopy.VitalProductData.TimeBaseDivisor?
 					   residualCopy.VitalProductData.TimeBaseDivisor : 4000);
 
+  /* clear hostbridge errors and enable MCP */
+  _BSP_clear_hostbridge_errors(1/*enableMCP*/, 0/*quiet*/);
+
   /* Allocate and set up the page table mappings
    * This is only available on >604 CPUs.
    *