diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2007-11-28 21:44:46 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2007-11-28 21:44:46 +0000 |
commit | 07e9642ce0a7a9123dbcd476d2761e7b0f241f38 (patch) | |
tree | 85ac803ec0fd5230128da7675d702f70c95757a6 /c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c | |
parent | 2007-11-28 Joel Sherrill <joel.sherrill@OARcorp.com> (diff) | |
download | rtems-07e9642ce0a7a9123dbcd476d2761e7b0f241f38.tar.bz2 |
2007-11-28 Joel Sherrill <joel.sherrill@OARcorp.com>
* startup/bspstart.c: Eliminate PowerPC specific elements from the CPU
Table. They have been replaced with variables named bsp_XXX as
needed.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c')
-rw-r--r-- | c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c | 35 |
1 files changed, 24 insertions, 11 deletions
diff --git a/c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c b/c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c index 700ac0c812..a33367030b 100644 --- a/c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c @@ -90,6 +90,19 @@ uint32_t _heap_start; uint32_t _heap_end; uint32_t _top_of_ram; +/* + * Driver configuration parameters + */ +uint32_t bsp_clicks_per_usec; +uint32_t bsp_serial_per_sec; /* Serial clocks per second */ +boolean bsp_serial_external_clock; +boolean bsp_serial_xon_xoff; +boolean bsp_serial_cts_rts; +uint32_t bsp_serial_rate; +uint32_t bsp_timer_average_overhead; /* Average overhead of timer in ticks */ +uint32_t bsp_timer_least_valid; /* Least valid number from timer */ +boolean bsp_timer_internal_clock; /* TRUE, when timer runs with CPU clk */ + /* Initialize whatever libc we are using * called from postdriver hook @@ -196,17 +209,17 @@ void bsp_start( void ) Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY; /* timebase register ticks/microsecond */ - Cpu_table.clicks_per_usec = (250000000 / 1000000); - - Cpu_table.serial_per_sec = 14625000; /* = (CPU Clock / UART Internal Clock Divisor) */ - Cpu_table.serial_external_clock = 0; - Cpu_table.timer_internal_clock = 1; - Cpu_table.serial_xon_xoff = 0; - Cpu_table.serial_cts_rts = 0; - Cpu_table.serial_rate = 115200; - Cpu_table.timer_average_overhead = 2; - Cpu_table.timer_least_valid = 3; - Cpu_table.exceptions_in_RAM = TRUE; + bsp_clicks_per_usec = (250000000 / 1000000); + + bsp_serial_per_sec = 14625000; + bsp_serial_external_clock = 0; + bsp_timer_internal_clock = 1; + bsp_serial_xon_xoff = 0; + bsp_serial_cts_rts = 0; + bsp_serial_rate = 115200; + bsp_timer_average_overhead = 2; + bsp_timer_least_valid = 3; + bsp_exceptions_in_RAM = TRUE; /* * Initialize some SPRG registers related to irq handling |