Whitespace removal.

13 files changed, 174 insertions, 174 deletions

diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/console/console.c b/c/src/lib/libbsp/powerpc/tqm8xx/console/console.c
index 6ca12de107..90ac1a4aed 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/console/console.c
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/console/console.c
@@ -242,11 +242,11 @@ sccBRGval (int baud)
 typedef struct {
   uint32_t reg_content;
   int link_cnt;
-}brg_state_t; 
+}brg_state_t;
 brg_state_t scc_brg_state[BRG_CNT];
 
 /*
- * initialize brg_state 
+ * initialize brg_state
  */
 static void sccBRGinit(void)
 {
@@ -318,7 +318,7 @@ static int sccBRGalloc(int chan,int baud)
   }
 #endif
 
-  rtems_interrupt_disable(level);  
+  rtems_interrupt_disable(level);
 
   if (new_brg < 0) {
     /* search for brg with this settings */
@@ -329,9 +329,9 @@ static int sccBRGalloc(int chan,int baud)
 	new_brg = brg_idx;
       }
     }
-    /* 
-     * if not found: check, whether brg currently in use 
-     * is linked only from our channel  
+    /*
+     * if not found: check, whether brg currently in use
+     * is linked only from our channel
      */
     if ((new_brg < 0) &&
 	(old_brg >= 0) &&
@@ -349,17 +349,17 @@ static int sccBRGalloc(int chan,int baud)
   }
 
   /* decrease old link count */
-  if ((old_brg >= 0) && 
+  if ((old_brg >= 0) &&
       (old_brg < 4)) {
     scc_brg_state[old_brg].link_cnt--;
   }
   /* increase new brg link count, set brg */
-  if ((new_brg >= 0) && 
+  if ((new_brg >= 0) &&
       (new_brg < 4)) {
     scc_brg_state[new_brg].link_cnt++;
     scc_brg_state[new_brg].reg_content = reg_val;
     (&m8xx.brgc1)[new_brg] = reg_val;
-  }  
+  }
   rtems_interrupt_enable(level);
 
   /* connect to scc/smc */
@@ -419,7 +419,7 @@ sccSetAttributes (int minor, const struct termios *t)
 }
 
 /*
- * Interrupt handler 
+ * Interrupt handler
  */
 static rtems_isr
 sccInterruptHandler (void *arg)
@@ -431,7 +431,7 @@ sccInterruptHandler (void *arg)
    */
   if (CHN_EVENT_GET(chan) & 0x1) {
     /*
-     * clear SCC event flag 
+     * clear SCC event flag
      */
     CHN_EVENT_CLR(chan,0x01);
     /*
@@ -448,8 +448,8 @@ sccInterruptHandler (void *arg)
       /*
        * clear status
        */
-      sccCurrRxBd[chan]->status = 
-	(sccCurrRxBd[chan]->status 
+      sccCurrRxBd[chan]->status =
+	(sccCurrRxBd[chan]->status
 	 & (M8xx_BD_WRAP | M8xx_BD_INTERRUPT))
 	| M8xx_BD_EMPTY;
       /*
@@ -480,7 +480,7 @@ sccInterruptHandler (void *arg)
     while((sccDequTxBd[chan] != sccPrepTxBd[chan]) &&
 	  ((sccDequTxBd[chan]->status & M8xx_BD_READY) == 0)) {
       if (sccttyp[chan] != NULL) {
-	rtems_termios_dequeue_characters (sccttyp[chan], 
+	rtems_termios_dequeue_characters (sccttyp[chan],
 					  sccDequTxBd[chan]->length);
       }
       /*
@@ -531,17 +531,17 @@ sccInitialize (int chan)
      * round up rxBuf[chan] to start at a cache line size
      */
     rxBuf[chan] = (sccRxBuf_t *)
-      (((uint32_t)rxBuf[chan]) + 
+      (((uint32_t)rxBuf[chan]) +
        (PPC_CACHE_ALIGNMENT
 	- ((uint32_t)rxBuf[chan]) % PPC_CACHE_ALIGNMENT));
   }
   /*
-   * Allocate buffer descriptors 
+   * Allocate buffer descriptors
    */
-  sccCurrRxBd[chan] = 
+  sccCurrRxBd[chan] =
     sccFrstRxBd[chan] = m8xx_bd_allocate(SCC_RXBD_CNT);
-  sccPrepTxBd[chan] = 
-    sccDequTxBd[chan] = 
+  sccPrepTxBd[chan] =
+    sccDequTxBd[chan] =
     sccFrstTxBd[chan] = m8xx_bd_allocate(SCC_TXBD_CNT);
   switch(chan) {
   case CONS_CHN_SCC1:
@@ -612,7 +612,7 @@ sccInitialize (int chan)
     /*
      * Configure port B pins to enable SMTXD1 and SMRXD1 pins
      */
-    m8xx.pbpar |=  0xC0; 
+    m8xx.pbpar |=  0xC0;
     m8xx.pbdir &= ~0xC0;
     break;
   case CONS_CHN_SMC2:
@@ -624,11 +624,11 @@ sccInitialize (int chan)
     break;
   }
   /*
-   * allocate and connect BRG 
+   * allocate and connect BRG
    */
   sccBRGalloc(chan,9600);
-  
-  
+
+
   /*
    * Set up SCCx parameter RAM common to all protocols
    */
@@ -640,7 +640,7 @@ sccInitialize (int chan)
     CHN_PARAM_SET(chan,mrblr,RXBUFSIZE);
   else
     CHN_PARAM_SET(chan,mrblr,1);
-  
+
   /*
    * Set up SCCx parameter RAM UART-specific parameters
    */
@@ -652,7 +652,7 @@ sccInitialize (int chan)
     m8xx_console_chan_desc[chan].parms.sccp->un.uart.character[0]=0x8000; /* no char filter */
     m8xx_console_chan_desc[chan].parms.sccp->un.uart.rccm=0x80FF; /* control character mask */
   }
-  
+
   /*
    * Set up the Receive Buffer Descriptors
    */
@@ -675,13 +675,13 @@ sccInitialize (int chan)
     sccFrstTxBd[chan][i].length = 0;
     sccFrstTxBd[chan][i].buffer = NULL;
   }
-  
+
   /*
    * Set up SCC general and protocol-specific mode registers
    */
   CHN_EVENT_CLR(chan,~0);	/* Clear any pending events */
   CHN_MASK_SET(chan,0);	        /* Mask all interrupt/event sources */
-	       
+
   if (m8xx_console_chan_desc[chan].is_scc) {
     m8xx_console_chan_desc[chan].regs.sccr->psmr = 0xb000; /* 8N1, CTS flow control */
     m8xx_console_chan_desc[chan].regs.sccr->gsmr_h = 0x00000000;
@@ -693,9 +693,9 @@ sccInitialize (int chan)
   /*
    * Send "Init parameters" command
    */
-  m8xx_cp_execute_cmd(M8xx_CR_OP_INIT_RX_TX 
+  m8xx_cp_execute_cmd(M8xx_CR_OP_INIT_RX_TX
 		      | m8xx_console_chan_desc[chan].cr_chan_code);
-  
+
   /*
    * Enable receiver and transmitter
    */
@@ -707,7 +707,7 @@ sccInitialize (int chan)
   }
 
   if (m8xx_scc_mode[chan] != TERMIOS_POLLED) {
-    
+
     rtems_irq_connect_data irq_conn_data = {
       m8xx_console_chan_desc[chan].ivec_src,
       sccInterruptHandler,         /* rtems_irq_hdl           */
@@ -735,9 +735,9 @@ sccPollRead (int minor)
     if ((sccCurrRxBd[chan]->status & M8xx_BD_EMPTY) != 0) {
       return -1;
     }
-    
-    if (0 == (sccCurrRxBd[chan]->status & (M8xx_BD_OVERRUN 
-					   | M8xx_BD_PARITY_ERROR 
+
+    if (0 == (sccCurrRxBd[chan]->status & (M8xx_BD_OVERRUN
+					   | M8xx_BD_PARITY_ERROR
 					   | M8xx_BD_FRAMING_ERROR
 					   | M8xx_BD_BREAK
 					   | M8xx_BD_IDLE))) {
@@ -749,8 +749,8 @@ sccPollRead (int minor)
        * clear status
        */
     }
-    sccCurrRxBd[chan]->status = 
-      (sccCurrRxBd[chan]->status 
+    sccCurrRxBd[chan]->status =
+      (sccCurrRxBd[chan]->status
        & (M8xx_BD_WRAP | M8xx_BD_INTERRUPT))
       | M8xx_BD_EMPTY;
     /*
@@ -788,8 +788,8 @@ sccInterruptWrite (int minor, const char *buf, int len)
     /*
      * clear status, set ready bit
      */
-    sccPrepTxBd[chan]->status = 
-      (sccPrepTxBd[chan]->status 
+    sccPrepTxBd[chan]->status =
+      (sccPrepTxBd[chan]->status
        & M8xx_BD_WRAP)
       | M8xx_BD_READY | M8xx_BD_INTERRUPT;
     if ((sccPrepTxBd[chan]->status & M8xx_BD_WRAP) != 0) {
@@ -808,18 +808,18 @@ sccPollWrite (int minor, const char *buf, int len)
   static char txBuf[CONS_CHN_CNT][SCC_TXBD_CNT];
   int chan = minor;
   int bd_used;
-  
+
   while (len--) {
     while (sccPrepTxBd[chan]->status & M8xx_BD_READY)
       continue;
     bd_used = sccPrepTxBd[chan]-sccFrstTxBd[chan];
     txBuf[chan][bd_used] = *buf++;
       rtems_cache_flush_multiple_data_lines((const void *)&txBuf[chan][bd_used],
-					    sizeof(txBuf[chan][bd_used]));    
+					    sizeof(txBuf[chan][bd_used]));
     sccPrepTxBd[chan]->buffer = &(txBuf[chan][bd_used]);
     sccPrepTxBd[chan]->length = 1;
-    sccPrepTxBd[chan]->status = 
-      (sccPrepTxBd[chan]->status 
+    sccPrepTxBd[chan]->status =
+      (sccPrepTxBd[chan]->status
        & M8xx_BD_WRAP)
       | M8xx_BD_READY;
     if ((sccPrepTxBd[chan]->status & M8xx_BD_WRAP) != 0) {
@@ -844,7 +844,7 @@ static void console_debug_putc_onlcr(const char c)
 
   if (BSP_output_chan != CONS_CHN_NONE) {
     rtems_interrupt_disable(irq_level);
-    
+
     if (c == '\n') {
       sccPollWrite (BSP_output_chan,&cr_chr,1);
     }
@@ -917,18 +917,18 @@ rtems_device_driver console_initialize(rtems_device_major_number  major,
        * Register the device
        */
       status = rtems_io_register_name (tty_name,
-				       major, 
+				       major,
 				       channel_list[entry].minor);
       if (status != RTEMS_SUCCESSFUL) {
 	rtems_fatal_error_occurred (status);
       }
-    }	  
+    }
   }
   /*
    * register /dev/console
    */
   status = rtems_io_register_name ("/dev/console",
-				   major, 
+				   major,
 				   CONSOLE_CHN);
   if (status != RTEMS_SUCCESSFUL) {
     rtems_fatal_error_occurred (status);
@@ -974,7 +974,7 @@ rtems_device_driver console_open(
     0			/* outputUsesInterrupts */
   };
 
-  if (m8xx_scc_mode[chan] == TERMIOS_IRQ_DRIVEN) {    
+  if (m8xx_scc_mode[chan] == TERMIOS_IRQ_DRIVEN) {
     status = rtems_termios_open (major, minor, arg, &interruptCallbacks);
     sccttyp[chan] = args->iop->data1;
   }
@@ -984,7 +984,7 @@ rtems_device_driver console_open(
   }
   return status;
 }
- 
+
 /*
  * Close the device
  */
@@ -1056,7 +1056,7 @@ static int scc_io_set_trm_char(rtems_device_minor_number minor,
     }
   }
   /*
-   * transfer characters 
+   * transfer characters
    */
   if (rc == RTEMS_SUCCESSFUL) {
     if (trm_char_info->char_cnt > CON8XX_TRM_CHAR_CNT) {
@@ -1066,7 +1066,7 @@ static int scc_io_set_trm_char(rtems_device_minor_number minor,
       /*
        * check, whether device is a SCC
        */
-      if ((rc == RTEMS_SUCCESSFUL) && 
+      if ((rc == RTEMS_SUCCESSFUL) &&
 	  !m8xx_console_chan_desc[minor].is_scc) {
 	rc = RTEMS_UNSATISFIED;
       }
@@ -1096,14 +1096,14 @@ rtems_device_driver console_control(
 				    rtems_device_minor_number minor,
 				    void                    * arg
 				    )
-{ 
+{
   rtems_libio_ioctl_args_t *ioa=arg;
 
   switch (ioa->command) {
 #if 0
   case CON8XX_IO_SET_TRM_CHAR:
     return scc_io_set_trm_char(minor, ioa);
-#endif    
+#endif
   default:
     return rtems_termios_ioctl (arg);
     break;
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/include/bsp.h b/c/src/lib/libbsp/powerpc/tqm8xx/include/bsp.h
index 24a45410c3..8544390f05 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/include/bsp.h
@@ -91,7 +91,7 @@ extern "C" {
 #include <mpc8xx/console.h>
 #include <bsp/vectors.h>
 #include <bsp/tqm.h>
-#include <libcpu/powerpc-utility.h> 
+#include <libcpu/powerpc-utility.h>
 
 /*
  * Network driver configuration
@@ -99,25 +99,25 @@ extern "C" {
 struct rtems_bsdnet_ifconfig;
 
 #if BSP_USE_NETWORK_FEC
-extern int rtems_fec_enet_driver_attach (struct rtems_bsdnet_ifconfig *config, 
+extern int rtems_fec_enet_driver_attach (struct rtems_bsdnet_ifconfig *config,
 					 int attaching);
 #define RTEMS_BSP_FEC_NETWORK_DRIVER_NAME	"fec1"
 #define RTEMS_BSP_FEC_NETWORK_DRIVER_ATTACH	rtems_fec_enet_driver_attach
 #endif
 
 #if BSP_USE_NETWORK_SCC
-extern int rtems_scc_enet_driver_attach (struct rtems_bsdnet_ifconfig *config, 
+extern int rtems_scc_enet_driver_attach (struct rtems_bsdnet_ifconfig *config,
 					 int attaching);
 #define RTEMS_BSP_SCC_NETWORK_DRIVER_NAME	"scc1"
 #define RTEMS_BSP_SCC_NETWORK_DRIVER_ATTACH	rtems_scc_enet_driver_attach
 #endif
 
 #if BSP_USE_NETWORK_FEC
-#define RTEMS_BSP_NETWORK_DRIVER_NAME	RTEMS_BSP_FEC_NETWORK_DRIVER_NAME	
-#define RTEMS_BSP_NETWORK_DRIVER_ATTACH	RTEMS_BSP_FEC_NETWORK_DRIVER_ATTACH	
+#define RTEMS_BSP_NETWORK_DRIVER_NAME	RTEMS_BSP_FEC_NETWORK_DRIVER_NAME
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH	RTEMS_BSP_FEC_NETWORK_DRIVER_ATTACH
 #elif BSP_USE_NETWORK_SCC
-#define RTEMS_BSP_NETWORK_DRIVER_NAME	RTEMS_BSP_SCC_NETWORK_DRIVER_NAME	
-#define RTEMS_BSP_NETWORK_DRIVER_ATTACH	RTEMS_BSP_SCC_NETWORK_DRIVER_ATTACH	
+#define RTEMS_BSP_NETWORK_DRIVER_NAME	RTEMS_BSP_SCC_NETWORK_DRIVER_NAME
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH	RTEMS_BSP_SCC_NETWORK_DRIVER_ATTACH
 #endif
 /*
  * We need to decide how much memory will be non-cacheable. This
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/include/irq.h b/c/src/lib/libbsp/powerpc/tqm8xx/include/irq.h
index 2ada75bd43..6baaeafb87 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/include/irq.h
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/include/irq.h
@@ -31,7 +31,7 @@
 #include <rtems/irq-extension.h>
 
 /*
- * the following definitions specify the indices used 
+ * the following definitions specify the indices used
  * to interface the interrupt handler API
  */
 
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/include/tqm.h b/c/src/lib/libbsp/powerpc/tqm8xx/include/tqm.h
index 31500e25f2..bb0daf5396 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/include/tqm.h
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/include/tqm.h
@@ -29,7 +29,7 @@ typedef struct {
   uint32_t sdram_size;  /* existing SDRAM size */
   uint32_t flash_base;  /* start address flash */
   uint32_t flash_size;  /* existing Flash size */
-  uint32_t flash_offset; 
+  uint32_t flash_offset;
   uint32_t sram_base;   /* start address sram                */
   uint32_t sram_size;   /* existing sram size                */
   uint32_t immr_base;   /* start address internal memory map */
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.c b/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.c
index 2e3e9ef02e..1e87902566 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.c
@@ -68,11 +68,11 @@ rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number irqnum)
   if (BSP_IS_CPM_IRQ(irqnum)) {
     bsp_irq_enable_at_CPM(irqnum);
     return RTEMS_SUCCESSFUL;
-  } 
+  }
   else if (BSP_IS_SIU_IRQ(irqnum)) {
     bsp_irq_enable_at_SIU(irqnum);
     return RTEMS_SUCCESSFUL;
-  } 
+  }
   return RTEMS_INVALID_ID;
 }
 
@@ -81,11 +81,11 @@ rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number irqnum)
   if (BSP_IS_CPM_IRQ(irqnum)) {
     bsp_irq_disable_at_CPM(irqnum);
     return RTEMS_SUCCESSFUL;
-  } 
+  }
   else if (BSP_IS_SIU_IRQ(irqnum)) {
     bsp_irq_disable_at_SIU(irqnum);
     return RTEMS_SUCCESSFUL;
-  } 
+  }
   return RTEMS_INVALID_ID;
 }
 
@@ -100,13 +100,13 @@ static int BSP_irq_handle_at_cpm(void)
   /* Get vector number: write IACK=1, then read vectir */
   m8xx.civr = 1;
   cpvecnum  = (m8xx.civr >> 11) + BSP_CPM_IRQ_LOWEST_OFFSET;
-  
+
   /*
    * Check the vector number,
    * enable exceptions and dispatch the handler.
    * NOTE: lower-prio interrupts are automatically masked in CPIC
    */
-  if (BSP_IS_CPM_IRQ(cpvecnum)) {      
+  if (BSP_IS_CPM_IRQ(cpvecnum)) {
     /* Enable all interrupts */
     msr = ppc_external_exceptions_enable();
     /* Dispatch interrupt handlers */
@@ -144,16 +144,16 @@ static int BSP_irq_handle_at_siu( unsigned excNum)
      * Check the vector number, mask lower priority interrupts, enable
      * exceptions and dispatch the handler.
      */
-    if (BSP_IS_SIU_IRQ(sivecnum)) {      
+    if (BSP_IS_SIU_IRQ(sivecnum)) {
       simask_save = m8xx.simask;
       /*
        * if this is the CPM interrupt, mask lower prio interrupts at SIU
        * else mask lower and same priority interrupts
        */
-      m8xx.simask &= ~0 << (32 
+      m8xx.simask &= ~0 << (32
 			    - sivecnum
-			    - ((is_cpm_irq) ? 1 : 0)); 
-    
+			    - ((is_cpm_irq) ? 1 : 0));
+
       if (is_cpm_irq) {
 	BSP_irq_handle_at_cpm();
       }
@@ -169,8 +169,8 @@ static int BSP_irq_handle_at_siu( unsigned excNum)
 	 */
 	m8xx.sipend = 1 << (31 - sivecnum);
       }
-      
-    
+
+
       /* Restore initial masks */
       m8xx.simask = simask_save;
     } else {
@@ -186,11 +186,11 @@ static int BSP_irq_handle_at_siu( unsigned excNum)
  */
 rtems_status_code mpc8xx_cpic_initialize( void)
 {
-  /* 
-   * mask off all interrupts 
+  /*
+   * mask off all interrupts
    */
   m8xx.cimr   = 0;
-  /* 
+  /*
    * make sure CPIC request proper level at SIU interrupt controller
    */
   m8xx.cicr  = (0x00e41f00 |
@@ -204,15 +204,15 @@ rtems_status_code mpc8xx_cpic_initialize( void)
  */
 rtems_status_code mpc8xx_siu_int_initialize( void)
 {
-  /* 
-   * mask off all interrupts 
+  /*
+   * mask off all interrupts
    */
   m8xx.simask = 0;
 
   return RTEMS_SUCCESSFUL;
 }
 
-int mpc8xx_exception_handler(BSP_Exception_frame *frame, 
+int mpc8xx_exception_handler(BSP_Exception_frame *frame,
 			     unsigned exception_number)
 {
   return BSP_irq_handle_at_siu(exception_number);
@@ -226,7 +226,7 @@ rtems_status_code bsp_interrupt_facility_initialize()
   }
   /* Initialize the SIU interrupt controller */
   if (mpc8xx_siu_int_initialize()) {
-    return RTEMS_IO_ERROR;    
+    return RTEMS_IO_ERROR;
   }
   /* Initialize the CPIC interrupt controller */
   return mpc8xx_cpic_initialize();
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/network/network_fec.c b/c/src/lib/libbsp/powerpc/tqm8xx/network/network_fec.c
index 29d1c497a7..6d58721f77 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/network/network_fec.c
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/network/network_fec.c
@@ -161,7 +161,7 @@ struct m8xx_fec_enet_struct {
 static struct m8xx_fec_enet_struct enet_driver[NIFACES];
 
 /* declare ioctl function for internal use */
-static int fec_ioctl (struct ifnet *ifp, 
+static int fec_ioctl (struct ifnet *ifp,
 		      ioctl_command_t command, caddr_t data);
 /***************************************************************************\
 |  MII Management access functions                                          |
@@ -221,7 +221,7 @@ int fec_mdio_read
    */
   if (phy == -1) {
     /*
-     * set default phy number: 0 
+     * set default phy number: 0
      */
     phy = sc->phy_default;
   }
@@ -288,7 +288,7 @@ int fec_mdio_write
    */
   if (phy == -1) {
     /*
-     * set default phy number: 0 
+     * set default phy number: 0
      */
     phy = sc->phy_default;
   }
@@ -978,7 +978,7 @@ static void fec_enet_stats (struct m8xx_fec_enet_struct *sc)
   printf (" Raw output wait:%-8lu\n", sc->txRawWait);
 }
 
-static int fec_ioctl (struct ifnet *ifp, 
+static int fec_ioctl (struct ifnet *ifp,
 		      ioctl_command_t command, caddr_t data)
 {
   struct m8xx_fec_enet_struct *sc = ifp->if_softc;
@@ -1107,7 +1107,7 @@ int fec_mode_adapt
   }
   else {
     m8xx.fec.x_cntrl |=  M8xx_FEC_X_CNTRL_FDEN;
-  }    
+  }
   /*
    * store current media state for future compares
    */
@@ -1136,7 +1136,7 @@ static void fec_watchdog
 \*=========================================================================*/
 {
   fec_mode_adapt(ifp);
-  ifp->if_timer    = FEC_WATCHDOG_TIMEOUT; 
+  ifp->if_timer    = FEC_WATCHDOG_TIMEOUT;
 }
 
 int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config)
@@ -1205,7 +1205,7 @@ int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config)
   /*
    * assume: IF 1 -> PHY 0
    */
-  sc->phy_default = unitNumber-1; 
+  sc->phy_default = unitNumber-1;
 
   /*
    * Set up network interface values
@@ -1231,7 +1231,7 @@ int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config)
   return 1;
 };
 
-int rtems_fec_enet_driver_attach(struct rtems_bsdnet_ifconfig *config, 
+int rtems_fec_enet_driver_attach(struct rtems_bsdnet_ifconfig *config,
 				 int attaching)
 {
   /*
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/spi/spi.c b/c/src/lib/libbsp/powerpc/tqm8xx/spi/spi.c
index 67da184f8e..134dd536d0 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/spi/spi.c
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/spi/spi.c
@@ -33,7 +33,7 @@
 #undef DEBUG
 
 /*
- * this is a dummy receive buffer for sequences, 
+ * this is a dummy receive buffer for sequences,
  * where only send data are available
  */
 uint8_t m8xx_spi_dummy_rxbuf[2];
@@ -144,7 +144,7 @@ static int m8xx_spi_wait
     /*
      * allow interrupts, when receiver is not empty
      */
-    m8xx.spim = (M8xx_SPIE_TXE | M8xx_SPIE_TXB | 
+    m8xx.spim = (M8xx_SPIE_TXE | M8xx_SPIE_TXB |
 		 M8xx_SPIE_BSY | M8xx_SPIE_MME);
 
     rc = rtems_semaphore_obtain(softc_ptr->irq_sema_id,
@@ -170,7 +170,7 @@ static int m8xx_spi_wait
   }
 
   act_status = m8xx.spie;
-  if ((act_status  & (M8xx_SPIE_TXE | M8xx_SPIE_TXB | 
+  if ((act_status  & (M8xx_SPIE_TXE | M8xx_SPIE_TXB |
 		      M8xx_SPIE_BSY | M8xx_SPIE_MME))!= M8xx_SPIE_TXB) {
 #if defined(DEBUG)
     printk("... exit with RTEMS_IO_ERROR,"
@@ -204,14 +204,14 @@ static rtems_isr m8xx_spi_irq_handler
 \*=========================================================================*/
 {
   m8xx_spi_softc_t *softc_ptr = arg;
-  
+
   /*
-   * disable interrupt mask 
+   * disable interrupt mask
    */
   m8xx.spim = 0;
   if (softc_ptr->initialized) {
     rtems_semaphore_release(softc_ptr->irq_sema_id);
-  }  
+  }
 }
 
 static void
@@ -259,7 +259,7 @@ static void m8xx_spi_install_irq_handler
    */
   rc = rtems_semaphore_create(rtems_build_name('s','p','i','s'),
 			      0,
-			      RTEMS_FIFO 
+			      RTEMS_FIFO
 			      | RTEMS_SIMPLE_BINARY_SEMAPHORE,
 			      0,
 			      &softc_ptr->irq_sema_id);
@@ -280,7 +280,7 @@ static void m8xx_spi_install_irq_handler
     }
   }
 }
-  
+
 /*=========================================================================*\
 | Function:                                                                 |
 \*-------------------------------------------------------------------------*/
@@ -301,7 +301,7 @@ rtems_status_code m8xx_spi_init
 {
   m8xx_spi_softc_t *softc_ptr = &(((m8xx_spi_desc_t *)(bh))->softc);
   rtems_status_code rc = RTEMS_SUCCESSFUL;
-  
+
 #if defined(DEBUG)
   printk("m8xx_spi_init called... ");
 #endif
@@ -311,7 +311,7 @@ rtems_status_code m8xx_spi_init
   /*
    * FIXME: set default mode in SPMODE
    */
-  
+
   /*
    * allocate BDs (1x RX, 1x TX)
    */
@@ -331,7 +331,7 @@ rtems_status_code m8xx_spi_init
   m8xx.spip.rfcr  = M8xx_RFCR_MOT | M8xx_RFCR_DMA_SPACE(0);
   m8xx.spip.tfcr  = M8xx_RFCR_MOT | M8xx_RFCR_DMA_SPACE(0);
   m8xx.spip.mrblr = 2;
-  
+
   /*
    * issue "InitRxTx" Command to CP
    */
@@ -348,23 +348,23 @@ rtems_status_code m8xx_spi_init
      * set up ports
      * LINE      PAR  DIR  DAT
      * -----------------------
-     * MOSI       1    1    x 
+     * MOSI       1    1    x
      * MISO       1    1    x
      * CLK        1    1    x
      */
-    
+
     /* set Port B Pin Assignment Register... */
-    m8xx.pbpar = 
+    m8xx.pbpar =
       m8xx.pbpar
-      | M8xx_PB_SPI_MISO_MSK 
-      | M8xx_PB_SPI_MOSI_MSK 
+      | M8xx_PB_SPI_MISO_MSK
+      | M8xx_PB_SPI_MOSI_MSK
       | M8xx_PB_SPI_CLK_MSK;
-    
+
     /* set Port B Data Direction Register... */
-    m8xx.pbdir = 
-      m8xx.pbdir 
-      | M8xx_PB_SPI_MISO_MSK 
-      | M8xx_PB_SPI_MOSI_MSK 
+    m8xx.pbdir =
+      m8xx.pbdir
+      | M8xx_PB_SPI_MISO_MSK
+      | M8xx_PB_SPI_MOSI_MSK
       | M8xx_PB_SPI_CLK_MSK;
   }
   /*
@@ -420,7 +420,7 @@ static int m8xx_spi_read_write_bytes
       m8xx.spip.mrblr          = sizeof(m8xx_spi_dummy_rxbuf);
       softc_ptr->rx_bd->buffer = m8xx_spi_dummy_rxbuf;
       softc_ptr->rx_bd->length = 0;
-      softc_ptr->rx_bd->status = (M8xx_BD_EMPTY | M8xx_BD_WRAP | 
+      softc_ptr->rx_bd->status = (M8xx_BD_EMPTY | M8xx_BD_WRAP |
 				  M8xx_BD_CONTINUOUS);
     }
     else {
@@ -440,7 +440,7 @@ static int m8xx_spi_read_write_bytes
        */
       softc_ptr->tx_bd->buffer = m8xx_spi_dummy_rxbuf;
       softc_ptr->tx_bd->length = len;
-      softc_ptr->tx_bd->status = (M8xx_BD_READY | M8xx_BD_WRAP | 
+      softc_ptr->tx_bd->status = (M8xx_BD_READY | M8xx_BD_WRAP |
 				  M8xx_BD_CONTINUOUS);
     }
     else {
@@ -561,7 +561,7 @@ rtems_status_code m8xx_spi_set_tfr_mode
       spimode |= M8xx_SPMODE_CP;
     }
   }
-  
+
   if (rc == RTEMS_SUCCESSFUL) {
     /*
      * disable SPI
@@ -600,12 +600,12 @@ int m8xx_spi_ioctl
 
   switch(cmd) {
   case RTEMS_LIBI2C_IOCTL_SET_TFRMODE:
-    ret_val = 
+    ret_val =
       -m8xx_spi_set_tfr_mode(bh,
 				(const rtems_libi2c_tfr_mode_t *)arg);
     break;
   case RTEMS_LIBI2C_IOCTL_READ_WRITE:
-    ret_val = 
+    ret_val =
       m8xx_spi_read_write_bytes(bh,
 				((rtems_libi2c_read_write_t *)arg)->rd_buf,
 				((rtems_libi2c_read_write_t *)arg)->wr_buf,
@@ -650,20 +650,20 @@ static rtems_status_code bsp_spi_sel_addr
    * GPIO1[24] is SPI_A0
    * GPIO1[25] is SPI_A1
    * GPIO1[26] is SPI_A2
-   * set pins to address 
+   * set pins to address
    */
   switch(addr) {
   case PGH360_SPI_ADDR_EEPROM:
     m8xx.pbdat &= ~PGH360_PB_SPI_EEP_CE_MSK;
     break;
   case PGH360_SPI_ADDR_DISP4_DATA:
-    m8xx.pbdat = (m8xx.pbdat 
-		  & ~(PGH360_PB_SPI_DISP4_CE_MSK | 
+    m8xx.pbdat = (m8xx.pbdat
+		  & ~(PGH360_PB_SPI_DISP4_CE_MSK |
 		      PGH360_PB_SPI_DISP4_RS_MSK));
     break;
   case PGH360_SPI_ADDR_DISP4_CTRL:
-    m8xx.pbdat = (m8xx.pbdat 
-		  & ~(PGH360_PB_SPI_DISP4_CE_MSK) 
+    m8xx.pbdat = (m8xx.pbdat
+		  & ~(PGH360_PB_SPI_DISP4_CE_MSK)
 		  |   PGH360_PB_SPI_DISP4_RS_MSK);
     break;
   default:
@@ -716,7 +716,7 @@ static rtems_status_code bsp_spi_send_stop
   printk("bsp_spi_send_stop called... ");
 #endif
 #if defined(PGH360)
-    m8xx.pbdat = (m8xx.pbdat 
+    m8xx.pbdat = (m8xx.pbdat
 		  | PGH360_PB_SPI_DISP4_CE_MSK
 		  | PGH360_PB_SPI_EEP_CE_MSK);
 #endif
@@ -783,7 +783,7 @@ rtems_status_code bsp_register_spi
   /*
    * init port pins used to address/select SPI devices
    */
-  
+
 #if defined(PGH360)
 
   /*
@@ -794,24 +794,24 @@ rtems_status_code bsp_register_spi
    * DISP4_CS   0    1 act-high
    * DISP4_RS   0    1 active
    */
-  
+
   /* set Port B Pin Assignment Register... */
-  m8xx.pbpar = 
-    (m8xx.pbpar 
-     & ~(PGH360_PB_SPI_EEP_CE_MSK 
+  m8xx.pbpar =
+    (m8xx.pbpar
+     & ~(PGH360_PB_SPI_EEP_CE_MSK
 	 | PGH360_PB_SPI_DISP4_CE_MSK
 	 | PGH360_PB_SPI_DISP4_RS_MSK));
-  
+
     /* set Port B Data Direction Register... */
-  m8xx.pbdir = 
-    m8xx.pbdir 
-    | PGH360_PB_SPI_EEP_CE_MSK 
+  m8xx.pbdir =
+    m8xx.pbdir
+    | PGH360_PB_SPI_EEP_CE_MSK
     | PGH360_PB_SPI_DISP4_CE_MSK
     | PGH360_PB_SPI_DISP4_RS_MSK;
-  
+
   /* set Port B Data Register to inactive CE state */
-  m8xx.pbdat = 
-    m8xx.pbdat 
+  m8xx.pbdat =
+    m8xx.pbdat
     | PGH360_PB_SPI_DISP4_CE_MSK
     | PGH360_PB_SPI_DISP4_RS_MSK;
 #endif
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/spi/spi.h b/c/src/lib/libbsp/powerpc/tqm8xx/spi/spi.h
index 28bd7f1b16..7d4f63a296 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/spi/spi.h
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/spi/spi.h
@@ -36,7 +36,7 @@ typedef struct m8xx_spi_softc {
 } m8xx_spi_softc_t ;
 
 typedef struct {
-  rtems_libi2c_bus_t  bus_desc;	
+  rtems_libi2c_bus_t  bus_desc;
   m8xx_spi_softc_t softc;
 } m8xx_spi_desc_t;
 
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c b/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c
index 11bcf51377..20e3c3722d 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c
@@ -82,7 +82,7 @@ const char *bsp_tqm_get_cib_string( const char *cib_id)
 {
   char srch_pattern[10] = "";
   char *fnd_str;
-  /* 
+  /*
    * create search pattern
    */
   strcat(srch_pattern,"-");
@@ -164,17 +164,17 @@ void bsp_start( void)
   /*
    * get the (internal) bus frequency
    * NOTE: the external bus may be clocked at a lower speed
-   * but this does not concern the internal units like PIT, 
+   * but this does not concern the internal units like PIT,
    * DEC, baudrate generator etc)
    */
-  if (RTEMS_SUCCESSFUL != 
+  if (RTEMS_SUCCESSFUL !=
       bsp_tqm_get_cib_uint32("cu",
 			     &BSP_bus_frequency)) {
     BSP_panic("Cannot determine BUS frequency\n");
   }
 
-  bsp_clicks_per_usec = BSP_bus_frequency/1000000/16; 
-  bsp_timer_least_valid = 3; 
+  bsp_clicks_per_usec = BSP_bus_frequency/1000000/16;
+  bsp_timer_least_valid = 3;
   bsp_timer_average_overhead = 3;
 
   /* Initialize exception handler */
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/startup/cpuinit.c b/c/src/lib/libbsp/powerpc/tqm8xx/startup/cpuinit.c
index 23311ee2aa..acdc629f7a 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/startup/cpuinit.c
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/startup/cpuinit.c
@@ -106,7 +106,7 @@ void _InitTQM8xx (void)
    *   Timebase Source is GCLK2 / 16
    */
   m8xx.sccrk = M8xx_UNLOCK_KEY;		/* unlock SCCR */
-  m8xx.sccr |= 0x02000000;		
+  m8xx.sccr |= 0x02000000;
 
   /* Unlock the timebase and decrementer registers. */
   m8xx.tbk = M8xx_UNLOCK_KEY;
@@ -124,7 +124,7 @@ void _InitTQM8xx (void)
   _mtspr( M8xx_TBL_WR, r1 );
 }
 /*
- * further initialization (called from bsp_start) 
+ * further initialization (called from bsp_start)
  */
 void cpu_init(void)
 {
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/startup/mmutlbtab.c b/c/src/lib/libbsp/powerpc/tqm8xx/startup/mmutlbtab.c
index 6dc3aea712..dcfc0c3495 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/startup/mmutlbtab.c
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/startup/mmutlbtab.c
@@ -88,7 +88,7 @@ MMU_TLB_table_t MMU_TLB_table[] = {
   { 0xFA200200,	0x13,	0xFA2009FF },	/* IMMR - PS=16K */
   /*
    *
-   * Flash: Start address 0x40000000, 8M, 
+   * Flash: Start address 0x40000000, 8M,
    *	ASID=0x0, APG=0x0, not guarded memory,
    *	R/O,X for all, no ASID comparison, not cache-inhibited.
    * EPN		TWC	RPN
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/startup/start.S b/c/src/lib/libbsp/powerpc/tqm8xx/startup/start.S
index d94817d597..950730dc5c 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/startup/start.S
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/startup/start.S
@@ -17,21 +17,21 @@
 | this file contains the startup assembly code                    |
 | it is based on the gen83xx BSP                                  |
 \*===============================================================*/
-/* $Id$ */   
+/* $Id$ */
 
-#include <libcpu/powerpc-utility.h> 
+#include <libcpu/powerpc-utility.h>
 #include <rtems/powerpc/cache.h>
 #include <bsp.h>
 #include <mpc8xx.h>
 
 .extern boot_card
 
-.section ".entry"  
+.section ".entry"
 PUBLIC_VAR (start)
 start:
 
 	/*
-	 * basic CPU setup:	
+	 * basic CPU setup:
 	 * init MSR
 	 */
 	mfmsr	r30
@@ -50,7 +50,7 @@ start:
 start_1:
 	mflr r20
 	LA   r30,start_1
-	sub. r20,r20,r30	
+	sub. r20,r20,r30
 	/*
 	 * execution address offset == 0?
 	 * then do not relocate code and data
@@ -60,51 +60,51 @@ start_1:
 	 * ROM or relocatable startup: copy startup code to SDRAM
 	 */
 	/* get start address of text section in RAM */
-	LA	r29, bsp_section_text_start  
+	LA	r29, bsp_section_text_start
 	/* get start address of text section in ROM (add reloc offset) */
-	add	r30, r20, r29    
+	add	r30, r20, r29
 	/* get size of startup code */
 	LA	r28, end_reloc_startup
 	LA	r31, bsp_section_text_start
 	sub	28,r28,r31
 	/* copy startup code from ROM to RAM location */
-	bl	copy_image      
-	
+	bl	copy_image
+
 	/*
 	 * jump to code copy in  SDRAM
 	 */
 	/* get compile time address of label */
-	LA	r29, copy_rest_of_text 
+	LA	r29, copy_rest_of_text
 	mtlr	r29
 	blr                     /* now further execution RAM */
-copy_rest_of_text:	
+copy_rest_of_text:
 	/*
 	 * ROM or relocatable startup: copy rest of code to SDRAM
 	 */
 	/* get start address of rest of code in RAM */
 	LA	r29, end_reloc_startup
 	/* get start address of text section in ROM (add reloc offset) */
-	add	r30, r20, r29    
+	add	r30, r20, r29
 	/* get size of rest of code */
 	LA	r28, bsp_section_text_start
 	LA	r31, bsp_section_text_size
 	add	r28,r28,r31
 	sub	r28,r28,r29
 	bl	copy_image      /* copy text section from ROM to RAM location */
-	
+
 	/*
 	 * ROM or relocatable startup: copy data to SDRAM
 	 */
 	/* get start address of data section in RAM */
-	LA	r29, bsp_section_data_start 
+	LA	r29, bsp_section_data_start
 	/* get start address of data section in ROM (add reloc offset) */
-	add	r30, r20, r29    
+	add	r30, r20, r29
 	/* get size of RAM image */
-	LA	r28, bsp_section_data_size  
+	LA	r28, bsp_section_data_size
 	/* copy initialized data section from ROM to RAM location */
-	bl	copy_image       
+	bl	copy_image
 
-start_code_in_ram:	
+start_code_in_ram:
 
 	/*
 	 * ROM/RAM startup: clear bss in SDRAM
@@ -117,8 +117,8 @@ start_code_in_ram:
 	 */
 
 	/* Set stack pointer (common for RAM/ROM startup) */
-	LA	r1, bsp_section_text_start  
-        addi    r1, r1, -0x10 /* Set up stack pointer = beginning of text section - 0x10 */     
+	LA	r1, bsp_section_text_start
+        addi    r1, r1, -0x10 /* Set up stack pointer = beginning of text section - 0x10 */
 
 	/* Create NULL */
 	li r0, 0
@@ -139,19 +139,19 @@ start_code_in_ram:
 	 * init some CPU stuff
 	 */
 	bl SYM (_InitTQM8xx)
-	
+
 /* clear arguments and do further init. in C (common for RAM/ROM startup) */
 
         /* Clear cmdline */
         xor r3, r3, r3
 
         bl      SYM (boot_card)  /* Call the first C routine */
-	
+
 twiddle:
 	/* We don't expect to return from boot_card but if we do */
 	/* wait here for watchdog to kick us into hard reset     */
-	b	twiddle          
-						
+	b	twiddle
+
 copy_with_watchdog:
      addi    r5,r5,16
      rlwinm. r5,r5,28,4,31
@@ -200,7 +200,7 @@ copy_image_4word:
 	stw	r21, 4(r29)
 	stw	r22, 8(r29)
 	stw	r23,12(r29)
-	
+
 	addi    r30, r30, 0x10		/* increment source pointer */
 	addi    r29, r29, 0x10		/* increment destination pointer */
 	/*
@@ -208,7 +208,7 @@ copy_image_4word:
 	 */
 	sth     r25,14(r26)
 	sth     r24,14(r26)
-	
+
 	bdnz	copy_image_4word	/* decrement ctr and branch if not 0 */
 
 	cmpwi	r27, 0x00		/* copy image finished ? */
@@ -216,19 +216,19 @@ copy_image_4word:
 	mtctr   r27			/* reload counter for residual bytes */
 copy_image_byte:
 	lswi	r28, r30, 0x01
-	
+
 	stswi   r28, r29, 0x01		/* do byte copy ROM -> RAM */
-	
-	
+
+
 	addi    r30, r30, 0x01		/* increment source pointer */
 	addi    r29, r29, 0x01		/* increment destination pointer */
-	
+
 	bdnz	copy_image_byte		/* decrement ctr and branch if not 0 */
-	
+
 copy_image_end:
 	blr
 
-	
+
 /**
  * @fn int mpc8xx_zero_4( void *dest, size_t n)
  *
@@ -278,7 +278,7 @@ mpc8xx_zero_4_tail:
 	stwx	r0, r3, r8
 	addi	r8, r8, 16
 	bdnz	mpc8xx_zero_4_tail
-	
+
 	/* Return */
 	blr
 
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/timer/timer.c b/c/src/lib/libbsp/powerpc/tqm8xx/timer/timer.c
index 276fff340c..b38feec17f 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/timer/timer.c
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/timer/timer.c
@@ -27,7 +27,7 @@
  *
  * this is derived from "timer.c" available in the m68k/gen68360 BSP
  * adapted by Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
- * 
+ *
  *  $Id$
  */